DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Objections
Claims 8-12 and 14-17 are objected to because of the following informalities:
Claim 8 recites the limitation "the control inputs" in line 8. There is insufficient antecedent basis for this limitation in the claim. Which ones? Does the applicant mean all of them, some of them or a few of them or just two of them or each of them?
Claim 8 recites the limitation "the power outputs" in line 11. There is insufficient antecedent basis for this limitation in the claim. Which ones? Does the applicant mean all of them, some of them or a few of them or just two of them or each of them?
Claim 8 recites the limitation "the control outputs" in line 14. There is insufficient antecedent basis for this limitation in the claim. Which ones? Does the applicant mean all of them, some of them or a few of them or just two of them or each of them?
Claims 9-12 and 14-17 inherit the same from claim 8.
Claim 11 recites the limitation "configurable to configurable to" [sic] in line 2.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 8 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhuyvetter et al. (US 20110148386) in view of Imai et al. (US 20040189273 – previously cited).
Claims 1 and 18; Dhuyvetter et al. disclose an apparatus (and method) comprising:; controller circuitry having a first input terminal (122/123), a second input terminal (e.g. feedback), and an output terminal ([0:N]), and the controller circuitry configurable to: receive, at the second input terminal, an indication of an output voltage (e.g. Vout); and responsive to a first comparison (118) between the output voltage and the first threshold voltage (122) and a second comparison (119) between the output voltage and the second threshold voltage (123), provide a switching signal at the output terminal ([0:N]).
However, Dhuyvetter et al. do not disclose control circuitry having a terminal coupled to memory that is configurable to store a first value representative of a first threshold voltage and a second value representative of a second threshold voltage (e.g. a reference voltages).
Imai et al. teach a switching power supply having control circuitry (10, 11, 12, 13, 15, 16) with an input terminal (at 15) coupled to memory (14) configured to store a value representative of a threshold voltage (e.g. a reference voltages) in order to regulate the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify Dhuyvetter et al. to include control circuitry with a first input terminal coupled to memory configured to store a value representative of a threshold voltage as taught by Imai et al. in order to provide a switching regulator that regulates the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Claim 8; Dhuyvetter et al. disclose a system comprising; multiple power stage circuitries (102, 104, 406, 408, 110) each having a control input (e.g. the gate) and a power output (at 114); a capacitor (126) coupled to the power outputs; and multiphase manager circuitry (120) having a first input terminal (Vrefs); a second input terminal ([0:1]) coupled to the capacitor (126) and control outputs ([0:N]) coupled to the control inputs (e.g. gates); the multiphase manager circuitry configurable to: receive, at the second input terminal, an indication of an output voltage across the capacitor (126) at the power outputs; and responsive to a first comparison (118) between the output voltage and the first threshold voltage and a second comparison (119) between the output voltage and the second threshold voltage, provide switching signals at the control outputs.
However, Dhuyvetter et al. do not disclose control circuitry having a terminal coupled to memory that is configurable to store a first value representative of a first threshold voltage and a second value representative of a second threshold voltage (e.g. a reference voltages).
Imai et al. teach a switching power supply having control circuitry (10, 11, 12, 13, 15, 16) with an input terminal (at 15) coupled to memory (14) configured to store a value representative of a threshold voltage (e.g. a reference voltages) in order to regulate the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify Dhuyvetter et al. to include control circuitry with a first input terminal coupled to memory configured to store a value representative of a threshold voltage as taught by Imai et al. in order to provide a switching regulator that regulates the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhuyvetter et al. and Imai et al. in view of Qiu et al. (US 8080987)
Dhuyvetter et al. and Imai et al. disclose the claimed subject matter in regards to claim 8 supra, except for the switching signals being PWM signals.
Qiu et al. teach that it is old and well known to provide pulse width modulated signals for simple control of a switching regulator including a multiphase switching regulator to improve efficiency during variable load conditions.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify Dhuyvetter et al. and Imai et al. to switching signals being PWM signals in order to provide pulse width modulated signals for simple control of a switching regulator including a multiphase switching regulator to improve efficiency during variable load conditions as taught by Qiu et al.
Claim(s) 1, 2, 18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hurcau et al. (US 20230185322) in view of Imai et al..
Claims 1 and 18; Hurcau disclose an apparatus, fig. 2, comprising: controller circuitry (138) having a first input terminal (Vref), a second input terminal (118), and an output terminal (140), and the controller circuitry configurable to: receive, at the second input terminal (118), an indication of an output voltage (feedback); and responsive to a first comparison (240) between the output voltage and the first threshold voltage (Vref2+) and a second comparison (242) between the output voltage and the second threshold voltage (Vref2-), provide a switching signal (246) at the output terminal (140).
However, Hurcau et al. do not disclose control circuitry having a terminal coupled to memory that is configurable to store a first value representative of a first threshold voltage and a second value representative of a second threshold voltage (e.g. a reference voltages).
Imai et al. teach a switching power supply having control circuitry (10, 11, 12, 13, 15, 16) with an input terminal (at 15) coupled to memory (14) configured to store a value representative of a threshold voltage (e.g. a reference voltages) in order to regulate the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify Hurcau et al. to include control circuitry with a first input terminal coupled to memory configured to store a value representative of a threshold voltage as taught by Imai et al. in order to provide a switching regulator that regulates the output of switching power supplies to cause the output to reach the target value rapidly with suppressed overshoots and undershoots.
Claims 2 and 20; para. [0020].
Allowable Subject Matter
Claim 4-7 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-11 and 14-17 would be allowable if rewritten to overcome the objection(s) set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20250062673 Deschenes discloses a power converter controlled by a processor that is coupled to a memory circuit by an input terminal.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY L LAXTON whose telephone number is (571)272-2079. The examiner can normally be reached Monday-Friday, 8 am-4 pm.
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/GARY L LAXTON/Primary Examiner, Art Unit 2838 10/05/2026
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