Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-7, 11, 13-14 are amended, claims 10 and 12 are canceled, and no claims are added; as a result, claims 1-9, 11, and 13-23 are now pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-23 are rejected under 35 U.S.C. 103 as being unpatentable over Konz et al. (U.S. patent application publication 20040153870), hereinafter referred to as Konz, in view of Nikitin (U.S. patent application publication 20030090346 A1), hereinafter referred to as Nikitin.
As for claim 1, Konz teaches a method and an apparatus, comprising: electrically connecting, to form a data path between a first input/output (I/O) component and a second I/O component (see fig 1, 2A, network controller first IO component, is connecting to network device 12 (second IO component), the first I/O component to the second I/O component by placing a switch located on a respective signal line coupled between the first and second I/O components in a closed position (see figure 2A for detail connection between network controller 14 and network device 18 via bus 12 with switches 26-27 in open/close position. Further, Konz teaches selectively connecting a device to the bus by closing an in-line isolation switch on the signal line (e.g., pairs of conductors) to form a communication path between nodes (Konz ¶¶[0077]–[0083], FIG. 7 first set of switches 98; second set 108).
Konz teaches first switch and second switch, wherein the first switch located on a first signal line diverted from an intermediate signal line … coupled to the first I/O component; and a second MEMS switch located on a second signal line diverted from the intermediate signal line … coupled to the second I/O component”: Konz’s bus with branch connections and bus protection elements provides an intermediate bus line with branches to devices; first/second in-line switches on the respective branch lines to upstream/downstream sides of the protection element (¶¶[0077], [0083]–[0085], FIG. 7 shows two sets of in-line switches on opposite sides—functionally the “diverted” branch lines from the main/intermediate line; and electrically disconnecting the first I/O component from the second IO component by placing the switch in an open position (see figure 2A, switches 26-27 open/close position).
Konz does not explicitly teach the switch is a type of a microelectromechanical systems (MEMS) switch. However, Nikitin teaches a MEMS switch (see par 8. Further, Nikitin provides the specific switch type as a MEMS switch in signal paths (Nikitin ¶¶[0026]–[0031])). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teaching of Nikitin to Konz because the MEMs switch of Nikitin can be easily implement and the MEMs switch provides power consumption to operate at a smaller voltage than standard, thus noise is also reduced.
As for claim 2, Konz and Nikitin teach wherein: the second IO component is one of a number of second IO components coupled to the first IO component via a respective number of signal lines (see figure 1, 2A, network device 18; via bus 12, wherein the bus 12 comprising signal lines as disclosed in fig 2A) and the method further comprises placing, to selectively form a data path between the first IO component and a first portion of the number of second 11O components (fig 2A, teaches the switches 26-27 selectively select network device 18), one or more MEMS switches located on respective first signal lines in a closed position (see fig 2A, switches 26-27), wherein the respective first signal lines are coupled between the first IO component and the first portion of the number of second IO components (see figure 2A, connection between network controller 14 and network device 18 via switches 26-27). Further, multiple second I/O components coupled via respective diverted lines; selectively forming a data path to a first portion by closing corresponding switches: Konz discloses multiple devices on the bus and selectively connecting one or more by closing the corresponding in-line switches (¶¶[0082]–[0085]); the notion of a “portion” of second I/O components is met by selecting which downstream branches to close.
As for claim 3, Konz teaches further comprising placing, while the first IO component is connected to the first portion of the number of second IO components (see fig 2A, network controller 14 connects to network device 18 via switches 26-27), one or more MEMS switches located on respective second signal lines in an open position (see fig 2A, wherein the network controller 14 connect to other network device 18. Further par 51 states that each other network device 18 has a transmitter 22 and receiver 24 as shown in fig 2A), wherein the respective second signal lines are coupled between the first IO component and a second portion of the number of second IO components (see par 51, wherein the network controller 14 connect to other network deice 18). Further, while a first portion is connected (closed), placing switches on a second portion in open position to keep others disconnected: Konz teaches opening/closing specific in-line switches to connect some devices while leaving others disconnected (¶¶[0082]–[0085]).
As for claim 4, Konz teaches an apparatus, comprising: a first number of input/output (I/O) components (see fig 15, first network controller 14a, 14b); a second number of I/O components (see fig 5, network devices 18); and one or more switches operable to selectively connect a first one of the first number of I/O components to two or more of the second number of I/O components via respective signal lines to which the one or more switches are coupled (the connections for connecting to 2 network controllers to network device 18 would be the same as shown for 1 controller as discussed from fig 1, 2a connections).
Konz did not explicitly teach the switch is a type of a microelectromechanical systems (MEMS) switch. However, Nikitin teaches a MEMS switch (see par 8). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teaching of Nikitin to Konz because the MEMs switch of Nikitin can be easily implement and the MEMs switch provides power consumption to operate at a smaller voltage than standard, thus noise is also reduced.
Further, “first number of I/O components; second number of I/O components”: Konz’s system includes a controller side and multiple device side I/O endpoints (FIGS. 1, 5; text ¶¶[0042]–[0047]).
“one or more first … MEMS switches located on a first number of signal lines diverted from an intermediate signal line … operable to selectively connect a first one of the first number … to two or more of the second number …; and one or more second MEMS switches located on a second number of signal lines diverted from the intermediate signal line … operable to selectively connect a first one of the second number … to two or more of the first number …”: Konz’s bus protection element behaves as an interface/mux between an upstream side and a downstream side with in-line switches on both sides (first and second sets of switches 98, 108) that selectively connect an upstream port to multiple downstream ports and vice versa (¶¶[0077]–[0085], FIG. 7).
As for claims 5, 11 and 22, Konz in view of Nikitin teaches MEMS switch to decrease parasitic capacitance as discussed in claim 4. Further, Konz teaches switches are configured to selectively connect the first one of the first one of the first number of IO components to the two or more of the second number of IO components (see figure 15, Network controller 14a connects to network devices 18) in the absence of a separate electrostatic discharged (ESD) protection circuit coupled thereto (see Konz par 53 and 59, Konz teaches the logic element 28 monitors signals and identifying improper signals such as data sync pulse (parasitic capacitance) and set the switches 26, 27 close/open for data transmission).
As for claims 6-7, Konz in view of Nikitin teach one or more additional MEMS switches operable to selectively connect a second one of the first number of I/O components to two or more of the second number of I/O components via respective signal lines to which the one or more additional MEMS switches are coupled (see Konz figure 5, second network controller 14b connecting other network devices 18 via switches as shown in figure 4B. Further, each other network devices 18 has a pair switches (Konz, par 51).
As for claims 8-9, Konz teaches I/O expander (IOE) (see Konz fig 5, wherein each network devices 18 is connecting to bus 12 and having transmitter and receiver for bidirectional communications).
As for claim 11, Konz in view of Nikitin teaches MEMS switch to decrease parasitic capacitance as discussed in claim 4. Further, Konz teaches switches are configured to selectively connect the first one of the first one of the first number of IO components to the two or more of the second number of IO components (see figure 15, Network controller 14a connects to network devices 18) in the absence of a separate electrostatic discharged (ESD) protection circuit coupled thereto (see Konz par 53 and 59, Konz teaches the logic element 28 monitors signals and identifying improper signals such as data sync pulse (parasitic capacitance) and set the switches 26, 27 close/open for data transmission).
Further, “capacitance … lower than a threshold such that … no separate ESD circuit”: As with claim 5, Nikitin teaches reduced parasitic capacitance in MEMS and operation at lower control voltages; omitting separate ESD circuits to keep capacitance below an acceptable design threshold would have been an obvious optimization (reduce parasitics/jitter and board area) once MEMS are selected for the in-line switches.
As for claims 10, 12-13 Konz in view of Nikitin teach wherein the one or more MEMS switches further comprises: firs number of MEMS switches located on a first portion of apparatus (see Konz par 73, figures 5-6, network controller 14a, wherein the 14a has termination switches to control connection network devices 18), the first number of switches couple to first number of signal lines and operable to respectively and selectively connect or disconnect the number of signal lines (see Konz par 73, figure 6, switches 80, 82, 84); and a second number of MEMS switches located on a second end portion of the apparatus (see par 73, figures 5-6, network controller 14b, wherein the 14b has termination switches to control connection network devices 18), the second number of MEMS switches coupled to a second number of signal lines and operable to respectively and selectively connect or disconnect the second number of signal lines (see Konz par 73, figure 6, switches 80, 88, 90). Further, “quantity of … first MEMS switches … corresponds to a quantity of the second number of I/O components …”: Konz’s architecture inherently scales the count of in-line switches with the number of ports/devices to be selectively connected (¶¶[0077]–[0085]); obvious sizing.
As for claim 14, Konz in view of Nikitin teaches wherein the quatity of the second number of IO components is greater than a quantity of the first number of IO components (see par 71, second network controller 14b will take over control, thus would have more control of the quantity of network devices 18 when there is network bus fail).
As for claims 15, 16-18 and 23, Konz teaches A system, comprising: a first number of signal lines, the first number of signal lines diverted to a second number of signal lines on a front end of an interface device (see fig 1, 2A, network controller first IO component, is connecting to network device 12 (second IO component). Further, Konz discloses a front-end/back-end signal-line diversification architecture using an interface device to divert/divide signal lines between front and back ends; describes the topology and role of the front end and back end in forming data paths (Abstract; ¶¶ [0015]–[0019], [0041]–[0045], and Fig. 1; also discusses the front/back porting in ¶¶ [0074]–[0079], Fig. 7); a first number of switches, each switch of the first number of switch located on a respective signal line of the second number of signal lines, the first number of switches operable to respectively connect or disconnect the respective signal line of the second number of signal lines (Konz teaches a plurality of switches disposed on signal lines for selectively connecting or disconnecting those lines to form data paths; the interface controller operates these switches to connect front-end I/O components to back-end I/O components (¶¶ [0052]–[0056], [0076]–[0086], Fig. 7).
Konz did not explicitly teach the switch is a type of a microelectromechanical systems (MEMS) switch. However, Nikitin teaches a MEMS switch (see par 8). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teaching of Nikitin to Konz because the MEMs switch of Nikitin can be easily implement and the MEMs switch provides power consumption to operate at a smaller voltage than standard, thus noise is also reduced.
Konz teaches a plurality of switches on signal lines used to form data paths; the forward/back architecture supports multiple switch positions to connect to downstream devices; see ¶¶ [0052]–[0056], [0074]–[0086], Fig. 7. Konz did not explicitly teach second set of switches located on signal lines of the third number (connect/disconnect). However, having additional set of switches such as MEMs. Nikitin teaches MEMS switch control and drive for line switches, including resonant drive, so MEMS switches can be used on the third (back end) signal lines as well (Abstract; [0008]–[0017], [0026]–[0033], Fig. 3–7). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teaching of Nikitin to Konz because the MEMS switches as suitable substitutes for the line-switch network to implement I/O expansions the front/back diversion and path formation, guided by Nikitin’s MEMS drive/control disclosures, consistent with measured improvements in parasitics and drive voltage.
As for claim 19, Konz teaches wherein each port of the number of first ports is simultaneously connectable to a different port of the number of second ports without leaving a single port of the number of first ports or the number of second ports disconnected (see Konz figure 1, network bus 12 and paragraph 42, wherein the bus 12 provides connections from network devices 18 and network controller 12).
As for claim 20 and 21, Konz in view of Nikitin teach wherein: a first portion of the first number of MEMS switches corresponds to one port of the number of first ports; and a second portion of the first number of MEMS switches corresponds to a different port of the number of first ports (see Konz figure 1, bus 12, network controller 14, wherein the bus 12 connects front ends the network controller 14 and connects back end to network work devices 18.
Response to Arguments
Applicant argues that Nikitin ¶[0008] is only a device-level teaching and therefore cannot motivate substituting MEMS for FET/CMOS switches in Konz. Examiner disagrees, Nikitin ¶[0008], read in context with Nikitin’s detailed resonant-drive implementations, supplies concrete, system-relevant advantages (lower actuation voltages, reduced parasitic capacitance, available drive/sensing circuitry) that directly address the performance and parasitic limitations identified in Konz; therefore a POSITA would have been motivated to and would reasonably expect to substitute Nikitin’s MEMS switches into Konz’s switching fabric as an obvious, predictable engineering choice.
Applicant focuses on the single sentence in ¶[0008] and treats it as abstract. But Nikitin’s disclosure immediately surrounding ¶[0008] (see ¶¶[0010]–[0016], [0030]–[0038] and Figs. 3–7) provides concrete guidance: resonant AC drive, capacitance sensing, phase-synchronized drive, damping for faster settling, examples of frequency and capacitance ranges, and example control circuitry. Those implementation details are system-relevant and enable a POSITA to adapt MEMS actuation to a target environment.
Further, The problems taught in Konz map directly to the advantages taught in Nikitin
Konz identifies parasitic capacitance, ESD overhead, and jitter as limiting factors for CMOS switching-based IOEs (Konz ¶¶[0012]–[0015], [0035], [0045]). Nikitin teaches techniques that (a) permit larger electrode separation and higher spring constants while operating at smaller voltages (reducing parasitic capacitance), (b) provide resonance-based actuation and control that minimize required DC drive amplitude, and c) disclose drive/sense circuitry (resonant drivers, differentiators, comparators, phase control) that a designer can integrate with bus electronics.
When one reference teaches a problem and another reference teaches a recognized solution to that problem, combining them is a paradigmatic KSR situation (see KSR Int’l Co. v. Teleflex). Nikitin’s teachings directly address the precise deficiencies called out in Konz, supplying both the motivation and predictable benefit.
Further, Predictability and reasonable expectation of success are present
Nikitin provides ranges and circuitry (frequency ranges, capacitance ranges, feedback/detection circuits) that make the outcome predictable:
Actuation at resonant frequency with sensing and control (Nikitin ¶¶[0010]–[0016], [0030]–[0038]) supplies the method to drive MEMS using lower voltages and to damp/settle reliably — a direct engineering path.
These are not mere possibilities; they are a disclosed control architecture that a POSITA could adapt to MEMS elements chosen for system needs (contact resistance, switching time).
System integration tasks called out by Applicant (driver sourcing, timing, ESD, termination) are routine engineering tasks for a POSITA. Where the references show predictable technical benefit, routine adaptation supports obviousness (KSR).
“Easily implemented for various MEMS switch designs” carries system meaning for a POSITA
The phrase reflects that Nikitin’s resonant-drive approach tolerates variation in MEMS geometry and thus enables choosing a MEMS variant optimized for a given system (e.g., lower contact resistance or specific capacitance). A POSITA would understand the phrase to mean the drive/sense approach can be adapted with routine design to fit into diverse electrical environments (including bus/IOE designs that use per-line switching).
Thus Nikitin’s teaching is not limited to intra-MEMS portability but informs component selection and driver design decisions made during system integration.
Applicant argues that Konz does not teach “…a front-end/back-end signal-line diversification architecture using an interface device to divert/divide signal lines between front and back ends". Examiner disagrees, examiner cited (Fig. 2A, switches 26–27; Fig. 7; ¶¶83, 85) in the office action that Konz teaches this limitation. Konz discloses an interface device positioned between an upstream (front-end) side and downstream (back-end) side and uses controllable switching elements to selectively connect, divert, or isolate signal lines, thereby diversifying the routing of signals between the front-end and back-end. The cited figures and paragraphs support this reading.
Figure 2A (switches 26–27):
Konz’s Fig. 2A depicts a bank of controllable switches (e.g., 26–27) that reside in the interface device and are operable to open/close to either connect or isolate particular signal lines. In the open/close positions shown, the upstream/front-end lines can be selectively connected to alternative downstream/back-end lines, or disconnected entirely, which is a direct, structural disclosure of “divert/divide signal lines between front and back ends.”
Mapping: The host-side or upstream connector corresponds to the “front-end,” the peripheral/device-side connectors correspond to the “back-end,” and the switch matrix (26–27) implements the diversification (division and rerouting) of signal paths between them.
Figure 7:
Fig. 7 presents a block-level architecture in which the interface device sits between the upstream and downstream ports and controls which signal groups are passed through, rerouted, or blocked. This figure reinforces the disclosure of a centralized interface component that handles multiple signal groupings and can dynamically configure paths — the essence of a “signal-line diversification architecture.”
Mapping: The block diagram makes clear there are distinct “ends” (upstream/front and downstream/back) with the interface device orchestrating the connectivity using its internal switching fabric.
Paragraphs 83 and 85:
¶83 describes the interface logic detecting conditions or requirements and then selecting which signal lines (or sets) are enabled/disabled, i.e., determining switch states to direct traffic appropriately.
¶85 explains that, based on such detection/selection, the device changes the open/close states to route signals, implement isolation, or reassign lines to alternative paths (e.g., for mode selection, lane reassignment, or compliance with different protocols).
Mapping: These paragraphs articulate the operational control that drives the switch matrix in Fig. 2A/Fig. 7, showing purposeful diversion and division of signal paths across the interface device.
Taken together, Konz’s Fig. 2A (switches 26–27), Fig. 7, and ¶¶83, 85 disclose an interface device that sits between an upstream/front-end and downstream/back-end and uses controllable switch elements to divide and divert signal paths. That is directly aligned with the Examiner’s characterization of “front-end/back-end signal-line diversification architecture using an interface device to divert/divide signal lines between front and back ends.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/TIM T VO/Supervisory Patent Examiner, Art Unit 2138