Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This office action is in response to communication filed on 07/27/2026. Claim 3, 5, 13-14, 17-20 and 22 have been amended. Claims 7-12 have been canceled. Claims 1-6 and 13-26 are pending on this application.
Response to Arguments
3. Under remarks, Applicant respectfully traverses the pending double-patenting rejection. But respectfully reserves the right to further address the pending double-patenting rejection when the claims in the Present Application are allowed. Applicant further reserves the right to amend the claims or file a terminal disclaimer”. Therefore, rejection of nonstatutory obviousness-type double patenting of Claims 1-6, 3-22, and 25-26 based on U.S.Patent No. 12,063,049 are sustained in this office action.
4. Applicant’s arguments with respect to amended of independent claims 13 and 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Double Patenting
5. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-6 and 13-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6 and 13-21 of U.S. Patent No. 12,063,049, respectively. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-6 and 13-21 of U.S. Patent No. 12,063,049 disclosed every limitation of applicant’s claims 1-6 and 13-21, respectively.
Claim 22 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 20 of U.S. Patent No. 12,063,049. Although the claim at issue is not identical, they are not patentably distinct from each other because claims 18 of U.S. Patent No. 12,063,049 disclosed every limitation of applicant’s claim 22.
Claim 25 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 18 of U.S. Patent No. 12,063,049. Although the claim at issue is not identical, they are not patentably distinct from each other because claims 18 of U.S. Patent No. 12,063,049 disclosed every limitation of applicant’s claim 25.
Claim 26 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 18 of U.S. Patent No. 12,063,049. Although the claim at issue is not identical, they are not patentably distinct from each other because claims 18 of U.S. Patent No. 12,063,049 disclosed every limitation of applicant’s claim 26.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
7. 13-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ridgers Pub. No. 2011/0227621.
Regarding claim 13. Fig. 2b of A time-to-digital conversion system comprising: a time-to-digital converter (21; paragraph 0041) configured to output a digital TDC output value (output of 21) based on two input signals (CLK, FREF) having an unknown time difference (unknow time different between CLK and FREF) ; and a digital post-processing circuitry (24) coupled configured to receive the digital TDC output value from the TDC (output value of 21) , retrieve from a digital memory (paragraph 0063 discloses “23 is a look-up-table”) a mapping value (paragraph 0065), the mapping value (paragraph 0065) being stored in the digital memory (Look up table 23) and corresponding to the received digital TDC output value (output of 21) , and output a compensated digital time value (corrected output of 23; paragraph 0065) based on the mapping value (paragraph 0065) retrieved from the digital memory (Look up table 23) , wherein the compensated digital time value (corrected output of 23; paragraph 0065) is representative of the unknown time difference (paragraph 0065) between the two input signals (CLK, FREF).
Regarding claim 14. The system according to claim 13, Fig. 2b further discloses wherein the digital TDC output value (output of 21) is one of (a) a time value (time difference) or (b) a voltage value (voltage value of output 21).
Regarding claim 15. The system according to claim 13, Fig. 2b further discloses wherein the mapping value (paragraph 0065) retrieved from the digital memory (Look up table 23) is one of (a) a known time difference (paragraph 0065 discloses “then code 5 is mapped to 5x the nominal unit delay, that is 5*(2pi/N). If the correction is made, then code 5 is mapped to: [5*(2.pi./N)]*[delta(1)+delta(2)+delta(3)+delta(4)+delta(5)]/M, where delta (1) corresponds to the difference in occurrence for TDC code 1, delta (2) to the difference in occurrence for TDC code 2, and so on”) corresponding to the digital TDC output value (output of 21) and wherein the digital post-processing circuitry (24) is configured to output the retrieved known time difference (paragraph 0065) as the compensated digital time value (corrected output of 23) or (b) a compensation value (corrected output of 23) corresponding to the digital TDC output value (output of 21) and wherein the digital post-processing circuitry (24) is configured to output the compensated digital time value (corrected output of 23) as a function of the digital TDC output value (output of 21) and the retrieved compensation value (correction value of look up table 23).
Regarding claim 16. The system according to claim 13, Fig. 2a further discloses wherein the mapping value (paragraph 0065) is stored in a mapping table (23) that is indexed by the digital TDC output value (output value of 21) to retrieve the stored mapping value (paragraph 0065).
Regarding claim 17. The system according to claim 13, Fig. 2b further discloses wherein the TDC (21) and the digital post-processing circuitry (24) are implemented in an integrated circuit (20.
Regarding claim 18. A time-to-digital conversion method, comprising: receiving, from a time-to-digital converter (21; paragraph 0041), a digital TDC output value (output of 21) based on two input signals (CLK, FREF) having an unknown time difference (unknow time difference between CLK and FREF); retrieving, from a digital memory (look up table 23) , a mapping value (paragraph 0065) , wherein the mapping value (paragraph 0065) is stored in the digital memory (23) and corresponds corresponding to the digital TDC output value (output value of 21) ; and outputting a compensated digital time value (corrected output of 23) based on the mapping value (paragraph 0065) retrieved from the digital memory (look up table 23) , wherein the compensated digital time value (corrected output of 23) is representative of the unknown time difference between the two input signals. (unknow time difference between CLK and FREF)
Regarding claim 19. The method according to claim 18, Fig. 2b further discloses wherein the digital TDC output value (output of 21) is one of (a) a time value (time different) or (b) a voltage value (voltage value of output 21).
Regarding claim 20. The method according to claim 18, Fig. 2b further disclose wherein the mapping value (paragraph 0065) retrieved from the digital memory (look up table 23) is one of (a) a known time difference (paragraph 0065 discloses “then code 5 is mapped to 5x the nominal unit delay, that is 5*(2pi/N). If the correction is made, then code 5 is mapped to: [5*(2.pi./N)]*[delta(1)+delta(2)+delta(3)+delta(4)+delta(5)]/M, where delta (1) corresponds to the difference in occurrence for TDC code 1, delta (2) to the difference in occurrence for TDC code 2, and so on”) corresponding to the digital TDC output value (output of 21) and wherein a digital post-processing circuitry (24) is configured to output the retrieved known time difference (paragraph 0065) as the compensated digital time value (Corrected output of 23) or (b) a compensation value (value of look up table 23) corresponding to the digital TDC output value (output of 21) and wherein the digital post-processing circuitry (24) is configured to output the compensated digital time value (corrected output of 23) as a function of the digital TDC output value (output of 21) and the retrieved compensation value valued retrieved from look up table 23).
Regarding claim 21. The method according to claim 18, Fig. 2b further discloses wherein the mapping value (paragraph 0065) is stored in a mapping table (look up table 23) that is indexed by the digital TDC output value (output of 21) to retrieve the stored mapping value (mapping value of Look up table 23).
Claim Rejections - 35 USC § 103
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over by Kossel et al. applied to claim to claim 13 above, in further view of Rezzi et al. U.S. patent No. 7,888,973.
Fig. 3 of Kossel et al. applied to claim to claim 13 further discloses an interface (2) to the TDC (3); and a controllable signal generator (1) configured to provide, via the interface (2) a pair of signals (UP, DOWN).
However, Kossel et al. do not disclose the controllable signal generator configured to provide multiple pairs of calibration signals having different known time differences to the TDC, each pair of calibration signals having a known time difference.
Fig. 9 of Rezzi et al. discloses an interface (interface from 910 and 920) to the TDC (950); and controllable signal generator (910/920) configured to provide, multiple pairs (pairs of Ƭ1/ Ƭ2 from 910/920) and of calibration signals (CALIBRATE by REF 980) signal having different known time differences (known time difference of Ƭ1/ Ƭ2) to the TDC (950), each pair of calibration signals having a known time difference.
Kossel et al. and Rezzi et al. are common subject matter of TDC; therefore, it would have been obvious before the effective filing date of claimed invention to one ordinary skill in the art to which the claimed invention pertains to incorporate Rezzi et al. into Kossel et al. for the purpose of calibrate the TDC, adjust the absolute or relative delays of resolution elements within TDC, establish a linear or dynamic range for TDC, and modify the power consumption of TDC (Col. 5 lines 5-9 of Rezzi et al.).
Allowable Subject Matter
10. Claim 23 is objected to as being dependent upon a rejected base claim 22, but would be allowable if the base claim 22 overcomes the nonstatutory double patenting rejection above.
11. Claim 24 is objected to as being dependent upon a rejected base claim 22, but would be allowable if the base claim 22 overcomes the nonstatutory double patenting rejection above.
Conclusion
12. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Linh Van Nguyen whose telephone number is (571) 272-1810. The examiner can normally be reached from 8:30 – 5:00 Monday-Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Dameon E. Levi can be reached at (571) 272-2105. The fax phone numbers for the organization where this application or proceeding is assigned are (571-273-8300) for regular communications and (571-273-8300) for After Final communications.
08/18/2026
/LINH V NGUYEN/Primary Examiner, Art Unit 2845
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