DETAILED ACTION
This action is responsive to the Application filed 7/08/2024.
Accordingly, claims 1-20 are submitted for prosecution on merits.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 1 is/are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Claim(s) 1 is/are directed to an Abstract Idea. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because of the following 2 step analysis.
Step I:
The claim is directed to a method/process statutory category.
Step IIA
Prong One:
The recited steps of “deriving” structural information including a bipartite graph based on received model description of a differential algebraic equation system and “generating” balanced index-1, “generating” torn graph and “sorting” equations thereof constitute a subject matter directed to a mathematical concept as they rely on manipulating mathematical equations, creating math structures (bipartite, torn graph) and performing mathematical algorithms (sorting and balancing index systems) – MPEP 2106.04(a)(1).
Further, the steps of “receiving”, “deriving” (information), “generating” and “sorting” are steps that can practically performed in the human mind or via use of pen/paper. MPEP 2107.04(a)(2) – which do not require any specialized hardware as in fact, they merely describe logical/mathematical steps of model reduction construed in a high-level of generality.
The claim is directed to a Judicial Exception under MPEP § 2106.04 for first, being directed to a Mathematical concept and second, to the mental process subset of an Abstract Idea.
Prong Two:
While the claim mentions about programming source code as part of the “materializing”, this teaching does not demonstrate an improvement to the underlying operation of a computer technology itself – MPEP 2106.04(d)(1)- as merely using standard mathematical modeling techniques (graph, equation, indexing) to generate code cannot evidence that an improvement to the computer technology or hardware functionality is being achieved.
The step of “materializing equations as programming source code” can only be construed as a step of applying standard mathematical derivation into a generic computing environment; and using automated mathematical processes into a general purpose programming context does not integrate the abstract Idea per Prong one into a practical application. MPEP 2106.04(d)(2)
Step IIB
The elements recited as “receiving”, “deriving”, “generating”, and “sorting” amount to well-understood routine, and conventional functions of a standard general-purpose computer whereas the recitation of “programming language”, or “source code” as additional element does not add non-conventional improvement to the above well-understood routines. See MPEP 2106.05(d )
Simply limiting the mathematical manipulation to a specific type of equation (DAE) or formatting output from that manipulation as “source code” represents a mere field-of-use or a post-solution activity that makes use of derivation(s) from the Abstract Idea steps. The step of “materializing into source code” as an additional element does not provide an inventive step to the abstracted routines of “receiving”, “deriving”, “sorting” and “generating” (index, graph) in the sense of improving upon a computer field within which these mental activities operate. MPEP 2106.05 (e ). Further, the generic mention of “index-1 system”, “bipartite graph” and “torn graph” are not construed as specific limitations or synergic cooperation that bring about non-conventional improvement to the application of mathematical concepts into the computer field of use in which the abstract steps of “receiving”, “deriving”, “generating”, and “sorting” operate.
Construed from the linkage of steps leading to the “materializing” step, what is observed is a natural logical progression of solving a DAE system via graph theory and translating the math into code and this amounts to no unconventional ordering or synergy among the steps that would yield a result greater than the sum of its abstract parts. MPEP 2106.05(h)
Thus, the additional elements from above, as a individual element or as within an ordered combination, fail to recite “significantly more” than the Abstract Idea itself; and so, notwithstanding the fact that an advancement in a mathematical algorithm is still an abstract idea, regardless of how clever the math is.
Therefore, claim 1 is non-eligible under the 35 USC § 101 statute.
Claim 10 is/are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Claim(s) 10 is/are directed to an Abstract Idea. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because of the following 2 step analysis.
Step I
Claim 10 is directed to processor product category
Step IIA
Prong one:
Claim 10 recites the same abstracted steps of “receiving”, “deriving” (information), “generating” and “sorting” being steps that can practically performed in the human mind or via use of pen/paper. Claim 10 is directed to a Abstract Idea - MPEP 2107.04(a)(2) – as the above steps do not require any specialized hardware when in fact, they merely describe logical/mathematical steps of model reduction construed in a high-level of generality
Prong Two:
Claim 10 recites “materializing” (into source code), and this teaching does not demonstrate an improvement to the underlying operation of a computer technology itself – MPEP 2106.04(d)(1)- as merely using standard mathematical modeling techniques (graph, equation, indexing) to generate code cannot evidence that an improvement to the computer technology.
Merely applying standard mathematical derivation into a generic computing environment; and using automated mathematical processes into a general purpose programming context (“materializing” to “source code” step) does not integrate the abstract Idea (steps of receiving”, “deriving” (information), “generating” and “sorting” ) per Prong one into a practical application. MPEP 2106.04(d)(2)
Step IIB
The additional elements of claim 10 include the same elements such as equation system, bipartite graph, balanced index system, torn graph, programming source code, all expressed in a high level of generality without clear synergic inter-relationship among them in order to convey a non-conventional technical improvement for a particular computer field of use.
Construed from the linkage of steps leading to the “materializing” step, what is observed is a natural logical progression of solving a DAE system via graph theory and translating the math into code and this amounts to no unconventional ordering or synergy among the steps that would yield a result greater than the sum of its abstract parts. MPEP 2106.05(h)
Thus, the additional elements from above, as a single entity or as an ordered combination, fail to recite “significantly more” than the Abstract Idea itself
Therefore, claim 10 is non-eligible under the 35 USC § 101 statute
Claim 20 is/are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Claim(s) 1 is/are directed to an Abstract Idea. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because of the following 2 step analysis
Step I:
Claim 20 is directed to a method/process category,
Step IIA
Prong One:
The claim recites a method involving “Pantelides algorithm” being a well-known mathematical graph-based algorithm used for reducing the index of differential-algebraic equations (DAEs). The element recited as “extended tearing algorithm” was a known mathematical partitioning technique for solving simultaneous equations, whereas the “Jacobians” and “auto-differentiation” (AD) are fundamental calculus operations of matrix derivatives genre. The claim is directed to a Mathematical Concept under MPEP 2106.04(a)(1) as it relies entirely on mathematical relationships, mathematical formulas and algorithmic steps thereof. For instance, the mathematical relationships can be viewed in the manipulation of a “Single-State Intermediate representation” (SSA-IR) which is a fundamental way of manipulating a algebraic directed graph, which amounts to a purely mathematical construct. In that light, mathematical concepts do not gain patent eligibility because they are simply expressed in computer science terminology (“SSA-IR”, “code generation”). The underlying core/substance of the claim steps remains the execution of mathematical procedures to solve mathematical models, and mathematical procedures fall into the Mathematical concepts subgroup of a Judicial Exception.
Prong Two:
The element recited as “improved code generation and runtime efficiency for large scale models” is interpreted in light of the use of mathematical route that compute “Jacobians” or reduce index of DAEs via “Pantelides algorithm”, all indicative of improvement to the Math as opposed to demonstrating improvement to a technology, since using Jacobians, Pantelides algorithm or single-static assignment IR (SSA-IR) does not alter memory operation, nor does it change the underlying operating system of a processor on which the mathematical procedures and reduction algorithms operate, as a indication that the mathematical steps represent improvement to the related computer technology.
Further, the “generating code” and “regaining structure of generated code” amounts to merely converting output of a Mathematical concept (Abstract Idea per prong One) into usable format. Under MPEP 2106.04(d)(2) – and presenting results of an Abstract mathematical derivations, activities constitutes insignificant post-solution activity that fails to integrate the Abstract Idea into a Practical Application.
Step IIB
Claim 20 utilizes standard, generic compiler mechanisms (intermediate representation like SSA, reduction passes (elimination, tearing), code generation routine which in fact do not particularly require unconventional HW structures – MPEP 2106.05(d). Further, the characterization in terms of “extended” (alias elimination, tearing algorithm) merely amount to a conclusory statement or a vague labeling rather than demonstrating that these “extended” techniques provide realization of a inventive concept, a non-abstract structural mechanism that produces non-conventional physical result – MPEP 2106.05(a) – hence the claim used techniques are not inherently inventive.
When viewed as an ordered combination, the steps simply outline the logical sequence of an optimization pipeline: parsing a mathematical model into an IR, simplifying the math (elimination/tearing), computing derivatives (Jacobians via AD), and outputting the result. This is a conventional, logical mathematical workflow. MPEP 2106.05(h).
The above additional elements fail to provide an inventive concept and cannot amount to adding significantly more to the Abstract idea itself.
Therefore, claim 20 is non-eligible under the 35 USC § 101 statute
Analysis under step IIB for dependent claims.
Claims 2 and 11 recite “determining” a linear system, find alias variable or use of Gaussian algorithm to simplify the linear system and sorting alias of the torn graph, and all of which constitute well-understood techniques using mathematical-based reduction algorithms and as such, fail to demonstrate an improvement to the computer field in which the DAE system or code generation thereof is being investigated.
Claims 3 and 12 recite source code being materialized, but this activity amounts to no more than a post-activity of feeble significance.
Claims 4-5 and 13-14 describe a static characteristic (flattened, hierarchical) of the DAE system hence fail to show a technical improvement to the computer field in which the DAE system or code generation thereof is being investigated.
Claims 6 and 15-16 recite one representative form of the DAE system or the programming language thereof, and this static characterization cannot be sufficient to demonstrate a specific technical and unconventional improvement to computer field in which the DAE system or code generation thereof is being used.
Claims 7 and 17 recites a Pantelides algorithm as basis for a balanced index of the DAE system; and use of these well-understood techniques (Pantelides, index-1) established upon mathematical concepts cannot be specific enough to convert the Judicial Exception from step IIA into a novel and practical application.
Claims 8-9 and 18-19 recite a variable differentiation graph and bottom-up differentiation for use with the DAE system, but in view of the high-level of generality in which recitation of the techniques is being expressed, these mathematical techniques are not sufficient to demonstrate that very non-conventional improvement in a code generating or computer field is being attained, thus fail to add significantly more to the Abstract Idea of the base claim(s).
In all, claims 1-20 are rejected as non-eligible under the 35 § 101 statute.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5, 10, 12-14 is/are rejected under § 35 U.S.C. 103 as being unpatentable over Babaali et al, USPN: 11,354,463 (herein Babaali) in view of Ali Baharev et al, “Tearing systems of non-linear equations: A survey” , March 1, 2016, 33 pgs (herein Baharev).
As per claim 1, Babaali discloses a programmatic method for accelerating generation of code in a compiler that preserves structure of the code, the method comprising:
receiving a differential algebraic equations (DAE) system (col 4 li. 3-10), wherein the received DAE system (col. 2 li. 66 to col. 3 li. 1-2; model 200, model 600 – Fig. 1) is a causal model description (col. 39, li. 51-55) or an acausal model description (acausal model 200 - col. 5 li. 7-16);
deriving structural information from the received DAE system (connected component analysis – col. 19 li 23-24), wherein the derived structural information includes a bipartite graph (col. 19 li. 23-24; include the algebraic equations and algebraic variables - col. 21 li. 31-39) of equations and variables;
generating a balanced index-1 DAE system (col. 20 li 26-46);
generating optimized (col. 15 li. 16-29), discretized, partitioned model (direct feed-through, merge the blocks forming the algebraic loop into a single block - col. 13 li. 43 to col. 14 li. 46; assignment relationship by the partitioning engine – col .10 li. 7-26; Fig. 5 and related text) from the bipartite graph (refer to algebraic equations and algebraic variables - col. 21 li. 31-39);
sorting (sorted order - col. 15 li. 16-29; solver 104 … determine an order of execution of the groups of equations, order may be based on the computations and use of variables … for variables are computed by and passed to equations … acyclic graph that expresses the order of execution – col.5 li.10-34) the equations on the optimized, discretized, partitioned causal model (optimizations to causal simulation model 2536 – Fig. 25c); and
materializing equations (refer to Note1) of the causal model as source code (generate code … based on the causal model 600 … code 132 may be source code … such as object code ad deployed – col. 6 li. 22-30; Based on solutions 116 computed by the solver 104 … simulation models … corresponding to the family of solutions generated by the solver 104 – col. 6 li. 5-17) for a programming language (programming language … presented in a causal simulation model – col. 17 li.34-41 – Note1: generating of source code – col. 6 li. 22-28 - to correspond to a causal model for its simulation whose programming is being based on solutions and linearized computations order of equations and variables – col. 5 li.. 12-30 – provided to a solver module in conjunction with a partitioner and a discretizer module reads on materializing equations as programming language written n C, C++ code translatable to object code).
Babaali does not explicitly disclose generating optimized, partitioned, discretized causal model (from the bipartite graph and materializing the equations as source code for a programming language) in terms of
generating a torn graph from the bipartite graph; sorting the equations on the torn graph
Baharev discloses engineering effect of tearing of sparse matrices with aid of bipartite graphs as a way of reducing computational time needed to solve a given system of equations by exploring sparsity patterns, judging on possibility to assume values for a function underlying a non-linear equation (pg. 1-2) by eliminating a maximum number of non-linear variables, minimizing running time by solving univariate equations, the assumption mechanism including selecting one or two variables, as guessed variables (pg. 3) in one selected non-linear equation thereby to seek a solution by a solver while removing as much as possible other non-linear variables - the eliminated variables - so that the non-linear equation is reduced/decomposed into simpler linear equation(s) while the other variables of the sparsity pattern (Jacobian matrix) can be ignored, the assumption approach based on tearing of a bipartite graph which is being modified and reoriented in a way that make the graph behaving locally as a acyclic graph or as a simple sparse matrix (pg. 4-6) or reoriented into one or two simple cycles (Fig. 3 pg. 7) -- each portion of a torn bipartite graphs defined with minimum edge feedback (pg. 8) indicative of a linear computation or a feasible solution to be verified by a solver - the variants of the graph tearing allowing a) decomposition of the original equations graph into small solvable subsystems (Fig. 12-15) and b) verification by the solver in matching of guessed result with actual computed result obtained from smaller acyclic Jacobian computation (pg. 4), as indicated as a desirable dense diagonal (see b) in Figure 4, pg.13) of a Jacobian matrix determined via a variable-equation matching heuristic that takes account of the sparsity patterns (sec 8.1 pg. 20-21) in the context of tearing methods.
Based on effect of maximizing linearization of a bipartite graph in Babaali, it would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement partitioned, discretized causal model in Babaali so sorting equations thereof and generating programming code thereby can be improved with tearing the bipartite graph so that a torn graph based on the bipartite graph – as in Baharev method – can afford decomposition of the causal DAE model into feasible simpler linear solution, facilitating thereby selective guessing of non-linear computations variable of each such linear computation and passing an assumed value thereof into a solver module operating on the decomposed model – as set forth in Baharev tearing approach- can verify each time whether one guessed value matches with actually obtained value, and using such matching to propagate required values to the rest of non-linear variables left out from the assumption-based approach; because
This graph tearing and analysis thereof to identify which equation portions of the original bipartite graph can be significant and whose variable can be guessed into a assumption-based verification as part of a solver engine as set forth above would mitigate runtime cost in having to solve non-linear equation and looped computation associated therewith by decomposing the original graph into feasible smaller linear solutions, where guessed variables and assumed values using this torn graph and decomposition approach would also enable realization of unselected operation variable to be replaced with a properly guessed values, which in turn reduce a more costly time complexity in solving a DAE model into a more straight forward, time predictable linearization solution rendering that relies solely of executing smaller, acyclic differential equation partition based on selectively guessed values and verifying convergence thereof with actually computed data by a solver as set forth above.
As per claim 3, Babaali discloses programmatic method of claim 1, further comprising compiling (col. 6 li. 25-28) the materialized source code.
As per claim 4, Babaali discloses programmatic method of claim 1, wherein the received DAE system is received as a flattened system (Acausal Model [Wingdings font/0xE0]system of equations 2004; custom block of a acausal model … source files written in the acausal programming language – col. 17, li. 32-38; acausal … model 1000 by entering its name and the file directory … where in the file system … the acausal … model is stored – col.35, li. 32-36 – Note2: model stored in a file directory reads on DAE information stored in a flattened source while equations in sequence format reads on flattened representation of a DAE model).
As per claim 5, Babaali discloses programmatic method of claim 1, wherein the received DAE system is received as a hierarchical system (block behaviors … model 600 from one block to the next following signal … through the hierarchical structure of the model 600 -col. 15, li. 32-50; block diagram 600 – Fig. 6).
As per claim 10, Babaali discloses a compiler (col. 5 li. 5-15) for accelerating generation of code, the compiler comprising one or more hardware processors configured for:
receiving a differential algebraic equations (DAE) system, wherein the received DAE system is a causal model description or an acausal model description;
deriving structural information from the received DAE system, wherein the derived structural information includes a bipartite graph of equations and variables;
generating a balanced index-1 DAE system;
generating a torn graph from the bipartite graph;
sorting the equations on the torn graph; and materializing the equations as source code for a programming language.
(all of which having been addressed in claim 1)
As per claims 12-13, refer to rejection of claims 3-4.
As per claim 14, refer to rejection of claim 5.
Claims 2, 11 is/are rejected under § 35 U.S.C. 103 as being unpatentable over Babaali et al, USPN: 11,354,463 (herein Babaali) in view of Ali Baharev et al, “Tearing systems of non-linear equations: A survey”, March 1, 2016, 33 pgs (herein Baharev), further in view of RG Archeambolt, JP H10269088,(translation), 10-09-1998, 11 pgs (herein Archeambolt) and Pileggi et al, USPubN: 2017/0184640 (herein Pileggi)
As per claim 2, Babaali discloses programmatic method of claim 1, further comprising:
determining a linear subsystem (col. 5 li. 17-55; col. 9 li. 45 to col.10 li. 6; Fig. 5) from the model description (model 200 – Fig. 1);
Babaali does not explicitly disclose
using the determined linear subsystem to find alias variables or to use an exact Gaussian
elimination method to simplify the linear subsystem; and sorting the alias variable on the torn graph.
Archeambolt discloses code generation environment with identification of alias variables as a means for optimizing a data set coverage (computation time, and memory usage - para 0016, pg. 4) by a compiler, for elimination of redundancies caused by definitions or lack thereof for alias graph/variable so to reduce program complexity caused by non-mitigated alias presence (pg. 3), the reduction including forming a alias graph pointer from combining local alias graphs collected in a first pass, according to which list of objects pointed to by the generic pointer can be resolved according to their occurrences (para 0022, pg. 4-5) in a second phase of two-pass inter-procedural analysis (para 0024) wherein for each function argument node having a alias set initialized to the argument (r-val or l-val), can have an actual return value of this pseudo-pointer variable (in this generic combined alias graph) to represent a resolved alias, so that transitions along the graph using this immediate r-val resolution by a front compiler phase form a sequence of transition closure without adding more values to the iterative process of resolving alias redundancies, in that alias set calculated at the front end compiler is immediately replaced with resolved value (pg. 6-7). Hence, optimization to resolve redundancies of alias variables in re-arranging them with pointer into a global reference by which to perform immediate closure upon each encountered alias by a optimizing compiler entails simplifying complexity of a program processing where multiple dependencies of otherwise redundant aliases can be rectified with a directional, acyclic forward value closure.
Use of gaussian elimination applied over a linear model representation is shown in Pileggi; where Jacobian matrix (para 0111) representation of solutions associated power circuitry simulation implement solution seeking linearization on voltage and current equations (Newton Raphson – Fig. 3; NR algorithm to solve non-linear circuit – para 0057) whose solution is in part based on achieved convergence between guessed seed input and simulated power output (Fig. 14-15, para 0109)- e.g. according to a iterative power stepping up mode (para 0119) -- where a derived mathematical model associated with the power flow analysis (Fig. 19) is used to control numerical behavior or asymmetric voltage surges (e.g. for a induction motor), the linearization model enhanced with use of a Gaussian elimination to further reduce the linearity of the system (para 0140) in view of the non-linear and linear load currents from the numerical model (Fig. 20-21) which contains real and imaginary loads. Hence, use of a Gaussian elimination applied to numerical/Jacobian representation of a equation-based circuitry to increase linearization being crux to a convergence-based solution (under a Newton-Raphson analytic) is recognized.
Based on use of the list of numerical approximation methods to improve stability of the solution by a typical solver (col. 13 li. 45 to col. 14 li. 58) with backward and forward check of simulation result and reliance thereof to further determine when/where to implement a non-linear algebraic solver (col. 14 li. 55-58) so to consolidate linearization of a simulation program for a initial causal model in Babaali, the intent to further reinforce linearization to the algebraic complexities at each local context from the overall initial causal model or its corresponding bipartite graph is recognized.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement numerical approximation techniques in Babaali so that linearization of the causal system would include observation of each linear subsystem therein to implement additional techniques - such as (a) systematic alias variable sorting, rearranging and processing as shown in Archeambolt’s two-pass optimization technique or (b) a Gaussian elimination technique as in Peliggi to further linearize complex and non-linear tendencies of Jacobian structures and equations underlying a power loading system – based on the initial causal DAE model, and need to break down significant subregions based on a graph tearing (per rationale A from above, using Baharev, for enabling smaller, feasible solving code to operate in a rather linear and controllable fashion); because
Numerical approximation techniques for unrolling loop and altering non-linear behavior of algebraic computations applied during preprocessing of graph structure representative a complex DAE system or causal model via a phase in which alias variables tracking and re-arranging – as set forth above - can resolve cost for redundant referencing by a compiler due by presence of rampant and un-consolidated aliases, would proactively help consolidating and sorting the aliases into a direct value closure included with a feedforward processing mode set by a compiler and that would significantly minimize non-linear looping behaviors that would fall under the ambit of linearization of a DAE as intended in Babaali, and use of Gaussian elimination would also act as torn graph post-processing filter to eliminate algebraic variable components of the graph so as to further shrink size of the Jacobian structure subjected to a Newton Raphson algorithm – minimizing zero elements under and above the diagonal of the Jacobian matrix - thereby drastically reducing the computation overhead associated with maximizing linearization of computations and guaranteeing non-convoluted propagation of values via a pass through linear sequence of graph subset portions resulting from tearing the DAE model graph.
As per claim 11, Babaali discloses compiler of claim 10, wherein the one or more hardware processors are further configured for:
determining a linear subsystem from the model description;
using the determined lincar subsystem to find alias variables or to use an exact Gaussian
elimination method to simplify the linear subsystem; and
sorting the alias variables on the torn graph.
(All of which having been addressed in claim 2)
Claims 6-7, 15-17 is/are rejected under § 35 U.S.C. 103 as being unpatentable over Babaali et al, USPN: 11,354,463 (herein Babaali) in view of Ali Baharev et al, “Tearing systems of non-linear equations: A survey”, March 1, 2016, 33 pgs (herein Baharev), further in view of Voellmi et al, USPubN: 2016/0050117 (herein Voellemi) and Rackauckas et al, USPubN: 2022/0092390 (herein Rackauckas)
As per claims 6-7, Babaali does not explicitly disclose programmatic method of claim 1, wherein
(i) the received DAE system is represented in linear SSA-IR form.
(ii) the balanced index-1 DAE system is generated using the Pantelides algorithm.
The linearization of a DAE programming code can be seen from the perspective of real-world HW port sequencing and resolution of in/out port dependencies using a single port configuration propagation of data at a time (Fig. 23A, 23B).
Single assignment of inter-component dependency (Fig. 24A,24B; col. 30, li. 30 to col. 31, li. 13) that is geared to provide a one-to-one mapping of memory blocks in implementing a sparse matrix simulation can be viewed as a static configuration at a preprocessing stage of a compiler environment in which an intermediate representation of a DAE model portions includes a one-to-one assignment of static variables as part of configuring a mathematical simulation (col. 38, li. 37-64) effecting single precision type computation selected for implementing discretized sparse matrices associated simulation of the causal model.
Voellemi discloses data flow analysis of NW packet flow underlying realization of a algorithmic policy, with transformation of the packet flow into a intermediate representation such as a SSA (Static Single Assignment), facilitating thereby program generating with effect of creating and editing a work list with adding statements that define critical values or removing statements that are not marked as relevant to the policy, to improve speed/efficiency of the policy program at runtime (para 0186-0187)
Use of Pantelides algorithm to support graph optimization associated with using approximation techniques to partition, decompose equations of a model is shown in Rackauckas compiler architecture using large system models for training surrogates subsystems (Fig. 2-4), where result from an index reduction (para 0071-0072) via effect of the Pantelides algorithm can serve as specifications into numerical solvers such as those for ODEs or DAEs (ordinary differential equations or Differential algebraic equations), the index reduction or proper matching between operations node and variables node aimed to reduce simulation times (boosting speed) in training real system like HVAC components of a building design that operates with a surrogate execution model (para 0069-0070) established upon ODE or DAE equations.
Therefore, based on optimization of the causal model associated with approximation techniques that analyze, partitions or discretizes algebraic blocks (col. 20, li. 25-61) into a desired index-1 check that facilitate simple mapping of equation to a variable value while averting index-2 singularities as source of instability in the simulation, it would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement simulation code for DAEs components in Babaali in direction of reducing index with balanced index-1 approach, where preprocessing of received raw causal model by a front end compiler transform the model into a SSA type intermediate representation as set forth Voellemi, where discretization and decomposition or partitioning of the intermediate representation is enhanced with a Pantelides algorithm as set forth in Rackauckas to further improve the linearization of dependencies achieved from index-1 balanced check as set forth above; because
use of a Static Single Assignment as a restrictive mode to represent raw model data into an intermediate format would enable identifying of critical relationships and editing of model block and data dependency which facilitate one on one dependency, so that the filtering effect by this SSA IR ruling would assist a compiler environment with added speed in creating simulation program as component to component operation can be statically arranged in a straight forwarded non-cyclic manner, whereas applying a Pantelides algorithm subsequent to maximizing linearized mapping under a index-1 mode to the DAE model graph would enable technique for re-organizing equations blocks and variables under sparsity analysis(as shown in Baharev graph tearing) with capability to extracting strongly connected components thereby to reinforce diagonal density of the Jacobian matrix while depopulating other non-diagonal regions of the Jacobian structure, thus improving one-to-one matching of equations with direct and linear correspondence to a variable, which is the ultimate target of using approximation techniques in Babaali system for maximizing linear behavior to a complex DAE model in which the amount of linear and non-linear computations necessitates restructuring of model regions so that the overall complexity suffered by a numerical solver would be significantly diminished when smaller feasible portions of the model can appear to be simulated (solved) in linear fashion based on various preprocessing and decomposition techniques (achieved via graph tearing and Pantelides algorithms).
As per claims 15-17, refer to rationale of claims 6-7.
Claims 8-9, 18-19 is/are rejected under § 35 U.S.C. 103 as being unpatentable over Babaali et al, USPN: 11,354,463 (herein Babaali) in view of Ali Baharev et al, “Tearing systems of non-linear equations: A survey”, March 1, 2016, 33 pgs (herein Baharev), further in view of RG Archeambolt, JP H10269088,(translation), 10-09-1998, 11 pgs (herein Archeambolt), Voellmi et al, USPubN: 2016/0050117 (herein Voellemi) and Rackauckas et al, USPubN: 2022/0092390 (herein Rackauckas)
As per claims 8-9, Babaali does not explicitly disclose programmatic method of claim 1, wherein
(i) the derived structural information further includes a variable differentiation graph.
(ii) the generating a balanced index-1 DAE system is performed using bottom-up automatic differentiation.
However, use of index-1 as criteria to present a direct mapping between DAE graph elements in which equation nodes can be mapped to variable nodes without complexity or singularities raised by a index-2 in Babaali entails analysis of graph from the variable nodes in the direction of the edges toward large node representing equation constructs in accordance to how the equations and variable are spanned across the bipartite graph from the bottom up. Thus, deriving how to discretize, decompose graph blocks on basis of relationships between algebraic variable (node V) and algebraic function associated with a subgraph expression of a differential operation (node E) entails processing by the discretization, decomposition module in Babaali with a variable-based processing of a V-E graph, which should consider variable-function relationship from the bottom nodes – referred herein as (*) - where variables can overload the leaf nodes, including alias variables that should be tracked and removed (see Archeambolt in claim 2)
Further, use of a preprocessing that traverses dependency between variable and algebraic functions comprised in a differential operation on basis of matrix sparsity pattern consideration (see Baharev per rationale A in claim 1) has to address dependency from the bottom nodes where seeding input at tearing variables and propagating them forward as part of the sparsity tracking has to move the tearing algorithm forward or bottom-up AD (automatic differentiation)
Generating of index-1 structuring typically integrated with a Pantelides algorithm as set forth in Rackauckas to find over constrained subgraphs where there are only fewer differentiation functions to use them entails a bottom-up or forward automatic differentiation (AD) because here the compiler uses a sweep forward over equations syntax tree.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement compiler preprocessing stage with implementation of index-1 structuring, Pantelides algorithm, alias variable sorting and sparsity pattern in conjunction with a graph tearing algorithm as set forth above so that
1) the derived structure by the preprocessing includes the derived structural information includes a variable differentiation graph (variable node bottom-up tracking as per (*) and alias tracking per Archeambolt); and
2) generating a balanced index-1 DAE system also includes using bottom-up automatic differentiation (forward AD) based on use of Pantelides algorithm that sweeps up the equation syntax tree as set forth above (per Rackauckas); because
Variable and differential operations tracking has to negotiate correspondence between a fixed operation with likelihood that variables that actually used by the operations versus variables that are alias or declared but unused, and this constraint by which a V(variable)-E (equation) nodes are to be observed necessitate a variable node based tracking toward a differentiation function node as a means to reduce a over-loaded syntax tree; and use of Pantelides algorithm within the index-1 algorithm by a preprocessing stage of a compiler that operates with a graph tearing algorithm to generate optimized DAE code, a highly optimization pipeline established on a forward automatic differentiation mode can be formed to perform isolation of significant portions combined with rewriting of equations to meet constraints of the algebraic index (e.g. smaller equation that can execute linearly) or extrication of redundant portions, compression of strongly connected components susceptible of generating a solution, and linearization of the non-linear code included with the originally complex DAE model.
As per claims 18-19, refer to rationale of claims 8-9 from above.
Claims 8-9, 18-19 is/are rejected under § 35 U.S.C. 103 as being unpatentable over Babaali et al, USPN: 11,354,463 (herein Babaali) in view of Ali Baharev et al, “Tearing systems of non-linear equations: A survey”, March 1, 2016, 33 pgs (herein Baharev), and RG Archeambolt, JP H10269088 (translation), 10-09-1998, 11 pgs (herein Archeambolt), further in view of Voellmi et al, USPubN: 2016/0050117 (herein Voellemi) and Rackauckas et al, USPubN: 2022/0092390 (herein Rackauckas)
Allowable Subject Matter
Claim 20 is deemed allowable over the prior art, pending resolution of any outstanding rejection effected under a different statute, the allowable subject matter including:
(claim 20) A method for improved code generation performance and runtime efficiency for large-scale models of acausal systems, the method comprising:
using an extended Pantelides algorithm on a single-static assignment intermediate representation;
using extended alias elimination on the SSA-IR;
using an extended tearing algorithm on the SSA-IR;
generating code for sparse Jacobians via bottom-up automatic differentiation;
using one or more SSA-IR outlining passes on a lowered acausal model to regain structure of the generated code.
Claim Objections
Claims 6, 15, 20 are objected to because of the following informalities: the acronym “SSA-IR” for not representing a official trademark has to be spelled out at least once. Appropriate correction is required.
Conclusion
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/Tuan A Vu/
Primary Examiner, Art Unit 2193
June 13, 2026
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