Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the application filed July 8, 2024.
Claims 1-20 are pending.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 2, 2024 was filed after the mailing date of the application on July 8, 2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s)1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.)
Regarding Claim 1, the LATTE ’21 paper teaches:
1. A method of generating fixed function shared accelerators (FFSAs), the method comprising: receiving source code, the source code indicating a plurality of workloads to be performed by an electronic circuit;(LATTE ’21 paper – e.g. Figure 2, Section Source Code into LLVM/Clang front-end of system to then be translated into AST)
generating a plurality of abstract syntax trees (ASTs) based on the source code, wherein respective ones of the plurality of ASTs include a plurality of nodes correspond to function instructions;(LATTE ’21 paper – e.g. Figure 2, Section 1 LLVM/Clang front-end of system to then be translated into AST and updated AST systemin CAST transformation)
and to output at least one candidate FFSA. (LATTE ’21 paper – e.g. Figure 2, Section 1 teaches outputting Accelerator Candidates at the end of the process show in Figure 2).
The LATTE ’21 paper does not teach, but FA-AST teaches:
generating a plurality of fingerprinting vectors corresponding to the plurality of ASTs, wherein respective ones of the plurality of fingerprinting vectors encode at least one of a number of nodes, a number of edges, a density, a computation intensity, an operands percentage, a control, or a data dependency;(FA-AST e.g. Sections I-IV, Fig. 2, teach generation of vector representations by a GNN ML system from flow-augmented-AST representations of source code. These particular AST’s argue augmented to represent control and data dependency by augmenting the edges represented in the AST to reflect such information, and subsequently transformed in vector representations of the code snippets, which, as a result of the FA-AST encode control and data dependency )
and providing the plurality of fingerprinting vectors to a machine learning (ML) model, wherein the ML model is configured to predict similarities between different ones of the plurality of workloads (FA-AST e.g. Sections I-IV, Fig. 2, teach generation of vector representations by a GNN ML system from flow-augmented-AST representations of source code. These particular AST’s argue augmented to represent control and data dependency by augmenting the edges represented in the AST to reflect such information, and subsequently transformed in vector representations of the code snippets, which, as a result of the FA-AST encode control and data dependency )
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of FA-AST as each is directed to AST-based detection of code similarity and the LATTE ’21 recognized “Many techniques from the compiler community can be applied to HLS
tools and improve the design process; applying machine learning techniques is one of these approaches.” (LATTE ’21 Paper Section 3.1)
Regarding Claim 2, the LATTE ’21 paper teaches:
2. The method of claim 1, further comprising generating a design for the electronic circuit to include at least one FFSA based on the at least one candidate FFSA. (LATTE ’21 paper – e.g. Figure 2, Section 1 teaches outputting Accelerator Candidates at the end of the process show in Figure 2 and the Abstract, and Section 3 also describe incorporation of these candidates in circuit design in HLS systems).
Regarding Claim 3, the LATTE ’21 paper teaches:
3. The method of claim 1, wherein the design for the electronic circuit includes a first dedicated hardware kernel corresponding to hardware that is unique to a first workload of the plurality of workloads, a second dedicated hardware kernel corresponding to hardware that is unique to a second workload of the plurality of workloads, and a shared hardware kernel corresponding to hardware that is common to the first workload and the second workload. (LATTE ’21 paper – e.g. Figure 1, Section 1 – Fig. 1 shows the use of shared elements in shared accelerator design, as well as separate unique kenerls for separate workloads)
Claim(s) 4-5, 11-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) as applied above and further in view of “Buyuktosunoglu” (US PG Pub 2021/0303306).
Regarding Claim 4, the LATTE ’21 paper does not teach, but Buyuktosunoglu teaches:
4. The method of claim 3, wherein the design for the electronic circuit includes a third dedicated hardware kernel corresponding to hardware that is unique to a third workload of the plurality of workloads, and the shared hardware kernel further corresponds to hardware that is common to the first workload, the second workload, and the third workload.(Buyuktlsunoglu Figs. 9 and 10, ¶¶106-114 describe the use of shared accelerators as well as multiple (3, 4 etc) unique kernels for unique workloads in the program)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Buyuktosunoglu as both are directed to recognizing redundant workloads for hardware accelerators and Buyuktosunoglu recognized where the consolidating of redundant workloads provides a system wherein “final selection of the most optimized/best merged instruction sequence blocks may be provided/affected using a programmable (parameterized) benefit scoring formula.” (¶25)
Regarding Claim 5, the LATTE ’21 paper does not teach, but Buyuktosunoglu teaches:
5. The method of claim 4, wherein the design for the electronic circuit includes a fourth dedicated hardware kernel corresponding to hardware that is unique to a fourth workload of the plurality of workloads, and the shared hardware kernel further corresponds to hardware that is common to the first workload, the second workload, the third workload, and the fourth workload. (Buyuktlsunoglu Figs. 9 and 10, ¶¶106-114 describe the use of shared accelerators as well as multiple (3, 4 etc) unique kernels for unique workloads in the program)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Buyuktosunoglu as both are directed to recognizing redundant workloads for hardware accelerators and Buyuktosunoglu recognized where the consolidating of redundant workloads provides a system wherein “final selection of the most optimized/best merged instruction sequence blocks may be provided/affected using a programmable (parameterized) benefit scoring formula.” (¶25)
Regarding Claim 11, the LATTE ’21 paper teaches:
receiving source code, the source code indicating a plurality of workloads to be performed by an electronic circuit;(LATTE ’21 paper – e.g. Figure 2, Section Source Code into LLVM/Clang front-end of system to then be translated into AST)
generating a plurality of abstract syntax trees (ASTs) based on the source code, wherein respective ones of the plurality of ASTs include a plurality of nodes correspond to function instructions;(LATTE ’21 paper – e.g. Figure 2, Section 1 LLVM/Clang front-end of system to then be translated into AST and updated AST systemin CAST transformation)
and to output at least one candidate FFSA. (LATTE ’21 paper – e.g. Figure 2, Section 1 teaches outputting Accelerator Candidates at the end of the process show in Figure 2).
The LATTE ’21 paper does not teach, but FA-AST teaches:
generating a plurality of fingerprinting vectors corresponding to the plurality of ASTs, wherein respective ones of the plurality of fingerprinting vectors encode at least one of a number of nodes, a number of edges, a density, a computation intensity, an operands percentage, a control, or a data dependency;(FA-AST e.g. Sections I-IV, Fig. 2, teach generation of vector representations by a GNN ML system from flow-augmented-AST representations of source code. These particular AST’s argue augmented to represent control and data dependency by augmenting the edges represented in the AST to reflect such information, and subsequently transformed in vector representations of the code snippets, which, as a result of the FA-AST encode control and data dependency )
and providing the plurality of fingerprinting vectors to a machine learning (ML) model, wherein the ML model is configured to predict similarities between different ones of the plurality of workloads (FA-AST e.g. Sections I-IV, Fig. 2, teach generation of vector representations by a GNN ML system from flow-augmented-AST representations of source code. These particular AST’s argue augmented to represent control and data dependency by augmenting the edges represented in the AST to reflect such information, and subsequently transformed in vector representations of the code snippets, which, as a result of the FA-AST encode control and data dependency )
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of FA-AST as each is directed to AST-based detection of code similarity and the LATTE ’21 recognized “Many techniques from the compiler community can be applied to HLS
tools and improve the design process; applying machine learning techniques is one of these approaches.” (LATTE ’21 Paper Section 3.1)
the LATTE ’21 further does not teach, but Buyuktosunoglu teaches:
11. A system for generating fixed function shared accelerators (FFSAs), the system comprising: at least one electronic processor;(16, Fig. 4 )
( )
a memory operatively connected to the at least one electronic processor, the memory storing instructions that, when executed by the at least one electronic processor, cause the system to perform operations (28, Fig. 4)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Buyuktosunoglu as both are directed to recognizing redundant workloads for hardware accelerators and Buyuktosunoglu recognized where the consolidating of redundant workloads provides a system wherein “final selection of the most optimized/best merged instruction sequence blocks may be provided/affected using a programmable (parameterized) benefit scoring formula.” (¶25)
Regarding Claim 12, the LATTE ’21 paper teaches:
12. The system of claim 11, the operations further including generating a design for the electronic circuit to include at least one FFSA based on the at least one candidate FFSA. (LATTE ’21 paper – e.g. Figure 2, Section 1 teaches outputting Accelerator Candidates at the end of the process show in Figure 2 and the Abstract, and Section 3 also describe incorporation of these candidates in circuit design in HLS systems).
Regarding Claim 13, the LATTE ’21 paper teaches:
13. The system of claim 11, wherein the design for the electronic circuit includes a first dedicated hardware kernel corresponding to hardware that is unique to a first workload of the plurality of workloads, a second dedicated hardware kernel corresponding to hardware that is unique to a second workload of the plurality of workloads, and a shared hardware kernel corresponding to hardware that is common to the first workload and the second workload. (LATTE ’21 paper – e.g. Figure 1, Section 1 – Fig. 1 shows the use of shared elements in shared accelerator design, as well as separate unique kenerls for separate workloads)
Regarding Claim 14, the LATTE ’21 paper does not teach, but Buyuktosunoglu teaches:
14. The system of claim 13, wherein the design for the electronic circuit includes a third dedicated hardware kernel corresponding to hardware that is unique to a third workload of the plurality of workloads, and the shared hardware kernel further corresponds to hardware that is common to the first workload, the second workload, and the third workload. .(Buyuktlsunoglu Figs. 9 and 10, ¶¶106-114 describe the use of shared accelerators as well as multiple (3, 4 etc) unique kernels for unique workloads in the program)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Buyuktosunoglu as both are directed to recognizing redundant workloads for hardware accelerators and Buyuktosunoglu recognized where the consolidating of redundant workloads provides a system wherein “final selection of the most optimized/best merged instruction sequence blocks may be provided/affected using a programmable (parameterized) benefit scoring formula.” (¶25)
Regarding Claim 15, the LATTE ’21 paper does not teach, but Buyuktosunoglu teaches:
15. The system of claim 14, wherein the design for the electronic circuit includes a fourth dedicated hardware kernel corresponding to hardware that is unique to a fourth workload of the plurality of workloads, and the shared hardware kernel further corresponds to hardware that is common to the first workload, the second workload, the third workload, and the fourth workload. (Buyuktlsunoglu Figs. 9 and 10, ¶¶106-114 describe the use of shared accelerators as well as multiple (3, 4 etc) unique kernels for unique workloads in the program)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Buyuktosunoglu as both are directed to recognizing redundant workloads for hardware accelerators and Buyuktosunoglu recognized where the consolidating of redundant workloads provides a system wherein “final selection of the most optimized/best merged instruction sequence blocks may be provided/affected using a programmable (parameterized) benefit scoring formula.” (¶25)
Claim(s) 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) as applied above in view of “Wu” (Wu, Yueming, et al. "Detecting semantic code clones by building AST-based Markov chains model." Proceedings of the 37th IEEE/ACM International Conference on Automated Software Engineering. 2022.).
Regarding Claim 6, the LATTE ’21 paper does not teach, but Wu teaches:
6. The method of claim 1, wherein the ML model is an unsupervised ML classification model. (Wu teaches detection of similar code segments using various ML algorthms including e.g. KNN as described in Section 4.5. KNN is a type described as unsupervised in applicant’s specification).
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Wu as each is directed similarity detection systems and Wu recognized limitations in scalability of some tree-based clone detection and aimed to “design Amain, a scalable tree-based semantic code clone detector by building Markov chains models.” (Wu Abstract).
Regarding Claim 7, the LATTE ’21 paper does not teach, but Wu teaches:
7. The method of claim 6, wherein the unsupervised ML classification model is at least one of a k-nearest neighbors (KNN) model or a nearest centroid classifier (NCC) model. (Wu teaches detection of similar code segments using various ML algorthms including e.g. KNN as described in Section 4.5. KNN is a type described as unsupervised in applicant’s specification).
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Wu as each is directed similarity detection systems and Wu recognized limitations in scalability of some tree-based clone detection and aimed to “design Amain, a scalable tree-based semantic code clone detector by building Markov chains models.” (Wu Abstract).
Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) and further in view of “Buyuktosunoglu” (US PG Pub 2021/0303306). as applied above in view of “Wu” (Wu, Yueming, et al. "Detecting semantic code clones by building AST-based Markov chains model." Proceedings of the 37th IEEE/ACM International Conference on Automated Software Engineering. 2022.)
Regarding Claim 16, the LATTE ’21 paper does not teach, but Wu teaches:
16. The system of claim 11, wherein the ML model is an unsupervised ML classification model. (Wu teaches detection of similar code segments using various ML algorthms including e.g. KNN as described in Section 4.5. KNN is a type described as unsupervised in applicant’s specification).
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Wu as each is directed similarity detection systems and Wu recognized limitations in scalability of some tree-based clone detection and aimed to “design Amain, a scalable tree-based semantic code clone detector by building Markov chains models.” (Wu Abstract).
Regarding Claim 17, the LATTE ’21 paper does not teach, but Wu teaches:
17. The system of claim 16, wherein the unsupervised ML classification model is at least one of a k-nearest neighbors (KNN) model or a nearest centroid classifier (NCC) model. (Wu teaches detection of similar code segments using various ML algorthms including e.g. KNN as described in Section 4.5. KNN is a type described as unsupervised in applicant’s specification).
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Wu as each is directed similarity detection systems and Wu recognized limitations in scalability of some tree-based clone detection and aimed to “design Amain, a scalable tree-based semantic code clone detector by building Markov chains models.” (Wu Abstract).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) and in view of “Wu” (Wu, Yueming, et al. "Detecting semantic code clones by building AST-based Markov chains model." Proceedings of the 37th IEEE/ACM International Conference on Automated Software Engineering. 2022.) as applied above and further in view of “Sheneamer” (Sheneamer, Abdullah, et al. "Schemes for labeling semantic code clones using machine learning." 2017 16th IEEE International Conference on Machine Learning and Applications (ICMLA). IEEE, 2017.”)
Regarding Claim 8, the LATTE ’21 paper does not teach, but Sheneamer teaches:
8. The method of claim 6, further comprising verifying an output of the ML model using a set of results generated by graph isomorphism. (Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to unsupervised ML results in scheme 2)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature
and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) and further in view of “Buyuktosunoglu” (US PG Pub 2021/0303306) and in view of “Wu” (Wu, Yueming, et al. "Detecting semantic code clones by building AST-based Markov chains model." Proceedings of the 37th IEEE/ACM International Conference on Automated Software Engineering. 2022.) as applied above and further in view of “Sheneamer” (Sheneamer, Abdullah, et al. "Schemes for labeling semantic code clones using machine learning." 2017 16th IEEE International Conference on Machine Learning and Applications (ICMLA). IEEE, 2017.”)
Regarding Claim 18, the LATTE ’21 paper does not teach, but Sheneamer teaches:
18. The system of claim 16, the operations further including verifying an output of the ML model using a set of results generated by graph isomorphism.
(Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to unsupervised ML results in scheme 2)
In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature
and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) as applied above and further in view of “Sheneamer” (Sheneamer, Abdullah, et al. "Schemes for labeling semantic code clones using machine learning." 2017 16th IEEE International Conference on Machine Learning and Applications (ICMLA). IEEE, 2017.”)
Regarding Claim 9, the LATTE ’21 paper does not teach, but Sheneamer teaches:
9. The method of claim 1, wherein the ML model is a supervised ML classification model. (Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to supervised (e.g. RF) ML results in scheme 2) In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature
and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Regarding Claim 10, the LATTE ’21 paper does not teach, but Sheneamer teaches:
10. The method of claim 9, wherein the ML model has been trained using a set of labeled training results generated by graph isomorphism. (Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to supervised (e.g. RF) ML results in scheme 2) In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Claim(s) 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over “LATTE ’21 (Mokri, Parnian, and Mark Hempstead. "Improving HLS with Shared Accelerators: A Retrospective." Workshop on Languages, Tools, and Techniques for Accelerator Design (April 15, 2021) available at , <https://capra.cs.cornell.edu/latte21/paper/7.pdf> in view of “FA-AST” (Wang, Wenhan, et al. "Detecting code clones with graph neural network and flow-augmented abstract syntax tree." 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020.) and further in view of “Buyuktosunoglu” (US PG Pub 2021/0303306) as applied above and further in view of “Sheneamer” (Sheneamer, Abdullah, et al. "Schemes for labeling semantic code clones using machine learning." 2017 16th IEEE International Conference on Machine Learning and Applications (ICMLA). IEEE, 2017.”)
Regarding Claim 19, the LATTE ’21 paper does not teach, but Sheneamer teaches:
19. The system of claim 11, wherein the ML model is a supervised ML classification model. . (Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to supervised (e.g. RF) ML results in scheme 2) In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Regarding Claim 20, the LATTE ’21 paper does not teach, but Sheneamer teaches:
20. The system of claim 19, wherein the ML model has been trained using a set of labeled training results generated by graph isomorphism. . (Sheneamer e.g. Scheme I, Fig 2, Pages 981-984 teaches using data from AST and program dependence graph to encode vectors which represent the structure of the code fragments and use these for creating labels which are then used to apply to supervised (e.g. RF) ML results in scheme 2) In addition, it would have been obvious to one of obvious skill in the art prior to the filing date of the application to combine the teachings of the LATTE ’21 paper with those of Sheneamer as each is directed to clone detection and Sheneamer recognized “A majority of the publicly available code clone corpora are incomplete in nature and lack labeled samples for semantic or Type-IV clones” (Sheneamer Abstract).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art cited in the attached PTO-892 form includes prior art relevant to the disclosures in the application related to similar code detection and accelerator generation.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW J BROPHY whose telephone number is (571)270-1642. The examiner can normally be reached Monday-Friday, 9am-4:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wei Zhen can be reached at 571-272-3708. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MJB
9/10/2026
/MATTHEW J BROPHY/Primary Examiner, Art Unit 2191
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