Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Arguments
Applicant’s arguments filed 12/24/2025 have been fully considered but they are not persuasive.
The applicant argues that none of the cited references teaches the limitation as amended in claim 1. The examiner respectfully disagrees. Wanatabe et al. (figure 2) teaches a light shielding element and the light shielding element is attached to at least a portion of the second surface and the third surface, and the at least a portion of the first surface and the at least a portion of the second surface are disposed between the second substrate and the light shielding element (17-18; see at least column 2, lines 62-68 and column 3, lines 1-6), shielding the second sub side surface and at least a portion of the circuit, wherein the circuit (17) is in contact with the first sub side surface (via the conductive elements), and is not in direct contact with the first inner surface and the second inner surface (21a and 21b). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the color filter as taught by Wanatabe et al. in order to prevent IC chip and films and leads from corrosion, and to prevent leakage between the leads. The claim language therefore does not patentably distinguish over the applied reference[s], and the previous rejections are maintained.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6, 8 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (KR 2019-0083014) in view of Wanatabe et al. (US 4,643,526).
Regarding claim 1, Lee et al. (figures 8a-8b) discloses an electronic device, comprising:
a panel, comprising a first substrate and a second substrate disposed opposite to the first substrate (110 and 120), wherein the first substrate has a first sub side surface, the second substrate has a second sub side surface substantially aligned with the first subside surface, and the first sub side surface and the second sub side surface are parallel to a normal direction of the electronic device in a cross-section view;
a circuit (SP1, 231, 233), wherein at least a portion of the circuit is attached corresponding to the first sub side surface and the second sub side surface, and extends along the normal direction of the electronic device; and
wherein the circuit comprises a first surface, a second surface, and a third surface connected between the first surface and the second surface, the first surface and the second surface are opposite to each other and extend along the normal direction wherein at least a portion of the first surface is attached to the second substrate.
Lee et al. discloses the limitations as shown in the rejection of claim 1 above. However, Lee et al. is silent regarding a light shielding element. Wanatabe et al. (figure 2) teaches a light shielding element and the light shielding element is attached to at least a portion of the second surface and the third surface, and the at least a portion of the first surface and the at least a portion of the second surface are disposed between the second substrate and the light shielding element (17-18; see at least column 2, lines 62-68 and column 3, lines 1-6), shielding the second sub side surface and at least a portion of the circuit, wherein the circuit (17) is in contact with the first sub side surface (via the conductive elements), and is not in direct contact with the first inner surface and the second inner surface (21a and 21b). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the color filter as taught by Wanatabe et al. in order to prevent IC chip and films and leads from corrosion, and to prevent leakage between the leads.
Regarding claim 2, Wanatabe et al. (figure 2) discloses a wire layer (13b) disposed on the first substrate.
Regarding claim 6, Wanatabe et al. (figure 2) discloses wherein the wire layer is electrically connected to the circuit.
Regarding claim 8, Wanatabe et al. (figure 2) discloses wherein the second substrate comprises a top surface perpendicular to the second sub side surface, and in a cross-sectional view, the light shielding element covers an edge of the circuit in a normal direction of the top surface of the second substrate.
Claims 3-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. in view of Wanatabe et al.; further in view of Yamazaki et al. (US 2016/0154268).
Regarding claim 3, Lee et al. discloses the limitations as shown in the rejection of claim 2 above. However, Lee et al. is silent regarding comprising a color filter layer disposed on the second substrate. Yamazaki et al. (figure 25) teaches comprising a color filter layer (736) disposed on the second substrate. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the color filter as taught by Yamazaki et al. in order to achieve a color display device and improve the display characteristics.
Regarding claim 4, Yamazaki et al. (figure 25) teaches wherein the color filter layer and the wire layer are facing to each other (g1, d1).
Regarding claim 5, Yamazaki et al. (figure 25) teaches a black matrix layer (738), wherein the color filter layer is surrounded by the black matrix layer.
Regarding claim 7, Yamazaki et al. (figure 25) teaches a light-emitting diode overlapped with the first substrate (see at least paragraph 0452).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAUREN NGUYEN whose telephone number is (571)270-1428. The examiner can normally be reached on Monday - Thursday, 8:00 AM -6:00 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Carruth, can be reached at 571-272-9791. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LAUREN NGUYEN/Primary Examiner, Art Unit 2871