DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1-11 objected to because of the following informalities:
As to claim 1, it is not in proper form, such as not using “comprising” to introduce elements
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
2. Claims 1–20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., an abstract idea) without significantly more.
Representative Claim 12 recites: A method comprising the following steps:
a) receive, based at least in part on an input signal, an output signal from a device under testing (DUT);
b) generate a noise signal based at least in part on the input signal and the output signal;
c) generate a recovered signal based at least in part on the output signal and the noise signal;
d) generate a signal to noise power ratio based at least in part on the recovered signal and the noise signal; and
e) generate a performance metric for the DUT based at least in part on a comparison between the signal to noise power ratio and a predetermined power threshold.
The claim limitations in the abstract idea have been highlighted in steps a-e above. The remaining limitations are treated as additional elements.
3. Step 1 – Statutory Category
Under Step 1 of the eligibility analysis, we determine whether the claims are directed to a statutory category by considering whether the claimed subject matter falls within one of the four statutory categories of patent eligible subject matter identified by 35 U.S.C. 101: process, machine, manufacture, or composition of matter. Claim 12 is directed to a process, which is a statutory category. Claims 1 and 17 are directed to a machine (controller and system), which is also a statutory category.
4. Step 2A Prong One – Judicial Exception
Under Step 2A Prong One, we determine whether the claim recites a judicial exception.
In Claim 12, the highlighted limitations constitute an abstract idea because, under a broadest reasonable interpretation, they recite limitations that fall within the abstract idea groupings identified in the 2019 Revised Patent Subject Matter Eligibility Guidance, including the following.
A. Mental processes (observation, evaluation, judgment). The steps of: receiving an output signal; generating a noise signal; generating a recovered signal; generating a signal to noise power ratio; and generating a performance metric represent the collection, mathematical manipulation, evaluation, and judgment of signal data.
Under a broadest reasonable interpretation, these steps correspond to observing input and output signals, performing calculations to isolate noise and recover a signal, computing a ratio, comparing the result to a threshold, and determining a performance metric. Such activities can be performed mentally or using routine information processing techniques.
For example, a technician could manually receive known input and output signal values (e.g., from a test bench or oscilloscope), calculate a noise component (e.g., by subtraction or simple filtering on paper), recover the underlying signal, compute a power ratio using basic arithmetic, compare the ratio to a predetermined threshold, and judge the device performance—all without any computer or specialized hardware.
B. Mathematical concepts
Each of steps b–e is a mathematical calculation or relationship:
• generating a noise signal and recovered signal is a mathematical operation (e.g., subtraction or filtering of data streams);
• generating a signal-to-noise power ratio is a classic mathematical ratio calculation;
• generating a performance metric by comparison to a threshold is a mathematical relationship.
These are precisely the type of mathematical concepts identified in the PEG as abstract ideas. See MPEP 2106.04(a)(2); *SAP America, Inc. v. InvestPic, LLC*, 898 F.3d 1161 (Fed. Cir. 2018).
C. Certain methods of organizing human activity
The claimed steps also correspond to organizing a routine testing and evaluation process for electronic devices through systematic data collection, analysis, and reporting of performance metrics. Collecting signals, performing calculations, and generating a performance determination represent a routine testing, aggregation, and reporting scheme.
Under a broadest reasonable interpretation, these limitations cover performance of the claimed method through observation, evaluation, calculation, and judgment of signal data, either mentally or through routine calculations.
Accordingly, Claim 12 recites a judicial exception.
5. Step 2A Prong Two – Practical Application
Under Step 2A Prong Two, we determine whether the claim recites additional elements that integrate the judicial exception into a practical application.
Claim 12 comprises the following additional elements:
A. a device under testing (DUT)
These elements represent generic electronic devices used to perform the abstract idea.
The device under testing (DUT) is recited at a high level of generality and is used merely as a tool to gather signal data and automate the abstract idea.
These elements therefore constitute insignificant extra-solution activity, including:
• gathering signal data from a device
• performing routine signal processing operations
According to the October 2019 Update on Subject Matter Eligibility, such steps are performed in order to gather data used in the abstract idea and therefore represent extra-solution activity that does not integrate the judicial exception into a practical application.
Furthermore, the claim does not recite:
• an improvement to computer functionality;
• an improvement to signal processing hardware or testing circuitry;
• a particular technological improvement to ADC or BIST systems beyond the abstract calculations (note that the specification describes certain technical advantages such as on-chip notch IIR filtering, accumulators, and phase-independent time-domain testing, but none of these concrete features are recited in the independent claims).
Instead, the claim merely applies generic testing of a device to automate the abstract idea of calculating signal-to-noise metrics. The recited steps represent conventional implementations of performance testing and data analysis in mixed-signal devices.
Accordingly, Claim 12 does not integrate the abstract idea into a practical application.
Therefore, Claim 12 is directed to a judicial exception and requires further analysis under Step 2B.
6. Step 2B – Significantly More
Under Step 2B, we determine whether the claim includes additional elements that amount to significantly more than the judicial exception.
Claim 12 does not include additional elements sufficient to amount to significantly more than the judicial exception because the additional elements are well-understood, routine, and conventional in the relevant art.
In particular, the use of a device under test to output signals, calculating noise/recovered signals, computing signal-to-noise ratios, and comparing to thresholds for performance evaluation is conventional in built-in self-test (BIST) systems for ADCs and digital devices.
For example, Toner et al. (“A BIST Scheme for an SNR Test of a Sigma-Delta ADC,” IEEE Transactions on Circuits and Systems II, 1993) discloses a digital notch filter used to directly extract SNR from an ADC output in a BIST environment by isolating noise and computing power ratios—precisely the type of routine signal-processing steps recited here. Similar conventional BIST techniques for SNR calculation in sigma-delta ADCs using noise extraction and ratio computation are also shown in Li et al. (“A BIST Strategy for Mixed-Signal Circuits,” 2005).
The specification itself acknowledges that such signal-processing operations were known (see, e.g., ¶¶ [0004]–[0010], [0028]–[0035] of US 2025/0068538 A1).
Accordingly, the additional elements, individually and as an ordered combination, amount to nothing more than implementing abstract mathematical calculations using conventional device testing components.
Therefore, Claim 12 does not include significantly more than the judicial exception and is not patent eligible under 35 U.S.C. 101.
7. Dependent Claims 1–11 and 13–20 are rejected under 35 U.S.C. 101 for similar reasons. The dependent claims recite additional limitations that merely expand upon the abstract idea of receiving signals, mathematically generating noise/recovered signals, computing ratios, and determining performance metrics and do not add meaningful limitations that integrate the judicial exception into a practical application or amount to significantly more.
• Claims 1 and 17 recite a controller and system performing the same abstract method.
• Claims 2–11 and 13–16 recite further details such as specific filter types (e.g., notch IIR filter), accumulator sizes, PDM sinusoid generation, or specific ADC types. Even these details amount to further specification of the mathematical operations and use of generic hardware components without providing a technological improvement.
• Claims 18–20 recite similar system-level implementations of the abstract method.
These limitations do not add meaningful technical features beyond generic signal processing and data calculation steps.
Accordingly, Claims 1–20 do not recite additional elements that integrate the judicial exception into a practical application or amount to significantly more, for substantially the same reasons discussed with respect to Claim 12.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-11, 12-16, 17-20 are rejected under 35 U.S.C. § 103 as being unpatentable over Speir et al. (US 9,654,133 hereinafter Speir)
Regarding claim 1:
Speir discloses in Figs. 1-29, a controller configured to (uP 1008 as shown in Fig. 10); receive, based at least in part on an input signal, an output signal from a device under testing (DUT) (main converter 1002 as shown in Fig. 10); generate a noise signal based at least in part on the input signal and the output signal (multiplier/filter as shown in Fig. 20); generate a recovered signal based at least in part on the output signal and the noise signal (subtraction 2602 as shown in Fig. 26); generate a signal to noise power ratio based at least in part on the recovered signal and the noise signal (MDP computation as shown in Fig. 20); and generate a performance metric for the DUT based at least in part on a comparison between the signal to noise power ratio and a predetermined power threshold (registers 2908 as shown in Fig. 29).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Speir's on-chip uP controller for the claimed functions, as Speir provides a flexible BIST framework for ADC testing, reducing errors and validating SNR without external tools (abstract).
Regarding claim 2: Speir discloses in Figs. 1-29, wherein the performance metric is a signal to noise (SNR) metric (uP 1008 as shown in Fig. 10).
Regarding claim 3: Speir discloses in Figs. 1-29, wherein the predetermined power threshold is one of a plurality of predetermined power thresholds that are stored in a lookup table and each of the plurality of predetermined power thresholds are indicative of a respective threshold SNR metric (LUT [look_up _table] as shown in Fig. 23A-B).
Regarding claim 4: Speir discloses in Figs. 1-29, wherein generating the signal to noise power ratio comprises: generating, using a first power accumulator, a signal power based at least in part on the recovered signal (accumulation/decimation 2604/2606 as shown in Fig. 26); generating, using a second power accumulator, a noise power based at least in part on the noise signal (averager as shown in Fig. 21); and generating the signal to noise power ratio based at least in part on the signal power and the noise power (MDP computation as shown in Fig. 20).
Regarding claim 5: Speir discloses in Figs. 1-29, wherein generating the noise signal comprises: extracting, using a notch infinite impulse response (IIR) filter, the noise signal from the output signal (low-pass filter as shown in Fig. 20).
Regarding claim 6: Speir discloses in Figs. 1-29, wherein generating the recovered signal comprises: subtracting the noise signal from the output signal (subtraction circuit 2602 as shown in Fig. 26).
Regarding claim 7: Speir discloses in Figs. 1-29, wherein the recovered signal and the noise signal are accumulated for a 1024 sample (accumulation/decimation as shown in Fig. 22).
Regarding claim 8: Speir discloses in Figs. 1-29, further configured to: output the performance metric (uP 1008 as shown in Fig. 10).
Regarding claim 9: Speir discloses in Figs. 1-29, wherein the input signal is a sinusoid and the controller is further configured to generate the input signal by at least: generating a modulated pulse (dither generator 1902 as shown in Fig. 19); and filtering the modulated pulse to generate the sinusoid (correlation filter as shown in Fig. 20).
Regarding claim 10: Speir discloses in Figs. 1-29, wherein the controller and the DUT are part of the same mixed-signal system and the controller is configured to test the DUT without external control (uP 1008 and converter 1002 as shown in Fig. 10).
Regarding claim 11: Speir discloses in Figs. 1-29, wherein the DUT is a continuous-time sigma-delta analog to digital converter (sigma-delta via oversampling as shown in Fig. 19).
Regarding claim 12:
Speir discloses in Figs. 1-29, a method comprising: receiving, based at least in part on an input signal, an output signal from a device under testing (DUT) (main converter 1002 as shown in Fig. 10); generating a noise signal based at least in part on the input signal and the output signal (multiplier/filter as shown in Fig. 20); generating a recovered signal based at least in part on the output signal and the noise signal (subtraction 2602 as shown in Fig. 26); generating a signal to noise power ratio based at least in part on the recovered signal and the noise signal (MDP as shown in Fig. 20); and generating a performance metric for the DUT based at least in part on a comparison between the signal to noise power ratio and a predetermined power threshold (registers 2908 as shown in Fig. 29).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Speir's on-chip uP controller for the claimed functions, as Speir provides a flexible BIST framework for ADC testing, reducing errors and validating SNR without external tools (abstract).
Regarding claim 13: Speir discloses in Figs. 1-29, wherein the performance metric is a signal to noise (SNR) metric (uP 1008 as shown in Fig. 10).
Regarding claim 14: Speir discloses in Figs. 1-29, wherein the predetermined power threshold is one of a plurality of predetermined power thresholds that are stored in a lookup table and each of the plurality of predetermined power thresholds are indicative of a respective threshold SNR metric (LUT as shown in Fig. 23A-B).
Regarding claim 15: Speir discloses in Figs. 1-29, wherein generating the signal to noise power ratio comprises: generating, using a first power accumulator, a signal power based at least in part on the recovered signal (accumulation/decimation 2604/2606 as shown in Fig. 26); generating, using a second power accumulator, a noise power based at least in part on the noise signal (averager as shown in Fig. 21); and generating the signal to noise power ratio based at least in part on the signal power and the noise power (MDP as shown in Fig. 20).
Regarding claim 16: Speir discloses in Figs. 1-29, wherein generating the noise signal comprises: extracting, using a notch infinite impulse response (IIR) filter, the noise signal from the output signal (low-pass filter as shown in Fig. 20).
Regarding claim 17:
Speir discloses in Figs. 1-29, a system comprising: a device under testing (DUT) (main converter 1002 as shown in Fig. 10); and a controller, wherein the controller is configured to (uP 1008 as shown in Fig. 10); receive, based at least in part on an input signal, an output signal from the DUT (main converter 1002 as shown in Fig. 10); generate a noise signal based at least in part on the input signal and the output signal (multiplier/filter as shown in Fig. 20); generate a recovered signal based at least in part on the output signal and the noise signal (subtraction 2602 as shown in Fig. 26); generate a signal to noise power ratio based at least in part on the recovered signal and the noise signal (MDP as shown in Fig. 20); and generate a performance metric for the DUT based at least in part on a comparison between the signal to noise power ratio and a predetermined power threshold (registers 2908 as shown in Fig. 29).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Speir's on-chip uP controller for the claimed functions, as Speir provides a flexible BIST framework for ADC testing, reducing errors and validating SNR without external tools (abstract).
Regarding claim 18: Speir discloses in Figs. 1-29, wherein the DUT is a continuous-time sigma-delta analog to digital converter (sigma-delta via oversampling as shown in Fig. 19).
Regarding claim 19: Speir discloses in Figs. 1-29, wherein the input signal is a sinusoid and the controller is further configured to generate the input signal by at least: generating a modulated pulse (dither generator 1902 as shown in Fig. 19); and filtering the modulated pulse to generate the sinusoid (correlation filter as shown in Fig. 20).
Regarding claim 20: Speir discloses in Figs. 1-29, wherein the system is a system on a chip (SoC) or a system in a package (SiP) (on-chip system as shown in Fig. 10).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUNG X NGUYEN whose telephone number is (571)272-1967. The examiner can normally be reached 10:30am-6:30pm M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at 571-272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TUNG X NGUYEN/Primary Examiner, Art Unit 2858 3/6/26
Prosecution Insights