DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
2. Claims 10-12, 15 and 17-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Sakai et al. U.S. Patent Application Publication 2008/0179747 A1 (the ‘747 reference).
The reference discloses in Fig. 7, para [34] (paragraph(s) [0034]) and other text a semiconductor device as claimed.
Referring to claim 10, the ‘747 reference discloses a semiconductor device, comprising:
a lower wiring structure (generally indicated at 10 (~10)), which includes a lower barrier film (not labeled) and a lower filling film (10) and disposed within a lower interlayer insulating film (11);
an upper interlayer insulating film (12) disposed on the lower interlayer insulating film (11), said upper interlayer insulating film (12) having an upper wiring trench (16, para [36]) therein; and
an upper wiring structure (20/31/40) disposed within the upper wiring trench and is electrically connected to the lower wiring structure (~10), said upper wiring structure including an upper barrier film (20, para [38]), an upper filling film (40, para [48]), and an upper liner (31, para [50]) extending between the upper barrier film (20) and the upper filling film (40);
wherein the upper barrier film (20) includes tantalum nitride (para [38]: “barrier film 20 is a material containing at least one of the following metals: tantalum (Ta), tungsten (W), titanium (Ti), zirconium (Zr), ruthenium (Ru), and nitrides of these metals”);
wherein the upper liner (31) includes manganese (Mn) (para [50]), and extends along a sidewall of the upper wiring trench (16) but not along a lower surface (a lowermost surface) of the upper wiring trench (16).
Referring to claim 11, the reference further discloses that the upper barrier film (20) includes a sidewall portion extending along a sidewall of the upper wiring trench, and a bottom portion (a middle bottom portion) extending along a lower surface (a middle lower surface) of the upper wiring trench (16).
Referring to claim 12, the reference further discloses that each of the sidewall portion of the upper barrier film (20) and the bottom portion of the upper barrier film (20) is made of tantalum nitride (para [38]).
Referring to claim 15, Fig. 7 depicts that a thickness of the sidewall portion of the upper barrier film (20) is about equal to or greater than - meeting the claim limitation “equal to or greater than” - a thickness of the bottom portion (the middle bottom portion) of the upper barrier film (20).
Referring to claim 17, the reference further discloses that the upper barrier film (20) extends along a sidewall of the upper wiring trench (16), but does not extend along a lower surface (a lowest surface) of the upper wiring trench (16); and wherein the upper filling film (40) is in contact with an upper surface of the lower filling film (10).
Referring to claim 18, the reference further discloses that the upper liner (31) includes manganese oxide (para [50]: “a manganese oxide (MnOx) reaction layer 31”).
Allowable Subject Matter
3. Claims 1-9 and 19-20 are allowable over the prior art of record.
Claims 13-14 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious a semiconductor device with all exclusive limitations as recited in claims 1, 13, 14, 16 and 19, which may be characterized (claim 1) in that the sidewall portion of the upper barrier film includes tantalum nitride doped with manganese (Mn), (claim 13) the sidewall portion of the upper barrier film is made of tantalum nitride doped with ruthenium (Ru), but the bottom portion of the upper barrier film is made of tantalum nitride that is free of ruthenium, (claim 14) in that each of the sidewall portion of the upper barrier film and the bottom portion of the upper barrier film is made of ruthenium-doped tantalum nitride, (claim 16) the lower wiring structure further includes a lower capping film in contact with an upper surface of the lower filling film, and in that the upper barrier film is in contact with the upper surface of the lower filling film, and (claim 19) in that each of the sidewall portion of the upper barrier film and the lower barrier film includes tantalum nitride doped with manganese (Mn), and in that the bottom portion of the upper barrier film includes manganese.
Conclusion
4. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff W Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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08-01-2026
/TU-TU V HO/Primary Examiner, Art Unit 2818
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