DETAILED ACTION
The instant action is in response to application 9 July 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Priority
Acknowledgment is made of applicant's claim for priority based on a provisional application filed April 23 2024.
Claim Objections
Claims 1, 3, 4, 9-16, 20 have “ones of the plurality”. This appears to mean “one of the plurality”. The specification makes clear what is meant, so this does not rise to the level of a 112(b), appropriate single/plural terms must be properly distinguished. Appropriate correction is required.
Claims 15-16 are objected to for the following informalities: They appear to refer back to the TEL circuit of claim 13, rather than the SIMO converter of claim 13.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6, 7, 18, 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph.
As to claim 6, applicant claims “at least one of said source transistors and sink transistors”. As near as can be determined by the specification, applicant meant to claim “at least one of said source transistors or sink transistors”. This is because the drawings suggest that only one conditional transient (overvoltage/undervoltage) will be held at the same time, and also because activating both transistors would merely cause a shoot through. For the purposes of examination, it will be assumed only either the sink or source activates.
As to claim 18, applicant refers back to a method of an apparatus claims. Methods and apparatuses are generally separate. For the purposes of examination, it will be assumed applicant meant to claim “The method of claim 17” rather than “the method of claim 13”.
Claims 7, 19 depend directly or indirectly from a rejected claim and are, therefore, also rejected under 35 USC 112(b) , or 35 U.S.C. 112 (pre-AIA ) second paragraph for the reasons set above.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. (The claims have been condensed.)
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-20 are rejected under 35 U.S.C. 102(a)(1) and 102 (a)(2) as being anticipated by Mok (WO 2009117614).
As to claim 1, Mok discloses (see image below, and note that each output stage houses each element, but only one element was labelled for clarity of the image) A single inductor multiple output (SIMO) converter comprising: an inductor having an inductor input terminal and an inductor output terminal; a plurality of output switches including respective input terminals and respective output terminals, said respective input terminals of the plurality of output switches being electrically connected to the inductor output terminal, said output terminals of the plurality of output switches being electrically connected to corresponding ones of a plurality of loads; and a transient enhancement loop (TEL), said TEL including a code generator (comparators are 1bit ADCs) and a plurality of current sources, said code generator to detect a load transient event associated with one or more of the loads and activate at least one of the plurality of current sources, said plurality of current sources including respective source transistors and respective sink transistors electrically connected between respective ones of the output terminals of the plurality of output switches and corresponding ones of the plurality of loads, said respective source transistors being electrically connected to a source voltage, said respective sink transistors being electrically connected to a ground terminal.
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As to claim 2, Mok discloses a first input switch electrically connected to the inductor, said first input switch to connect the inductor to a supply voltage terminal, a second input switch electrically connected to the inductor, said second input switch to connect the inductor to a ground terminal (see image above, this is shown in the voltage regulator).
As to claim 3, Mok discloses said source transistors respectively to supply additional current to corresponding ones of the plurality of loads, said sink transistors respectively to reduce an amount of current supplied to corresponding ones of the plurality of loads (see image above).
As to claim 4, Mok discloses said TEL to sample output voltages between the output terminals of the plurality of output switches and corresponding ones of the plurality of loads to generate corresponding feedback voltages (see image above, the output is fed into the comparator along with a reference), said code generator including a plurality of comparators (see image above) to respectively receive a feedback voltage of the feedback voltages and a corresponding reference voltage.
As to claim 5, Mok discloses said plurality of comparators to respectively compare the corresponding received feedback voltage and the corresponding reference voltage and, based on the comparison, generate a code indicative of the transient event (the code turns on the source or sink transistor based on the value of the reference and feedback voltage).
As to claim 6, Mok discloses at least one of said plurality of current sources to compensate for a load variation condition associated with the load transient event, at least one of said source transistors and sink transistors of at least one of said plurality of sources to receive the code and to activate based on the transient event (see above the comparators cause the transistors to conduct based on the reference and output voltages).
As to claim 7, Mok discloses said load variation condition including at least one of voltage overshoot, voltage undershoot, or cross-regulation (under voltage and overvoltage are shown are explicitly shown, and Mod explicitly mentions cross regulation in ¶62).
As to claim 8, Mok discloses said plurality of comparators respectively electrically connected to gate terminals of the source transistors and sink transistors of the plurality of current sources, said plurality of current sources to compensate for a load variation condition associated with the load transient event, said source transistors and sink transistors of at least one of said plurality of current sources to receive the code from corresponding comparators of the plurality of comparators, the code being indicative of the transient event (see image above).
As to claim 9, Mok discloses wherein said load variation condition is voltage overshoot, said code to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see Fig. 8, which closes switches in order dependent upon detected transients).
As to claim 10, Mok discloses wherein said load variation condition is voltage overshoot, said code to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see Fig. 8, which closes switches in order dependent upon detected transients).
As to claim 11, Mok wherein said load variation condition is cross-regulation (¶62), said code to sequentially activate said source transistors of corresponding ones of the plurality of current sources and to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (Fig. 8, 816, 825).
As to claim 12, Mok discloses A method for operating a single inductor multiple output (SIMO) converter, comprising: sampling, by a transient enhancement loop (TEL), a plurality output voltages between a plurality of output switches and corresponding loads electrically connected to respective output terminals of the plurality of switches; detecting, by the TEL, a load transient event associated with one or more of the loads; generating, by a code generator of the TEL, a code indicative of the load transient event; and activating at least one of a plurality of current sources of the TEL based on the code, said plurality of current sources including respective source transistors and respective sink transistors electrically connected to respective ones of the output terminals of the plurality of output switches, said respective source transistors being electrically connected to a source voltage, said respective sink transistors being electrically connected to a ground terminal (this is similar to claim 1 above, with the only difference being that claim 12 includes reference voltages which are fed into the comparators as shown in the image above (Vhigh/Vlow)).
As to claim 13, Mok teaches said plurality of comparators corresponding respectively to the plurality of current sources, the plurality of comparators respectively electrically connected to respective gate terminals of the corresponding source transistors and sink transistors, said source transistors and sink transistors of at least one of said plurality of current sources to receive the code, the code being indicative of the transient event (se claim 8 above).
As to claim 14, Mok teaches wherein said load variation condition is voltage overshoot, said code to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see claim 9 above).
As to claim 15, Mok teaches wherein said load variation condition is voltage undershoot, said code to sequentially activate said source transistors of corresponding ones of the plurality of current sources (see claim 10 above).
As to claim 16, Mok teaches wherein said load variation condition is cross-regulation, said code to sequentially activate said source transistors of corresponding ones of the plurality of current sources and to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see claim 11 above).
As to claim 17-18, these are method claims corresponding to apparatus claims 4. Per MPEP 2112.02, these are anticipated for similar reasons.
As to claims 19-20 correspond to apparatus claim 5-6. Per MPEP 2112.02, these are anticipated for similar reasons.
Conclusion
Examiner has cited particular column, paragraph, and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M NOVAK whose telephone number is (571)270-1375. The examiner can normally be reached on 9AM-5PM,Monday through Thursday, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached on 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PETER M NOVAK/ Primary Examiner, Art Unit 2839