DETAILED ACTION
The instant action is in response to application 9 July 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Priority
Acknowledgment is made of applicant's claim for priority based on a provisional application filed April 23 2024.
Response to Arguments
The claim objections have been withdrawn.
The 112(b) rejection has been withdrawn.
Applicant’s arguments on the merits have been considered. The anticipation rejection has been withdrawn. However, the arguments are moot since they do not take into account the new reference Chang (US 10084465).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. (The claims have been condensed.)
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 are rejected under 35 U.S.C. 103 as being anticipated by Mok (WO 2009117614) in view of Chang (US 10084465).
As to claim 1, Mok discloses (see image below, and note that each output stage houses each element, but only one element was labelled for clarity of the image) A single inductor multiple output (SIMO) converter comprising: an inductor having an inductor input terminal and an inductor output terminal; a plurality of output switches including respective input terminals and respective output terminals, said respective input terminals of the plurality of output switches being electrically connected to the inductor output terminal, said output terminals of the plurality of output switches being electrically connected to corresponding ones of a plurality of loads; and a transient enhancement loop (TEL), said TEL including a code generator (comparators are 1bit ADCs) and a plurality of current sources, said code generator to detect a load transient event associated with one or more of the loads and activate at least one of the plurality of current sources, said plurality of current sources including respective source transistors and respective sink transistors electrically connected between a respective one of the output terminals of the plurality of output switches and a corresponding one of the plurality of loads, said respective source transistors being electrically connected to a source voltage, said respective sink transistors being electrically connected to a ground terminal.
Though Mok teaches a single current source and sink, he does not explicitly teach multiple current sources and sinks as shown by applicants Figure 3 and required by the amended claim. Rephrased, he does not explicitly teach each current source of said plurality of current sources including respective source transistors and respective sink transistors electrically connected between a respective one of the output terminals of the plurality of output switches and a corresponding one of the plurality of loads, said respective source transistors being electrically connected to a source voltage, said respective sink transistors being electrically connected to a ground terminal.
Chang teaches each current source of said plurality of current sources (Fig. 2, 211-219, 221-229) including respective source transistors (Fig. 2, SW11-SW19) and respective sink transistors (Fig. 2, SW21-29) electrically connected between a respective one of the output terminals, said respective source transistors being electrically connected to a source voltage (VDD symbol), said respective sink transistors being electrically connected to a ground terminal (GND symbol).
It would have been obvious to one of ordinary skill in the art at the time of invention to combine the teachings of Mok with Chang in order to increase the current that could be sourced or sunk during a transient event.
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As to claim 2, Mok in view of Chang teaches a first input switch electrically connected to the inductor, said first input switch to connect the inductor to a supply voltage terminal, a second input switch electrically connected to the inductor, said second input switch to connect the inductor to a ground terminal (see image above, this is shown in the voltage regulator).
As to claim 3, Mok in view of Chang teaches said source transistors respectively to supply additional current to corresponding ones of the plurality of loads, said sink transistors respectively to reduce an amount of current supplied to corresponding ones of the plurality of loads (see image above).
As to claim 4, Mok in view of Chang teaches said TEL to sample output voltages between the output terminals of the plurality of output switches and corresponding ones of the plurality of loads to generate corresponding feedback voltages (see image above, the output is fed into the comparator along with a reference), said code generator including a plurality of comparators (see image above) to respectively receive a feedback voltage of the feedback voltages and a corresponding reference voltage.
As to claim 5, Mok in view of Chang teaches said plurality of comparators to respectively compare the corresponding received feedback voltage and the corresponding reference voltage and, based on the comparison, generate a code indicative of the transient event (the code turns on the source or sink transistor based on the value of the reference and feedback voltage).
As to claim 6, Mok in view of Chang teaches at least one of said plurality of current sources to compensate for a load variation condition associated with the load transient event, at least one of said source transistors or sink transistors of at least one of said plurality of sources to receive the code and to activate based on the transient event (see above the comparators cause the transistors to conduct based on the reference and output voltages).
As to claim 7, Mok in view of Chang teaches said load variation condition including at least one of voltage overshoot, voltage undershoot, or cross-regulation (under voltage and overvoltage are shown are explicitly shown, and Mod explicitly mentions cross regulation in ¶62).
As to claim 8, Mok in view of Chang teaches said plurality of comparators respectively electrically connected to gate terminals of the source transistors and sink transistors of the plurality of current sources, said plurality of current sources to compensate for a load variation condition associated with the load transient event, said source transistors and sink transistors of at least one of said plurality of current sources to receive the code from corresponding comparators of the plurality of comparators, the code being indicative of the transient event (see image above).
As to claim 9, Mok in view of Chang teaches wherein said load variation condition is voltage overshoot, said code to sequentially activate said sink transistors the at least one of the plurality of current sources (This would be taught by the combination, with the multiple sources of Chang being activated in according to their reference, being used in the device of Mok).
As to claim 10, Mok in view of Chang teaches wherein said load variation condition is voltage undershoot, said code to sequentially activate said sink transistors the at least one of the plurality of current sources (This is similar to cliam 9 above with undershoot being taught rather than overshoot, which is shown in the annotated Figure above) ).
As to claim 11, Mok in view of Chang teaches wherein said load variation condition is cross-regulation (¶62), said code to sequentially activate said source transistors of the at least one the plurality of current sources and to sequentially activate said sink transistors of the at least one of the plurality of current sources (see explanations of claims 9/10 above).
As to claim 12, Mok in view of Chang teaches a transient enhancement loop (TEL) circuit, comprising: one or more input terminals to receive a plurality of reference voltages and a plurality of respective feedback voltages; a plurality output terminals electrically connected to corresponding ones of a plurality of loads, said feedback voltages respectively corresponding to respective voltages supplied to the plurality of loads; a code generator including a plurality of comparators, said plurality of comparators to compare respective ones of the plurality of reference voltages and respective ones of the plurality of feedback voltages, detect a load transient event associated with one or more of the loads based on the comparison, and generate a code indicative of the load transient event; and a plurality of current sources to compensate for a load variation condition caused by the load transient event, each current source of said plurality of current sources including respective source transistors and respective sink transistors electrically connected between a respective one of the output terminals and a corresponding one of the plurality of loads, said respective source transistors being electrically connected to a source voltage and to supply additional current to corresponding ones of the plurality of loads, said respective sink transistors being electrically connected to a ground terminal and to reduce an amount of current supplied to corresponding ones of the plurality of loads. (this is similar to claim 1 above, with the only difference being that claim 12 includes reference voltages which are fed into the comparators as shown in the image above (Vhigh/Vlow)).
As to claim 13, Mok in view of Chang teaches said plurality of comparators corresponding respectively to the plurality of current sources, the plurality of comparators respectively electrically connected to respective gate terminals of the corresponding source transistors and sink transistors, said source transistors and sink transistors of at least one of said plurality of current sources to receive the code, the code being indicative of the transient event (se claim 8 above).
As to claim 14, Mok in view of Chang teaches wherein said load variation condition is voltage overshoot, said code to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see claim 9 above).
As to claim 15, Mok in view of Chang teaches wherein said load variation condition is voltage undershoot, said code to sequentially activate said source transistors of corresponding ones of the plurality of current sources (see claim 10 above).
As to claim 16, Mok in view of Chang teaches wherein said load variation condition is cross-regulation, said code to sequentially activate said source transistors of corresponding ones of the plurality of current sources and to sequentially activate said sink transistors of corresponding ones of the plurality of current sources (see claim 11 above).
As to claim 17-18, these are method claims corresponding to apparatus claims 4. Per MPEP 2112.02, these are obvious for similar reasons.
As to claims 19-20 correspond to apparatus claim 5-6. Per MPEP 2112.02, these are obvious for similar reasons.
Conclusion
Examiner has cited particular column, paragraph, and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M NOVAK whose telephone number is (571)270-1375. The examiner can normally be reached on 9AM-5PM,Monday through Thursday, EST.
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/PETER M NOVAK/ Primary Examiner, Art Unit 2839
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