DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over US 9531528 B1 (Park et al., hereinafter Park) in view of US 20150063509 A1 (Hedayati et al., hereinafter Hedayati).
Regarding claim 1, Park discloses a radio frequency integrated circuit (RFIC) (col. 5, line 17, “implemented together in an integrated logic device or separately as discrete but interoperable logic devices”; col. 15, lines 35-39) comprising:
a first receive chain (Fig. 1 and col. 6, lines 11-19, “RX chain 120 includes an analog-to-digital converter (ADC) 122, an RX filter 124, a mixer 126, and a low-noise amplifier (LNA) 128”) configured to receive a first high-frequency input signal (Fig. 1, “RX Signal”), generate a first baseband signal based on the first high-frequency input signal by using a first downward frequency signal, and output the first baseband signal to a first output port (Fig. 1 and col. 6, lines 14-19, “The mixer 126 down-converts the RX signal from the carrier frequency to the baseband frequency, for example, by mixing the RX signal with the LO signal. The down-converted data signal is filtered by the RX filter 124, and then converted to a digital bitstream of RX data by the ADC 122”);
a first [local oscillator] configured to generate a first oscillation clock signal (Fig. 5, “LO21”);
a second [local oscillator] configured to generate a second oscillation clock signal (Fig. 5, “LO22”);
a first multiplexer (Fig. 5, “519”) configured to output one among the first oscillation clock signal or the second oscillation clock signal to a second output port based on an oscillation clock output selection signal (Fig. 5 and col. 16, lines 19-36, “M_Sel”, “LO21” or “LO22”);
a first input port (Fig. 5, port at “521”) configured to receive a third oscillation clock signal from an external source (Fig. 5, “LO23”); and a second multiplexer (Fig. 5, “528”) configured to output one among the first oscillation signal, the second oscillation signal or the third oscillation signal to the first receive chain as the first downward frequency signal based on a first downward frequency selection signal (“LO2B”).
Park does not specifically disclose the local oscillators.
In related art concerning blocker filtering for noise-cancelling receiver, Hedayati discloses local oscillators (par. [0066]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Hedayati’s explicit teachings about using local oscillators with the multi-chip beamforming device disclosed by Park because one of ordinary skill in the art would have recognized that local oscillators constitute a design consideration available to the inventor that would be advantageous in a design that requires tunable frequencies that can be adjusted over a range of frequencies to select different channels or bands.
Regarding claim 2, Park and Hedayati disclose all the limitations of claim 1. Park further discloses
a second receive chain (Fig. 5, “secondary TRX chain 524”) configured to receive a second high-frequency input signal (“RX Signal”),
generate a second baseband signal based on the second high-frequency input signal by using a second downward frequency signal (Fig. 1 and 5, where the second RF receiving chain is similar to the example receiving chain in Fig. 1), and
output the second baseband signal to a third output port (Fig. 1 and col. 6, lines 14-19, “The mixer 126 down-converts the RX signal from the carrier frequency to the baseband frequency…”); and
a third multiplexer (“529”) configured to output one among the first oscillation signal, the second oscillation signal or the third oscillation signal to the second receive chain as the second downward frequency signal based on a second downward frequency selection signal (LO2B”).
Regarding claim 5, Park and Hedayati disclose all the limitations of claim 1. Park further discloses
wherein the first receive chain comprises:
a low-noise amplifier configured to amplify the first high-frequency input signal to obtain an amplified first high-frequency input signal (Fig. 1, “LNA”); and a mixer configured to convert the amplified first high-frequency input signal output from the low-noise amplifier into the first baseband signal by using the first downward frequency signal (Fig. 1, “Mixer 126”).
Regarding claim 6, Park and Hedayati disclose all the limitations of claim 5.
Park does not specifically disclose wherein the first receive chain comprises: a balun between the low-noise amplifier and the mixer.
Hedayati discloses wherein the first receive chain comprises: a balun between the low-noise amplifier and the mixer (par. [0028]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Hedayati’s teachings wherein the first receive chain comprises: a balun between the low-noise amplifier and the mixer with the multi-chip beamforming device disclosed by Park because one of ordinary skill in the art would have recognized that a balun would improve noise immunity and as well as improve overall RF performance of the receiver.
Regarding claim 7, Park and Hedayati disclose all the limitations of claim 1. Park further discloses wherein the first receive chain comprises:
a low-noise amplifier configured to amplify the first high-frequency input signal to obtain an amplified first high-frequency input signal (Fig. 1, “LNA”);
a mixer configured to convert the amplified first high-frequency input signal output from the low-noise amplifier into a baseband analog signal by using the first downward frequency signal (Fig. 1, “Mixer 126”); and
an analog-to-digital converter (ADC) configured to convert the baseband analog signal into a digital signal, the digital signal corresponding to the first baseband signal (Fig. 1, “ADC 122”).
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of US 20220029272 A1 (Hong et al., hereinafter Hong).
Regarding claim 18 Park discloses an operating method of a wireless communication device (col. 1, lines 5-10) including a first radio frequency integrated circuit (RFIC), a second RFIC (col. 5, line 17, “implemented together in an integrated logic device or separately as discrete but interoperable logic devices”) the operating method comprising:
generating, by the first RFIC, a first oscillation clock signal (Fig. 5, “LO21”);
generating, by the second RFIC, a second oscillation clock signal (Fig. 5, “LO23” received by chain “524”);
outputting, by the second RFIC, the second oscillation clock signal (Fig. 5, “LO2B”) to the [modem chip];
converting, by the first RFIC, a first high-frequency input signal (Fig. 1, “RX Signal”) into a first baseband signal by using the first oscillation clock signal (Fig. 1 and col. 6, lines 14-19, “The mixer 126 down-converts the RX signal from the carrier frequency to the baseband frequency, for example, by mixing the RX signal with the LO signal…”); and
converting, by the first RFIC, a second high-frequency input signal into a second baseband signal by using the second oscillation clock signal (Fig. 5, “LO23” received by chain “524” that reads on second RFIC; col. 7, lines 13-30, where cellular networks such as LTE and 5G use high frequencies) received from the modem chip, the first RFIC and the second RFIC being stacked on the [modem chip].
Although it is implied that the transceiver chain/s comprise modulator and demodulator elements, for the purpose of compact prosecution, the examiner is introducing a new reference that more explicitly discloses a modem.
In related art concerning electronic device having antenna module and inter frequency integrated circuit, Hong discloses a modem (Fig. 5 and pars. [0077]-[0081], “modem 570”). Also, Hong discloses outputting, by the modem chip, the [second oscillation clock] signal to the first RFIC through a wire of the modem chip (Fig. 5 and pars. [0077]-[0081] and [0085]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Hong’s explicit teachings about a modem with the multi-chip beamforming device disclosed by Park because one of ordinary skill in the art would have recognized that RF transceivers comprise modulators, so that digital data can be converted in a form suitable for transmission over an analog medium, and converting received signals into digital form.
Regarding claims 19, Park and Hong disclose all the limitations of claim 18. Park further discloses determining a carrier aggregation (CA) type of the modem chip; and setting an oscillation clock output selection signal based on the determined CA type, the oscillation clock output selection signal enabling the second RFIC to output the second oscillation clock signal (col. 7, lines 13-30, where cellular networks such as LTE and 5G use carrier aggregation; where when using inter-band CA or intra-band CA different technology bands are aggregated).
Regarding claims 20, Park and Hong disclose all the limitations of claim 18. Park further discloses wherein the first oscillation clock signal has a different frequency than the second oscillation clock signal (col. 7, lines 13-30, “Each transceiver may communicate with other wireless devices in distinct operating frequency bands and/or using distinct communication protocols.”).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Hedayati, and further in view of Hong.
Regarding claim 3, Park and Hedayati disclose all the limitations of claim 2.
Park does not specifically disclose wherein the first downward frequency signal has a different frequency than the second downward frequency signal.
Hong discloses wherein the first downward frequency signal has a different frequency than the second downward frequency signal (pars. [0057]-[0058]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Hong’s teachings wherein the first downward frequency signal has a different frequency than the second downward frequency signal with the multi-chip beamforming device disclosed by Park and Hedayati because one of ordinary skill in the art would have recognized that new RF technologies such as 5G utilizes different frequencies bands to deal with different types of service communication such as voice, audio, high speed, high reliability, among others.
Regarding claim 4, Park and Hedayati disclose all the limitations of claim 3.
Hong further discloses wherein the first oscillation clock signal has a first frequency in a first frequency band, the second oscillation clock signal has a second frequency in a second frequency band, and the third oscillation clock signal has a third frequency in a third frequency band (pars. [0057]-[0058]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Hong’s teachings wherein the first oscillation clock signal has a first frequency in a first frequency band with the multi-chip beamforming device disclosed by Park and Hedayati because one of ordinary skill in the art would have recognized that new RF technologies such as 5G utilizes different frequencies bands to deal with different types of service communication such as voice, audio, high speed, high reliability, among others. Also, the configuration of three different frequency bands for three different clock signals constitutes a mere design configuration to achieve reception and/or transmission in different frequency bands.
Allowable Subject Matter
Claims 8-17 are allowed.
The following is an examiner’s statement of reasons for allowance:
Park, Hong and Hedayati alone or in combination fail to teach, disclose or suggest, “a wireless communication device comprising: a first radio frequency integrated circuit (RFIC); a second RFIC; and a modem chip, wherein each of the first RFIC and the second RFIC includes a first receive chain configured to receive a first high-frequency input signal, generate a first baseband signal based on the first high-frequency input signal by using a first downward frequency signal, and output the first baseband signal to the modem chip through a first output port of the first receive chain, a second receive chain configured to receive a second high-frequency input signal, generate a second baseband signal based on the second high-frequency input signal by using a second downward frequency signal, and output the second baseband signal to the modem chip through a second output port of the second receive chain, a first local oscillator configured to generate a first oscillation clock signal, a second local oscillator configured to generate a second oscillation clock signal, a first multiplexer configured to output one among the first oscillation clock signal and the second oscillation clock signal to a third output port based on an oscillation clock output selection signal, a first input port configured to receive a third oscillation clock signal from the modem chip, a second multiplexer configured to output one among the first oscillation signal, the second oscillation signal or the third oscillation signal to the first receive chain based on a first downward frequency selection signal, and a third multiplexer configured to output one among the first oscillation signal, the second oscillation signal or the third oscillation signal to the second receive chain based on a second downward frequency selection signal, the modem chip includes a first oscillation clock input port, a first wire, a first oscillation clock output port, a second oscillation clock input port, a second wire, and a second oscillation clock output port, and an oscillation clock signal output from the third output port of the first RFIC is input as the third oscillation clock signal to the first input port of the second RFIC through the first oscillation clock input port, the first wire and the first oscillation clock output port”.
Claims 9-17 depend from claim 8 and inherit all the limitations of the claim; therefore, claims 9-17 are allowed for the same reasons as set forth above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20230299757 A1 (Rashidi et al., hereinafter Rashidi) - clock driver for time-interleaved digital-to-analog converter.
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/ANGELICA M PEREZ/ Examiner, Art Unit 2649
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