Prosecution Insights
Last updated: April 19, 2026
Application No. 18/768,864

SYSTEM AND METHOD FOR PROCESSING BOOLEAN AND GARBLED CIRCUITS IN MEMORY-LIMITED ENVIRONMENTS

Non-Final OA §102§DP
Filed
Jul 10, 2024
Examiner
HOFFMAN, BRANDON S
Art Unit
2433
Tech Center
2400 — Computer Networks
Assignee
Fireblocks Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1125 granted / 1238 resolved
+32.9% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
31 currently pending
Career history
1269
Total Applications
across all art units

Statute-Specific Performance

§101
7.7%
-32.3% vs TC avg
§103
34.7%
-5.3% vs TC avg
§102
33.8%
-6.2% vs TC avg
§112
5.2%
-34.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1238 resolved cases

Office Action

§102 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-18 are pending in this office action. Information Disclosure Statement The information disclosure statement (IDS) submitted on July 10, 2024, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The disclosure is objected to because of the following informalities: the CROSS-REFERENCE TO RELATED APPLICATIONS section needs updated to reflect applications that have matured into patents. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-15 of U.S. Patent No. 12,067,902. Although the claims at issue are not identical, they are not patentably distinct from each other because both application and patent claim initializing a plurality of input gates and a plurality of state gates; generating a circuit slice for an update function; setting the plurality of state gates as a plurality of new output-state-gates; generating a circuit slice for a finalization function, wherein the finalization function represented by a sub-circuit, the outputs of which are terminal gates; and garbling the generated circuit slice for the finalization function. The patent further claims garbling the generated circuit slice for the update function, wherein the garbled generated circuit slice for the update function is garbled such that it can be evaluated by an evaluator without the evaluator having to receive information specifically regarding the garbled generated circuit slice for the update function; and, wherein the generated circuit slice for the finalization function is garbled such that it can be evaluated by the evaluator without the evaluator having to receive information specifically regarding the garbled generated circuit slice for the finalization function, whereas the instant application further claims initializing auxiliary garbling data, transmitting the garbled circuit slice, wherein initializing auxiliary garbling data is performed only once for the circuit and prior to initializing the plurality of input gates and the plurality of state gates. It would have been obvious to initialize auxiliary garbling data before initializing the input and state gates because the auxiliary data is a one-time data that needs to exist before regular processing occurs. Claim Objections Claims 1 and 9 are objected to because of the following informalities: the first limitation ends with a period and seems like the word “being” should also be removed. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 17-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kolesnikov et al. (U.S. Patent Pub. No. 2014/0040614). Regarding claim 17, Kolesnikov et al. teaches a method performed by an evaluator of a garbled circuit, comprising: receiving, at the evaluator, auxiliary evaluation data (paragraph 0047); receiving, at the evaluator, after receiving the auxiliary evaluation data, a plurality of garbled circuit slices (paragraph 0055); and evaluating, by the evaluator, each of the received plurality of garbled circuit slices without requiring receipt of all slices making up the garbled circuit (paragraph 0056). Regarding claim 18, Kolesnikov et al. teaches wherein the evaluating is performed on each received garbled circuit slice according to an order in which the garbled circuit slices are received (paragraph 0044). Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON HOFFMAN whose telephone number is (571)272-3863. The examiner can normally be reached Monday-Friday 8:30AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeffrey Pwu can be reached at (571)272-6798. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRANDON HOFFMAN/Primary Examiner, Art Unit 2433
Read full office action

Prosecution Timeline

Jul 10, 2024
Application Filed
Oct 10, 2025
Non-Final Rejection — §102, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+6.3%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 1238 resolved cases by this examiner. Grant probability derived from career allow rate.

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