DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 3, 5-10, 12, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US Pat. App. Pub. No. 2009/0141426) in view of Weir (US Pat. App. Pub. No. 2017/0278636).
With respect to claim 1, Hwang teaches a capacitor comprising: a structure that has a first surface where a plurality of openings are positioned (see FIG. 2, substrate 100, openings 105, and paragraph [0038], noting that the substrate includes a plurality of holes); a first internal electrode that is disposed on at least a portion of a region where the plurality of openings are positioned (see FIG. 2, element 110 and paragraph [0038]); a second internal electrode that is disposed on the first internal electrode (see FIG. 2, element 114 and paragraph [0038]); a first external electrode that is disposed on the first surface and is connected to the first internal electrode (see FIG. 2, element 160 and paragraph [0041]); and a second external electrode that is disposed on the first surface and is connected to the second internal electrode (see FIG. 2, element 162 and paragraph [0041]).
Hwang fails to teach a floating electrode that is disposed on a partial region of the first internal electrode.
Weir, on the other hand, teaches the use of a floating electrode disposed between active electrodes. See paragraph [0005]. Such an arrangement results in a significant reduction in the magnitude of the leak current. See paragraph [0005].
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the invention, to modify Hwang, as taught by Weir, to reduce the magnitude of the leak current.
With respect to claim 3, the combined teachings of Hwang and Weir teaches that the plurality of openings includes first openings, second openings, and third openings, and the first external electrode faces a region where the first openings are positioned, in a direction in which the first surface of the structure and a second surface of the structure are spaced apart from each other. See Hwang, FIG. 2.
With respect to claim 5, the combined teachings of Hwang and Weir teach that the first external electrode is connected to the first internal electrode in a region positioned adjacent to the first openings. See Hwang, FIG. 2, noting that the connection between the internal electrode and the external electrode in a region adjacent the first openings.
With respect to claim 6, the combined teachings of Hwang and Weir teach that the first external electrode is in direct contact with the first internal electrode so as to be connected to the first internal electrode. See Hwang, FIG. 2, noting that the first internal electrode is connected directly to the first external electrode.
With respect to claim 7, the combined teachings of Hwang and Weir teach a first opening side insulating layer that covers the first openings. See Hwang, FIG. 2, element 142 and paragraph [0057].
With respect to claim 8, the combined teachings of Hwang and Weir teach that the second external electrode faces a region where the second openings are positioned, in the direction in which the first surface and the second surface are spaced apart from each other. See Hwang, FIG. 2, element 154.
With respect to claim 9, the combined teachings of Hwang and Weir teach that the second external electrode is connected to the second internal electrode in a region positioned adjacent to the second openings. See Hwang, FIG. 2, noting that the connection between the internal electrode and the external electrode in a region adjacent the second openings.
With respect to claim 10, the combined teachings of Hwang and Weir teach that the second external electrode is in direct contact with the second internal electrode so as to be connected to the second internal electrode. See Hwang, FIG. 2, noting that the second internal electrode is connected directly to the second external electrode.
With respect to claim 12, the combined teachings of Hwang and Weir teach a second opening side insulating layer that covers the second openings. See Hwang, FIG. 2, element 164.
With respect to claim 17, Hwang teaches a capacitor comprising: a structure that has a first surface where a plurality of openings is positioned (see FIG. 2, substrate 100, openings 105, and paragraph [0038], noting that the substrate includes a plurality of holes); a first internal electrode that is disposed on regions between the plurality of openings on the first surface and the openings (see FIG. 2, element 110 and paragraph [0038]); a second internal electrode that is disposed on the first internal electrode (see FIG. 2, element 114 and paragraph [0038]); a first external electrode that is connected to the first internal electrode and is disposed in a direction toward which the first surface of the structure faces (see FIG. 2, element 160 and paragraph [0041]); and a second external electrode that is connected to the second internal electrode and is disposed in the direction toward which the first surface of the structure faces (see FIG. 2, element 162 and paragraph [0041]).
Hwang fails to teach a floating electrode that is disposed on the first internal electrode.
Weir, on the other hand, teaches the use of a floating electrode disposed between active electrodes. See paragraph [0005]. Such an arrangement results in a significant reduction in the magnitude of the leak current. See paragraph [0005].
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the invention, to modify Hwang, as taught by Weir, to reduce the magnitude of the leak current.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US Pat. App. Pub. No. 2009/0141426) in view of Weir (US Pat. App. Pub. No. 2017/0278636), and further, in view of Shin et al. (US Pat. App. Pub. No. 20193/0096587).
With respect to claim 2, the combined teachings of Hwang and Weir fail to teach that the structure includes anodizing aluminum oxide.
Shin, on the other hand, teaches that the structure includes anodizing aluminum oxide. See paragraph [0024]. Such an arrangement is known in the art to allow for allowing pores of a nanometer size to be formed regularly along a surface thereof. See paragraph [0024].
Accordingly, it would have been obvious to one of ordinary skill in the art, at the effective filing date of the invention, to modify the combined teachings of Hwang and Weir, as taught by Shin, in order to allow pores of a nanometer size to be formed regularly along a surface thereof.
Allowable Subject Matter
Claims 4, 11, 13-16, 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: with respect to claims 4, 11, 14-16, and 18-20, the prior art fails to teach, or fairly suggest, openings or side cavities, next to the openings where the electrodes are positioned, that do not include both first and second electrodes positioned therein, when taken in conjunction with the limitations of the respective base claims and intervening claims. With respect to claim 13, the prior art fails to teach, or fairly suggest, that the floating electrode and second electrode are disposed on the second opening side insulating layer, when taken in conjunction with the limitations of the base claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tian et al. (US 2012/0211865) and WO 2021/060552 each disclose a trench capacitor, but fail to disclose a floating electrode therein.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DION R FERGUSON whose telephone number is (571)270-7566. The examiner can normally be reached Monday-Friday, 5:30 a.m. - 4:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole, can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DION R. FERGUSON/Primary Examiner, Art Unit 2847