Prosecution Insights
Last updated: October 26, 2026
Application No. 18/769,482

HIGH-FREQUENCY MODULE

Non-Final OA §102
Filed
Jul 11, 2024
Priority
Jan 17, 2022 — JP 2022-005059 +1 more
Examiner
MALEK, MALIHEH
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
494 granted / 619 resolved
+11.8% vs TC avg
Minimal +3% lift
Without
With
+3.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
20 currently pending
Career history
642
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
61.2%
+21.2% vs TC avg
§102
23.5%
-16.5% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 619 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This office action is in response to the application filed on 07/11/2024. Currently, claims 1-20 are pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-7 and 12-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Schrems et al. (Pub. No. US 2021/0084747 A1, herein Schrems). Regarding claim 1, Schrems discloses a high-frequency module 100 ([0088] and [0045]) comprising: submodules (See Fig. 1, Submodule is considered to be each of the component carriers 102, 104, 126, or each individual electronic device/component with its surrounding layers.), each including electronic components 134-108-110 (See Fig. 1 and paragraphs [0075]), each including inner terminals 156 ([0082], [0068]), and a first support member 150-158 ([0075], [0087]) to cover and support the electronic components to expose the inner terminals; a second support member 124-126 ([0076]-[0077]) to cover and support the submodules; and outer terminals 138-130-139-164 ([0075], [0079]) coupled to respective ones of the inner terminals and exposed from the second support member (See Fig. 1), wherein at least one of the submodules includes a first conductive film 120 formed on at least part of the first support member ([0073]). Regarding claim 2, Schrems discloses the high-frequency module according to Claim 1, wherein a surface of the first support member at which the inner terminals 156 ([0082], [0068]) of each one of the submodule are exposed and a surface of the second support member at which the outer terminals outer terminals 138-130-139-164 ([0075], [0079]) are exposed face in a same direction (See Fig. 1). Regarding claim 3, Schrems discloses the high-frequency module according to Claim 1, wherein each one of the submodules includes the first conductive film (See Fig. 1 and [0073]). Regarding claim 4, Schrems discloses the high-frequency module according to Claim 1, further comprising: a first conductor wire ([0077]; bond wires) disposed at the surface of the second support member at which the outer terminals are exposed, the first conductor wire configured to couple one of the inner terminals of one of the submodules to one of the inner terminals of another one of the submodules (See Fig. 1). Regarding claim 5, Schrems discloses the high-frequency module according to Claim 4, further comprising: a stub ([0077]; flip chip configuration which inherently has bumps/balls/stubs) branched from the first conductor wire and disposed on the surface of the second support member at which the outer terminals are exposed (See Fig. 1). Regarding claim 6, Schrems discloses the high-frequency module according to Claim 1, further comprising: at least one antenna component ([0028]; “…the third component comprises at least one of the group consisting of a passive component and a power supply controller. For instance, such a passive component may be a capacitor, an inductance, a resistor, an integrated passive device (IPD) or an antenna”) covered and supported by the second support member and including an antenna element and an antenna terminal exposed from the second support member (See Fig. 1 and [0047]). Regarding claim 7, Schrems discloses the high-frequency module according to Claim 6, wherein the second support member includes a top surface facing opposite to the surface at which the outer terminals are exposed, and the second support member includes a second conductive film disposed on the top surface (See Fig. 1 and [0080], the redistribution layers are formed on both surfaces which include the second conductive film). Regarding claim 12, Schrems discloses the high-frequency module according to Claim 1, further comprising: a module substrate including lands coupled to respective ones of the outer terminals; and a connector mounted on the module substrate (See Fig. 1 and [0043],[0082]). Regarding claim 13, Schrems discloses the high-frequency module according to Claim 12, further comprising: at least one surface-mount chip component ([0030]) supported by the second support member and including a terminal exposed at the surface of the second support member at which the outer terminals are exposed, wherein the chip component is coupled to one of the submodules, and as viewed in plan, the chip component is disposed between the connector and the submodule to which the chip component is coupled (See Fig. 1 and [0077]). Regarding claim 14, Schrems discloses the high-frequency module according to Claim 1, further comprising: a third conductive film disposed on surfaces of the second support member, the surfaces being different from the surface at which the outer terminals are exposed (See Fig. 1 and [0080], the redistribution layers are formed on both surfaces which include the third conductive film). Regarding claim 15, Schrems discloses the high-frequency module according to Claim 1, further comprising: at least one second submodule (See Fig. 1, Submodule is considered to be each of the component carriers 102, 104, 126, or each individual electronic device/component with its surrounding layers.), wherein the at least one second submodule includes second electronic components 134-108-110 (See Fig. 1 and paragraphs [0075]), each including second inner terminals 156 ([0082], [0068]), a third support member to cover and support the second electronic components to expose the second inner terminals, and second outer terminals 138-130-139-164 ([0075], [0079]) coupled to respective ones of the second inner terminals, and the second support member supports the at least one second submodule in such a manner that the second outer terminals are exposed at a surface of the second support member opposite to the surface at which the outer terminals are exposed (See Fig. 1). Allowable Subject Matter Claims 8-11 and 16-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 8, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein a part of the top surface of the second support member is exposed from the second conductive film, and the at least one antenna component is positioned to overlap the part of the top surface of the second support member when the top surface of the second support member is viewed in plan. Claim 20 is included likewise as it depends from claim 8. With respect to claim 9, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, further comprising: a second conductor wire disposed at the surface of the second support member at which the outer terminals are exposed, the second conductor wire configured to couple the antenna terminal to one of the inner terminals of one of the submodules, wherein the one of the submodules coupled to the second conductor wire includes a high-frequency integrated circuit component serving as one of the electronic components. With respect to claim 10, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein at least two of the submodules include respective high-frequency integrated circuit components configured to perform different signal processing in accordance with different telecommunication protocols, each one of the high-frequency integrated circuit components being one of the electronic components in the corresponding submodule. With respect to claim 11, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein one of the submodules includes a DC-DC converter and an output inductor coupled to the DC-DC converter, the DC-DC converter and the output inductor being ones of the electronic components, the high-frequency module further comprises a third conductor wire disposed at the surface of the second support member at which the outer terminals are exposed, the third conductor wire configured to couple the output inductor to one of the inner terminals of one of the submodules that is different from the submodule including the output inductor, and the output inductor is disposed at a position closer than any other electronic components in the submodule including the output inductor to the submodule to which the third conductor wire is coupled. With respect to claim 16, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein the second support member includes a first portion covering the submodules and a second portion covering the at least one second submodule, and the first portion is adhered to the second portion. Claim 18 is included likewise as it depends from claim 16. With respect to claim 17, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein a surface of at least one of the submodules, the surface being opposite to the surface at which the inner terminals are disposed, opposes a surface of the at least one second submodule, the surface being opposite to the surface at which the second inner terminals are disposed, without the second support member being interposed therebetween. With respect to claim 19, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claim, wherein at least two of the submodules include respective high-frequency integrated circuit components configured to perform different signal processing in accordance with different telecommunication protocols, each one of the high-frequency integrated circuit components being one of the electronic components in the corresponding submodule. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Prior Art The prior arts made of record and not relied upon are considered pertinent to applicant’s disclosure. For example: Mok (Pub. No. US 2023/0245971 A1) discloses a module 1 ([0002]) includes a component carrier including a stack having at least one electrically conductive layer structure 3 ([0089]) and at least one electrically insulating layer structure 4 ([0071]); a semiconductor-based bridging component 5 ([0074]) having a redistribution structure ([0072]) is embedded in the stack; an electronic component is mounted on the component carrier and being partially electrically connected with the semiconductor-based component ([0073]) and partially electrically connected with another element of the component carrier or the module (See Fig. 1). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALIHEH MALEK whose telephone number is (571)270-1874. The examiner can normally be reached M/T/W/R/F, 8:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. September 27, 2026 /MALIHEH MALEK/Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Jul 11, 2024
Application Filed
Sep 30, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
83%
With Interview (+3.4%)
2y 10m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 619 resolved cases by this examiner. Grant probability derived from career allowance rate.

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