DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The abstract of the disclosure is objected to because of the following:
The language of the abstract should not repeat information given in the title.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The disclosure is objected to because of the following informalities:
-- an MEMS -- should be -- a MEMS -- in [0075].
-- the any two -- should be -- any two -- in [0131].
-- a may -- should -- may -- in [0328].
There are various many such minor informality exists in the specification. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Appropriate correction is required.
Drawings
Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old (background) is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112 (b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or joint inventor regards as the invention.
The following claim language is not clearly understood:
Claim 1 recites “first data or processed first data”. It is unclear which processor is processing the data to cause the first data to be processed data.
Claim 3 recites “between a processor in the first node and another node”. It is unclear if the processor belong to the first node or another node or both. Claim 4 has similar deficiency as claim 3.
Claim 5 recites “Jth node” without clearly reciting the limitations on J i.e. J is greater than integer greater than 0.
Claims 8 and 15 recite elements of claim 1 and have similar deficiency as claim 1. Therefore, they are rejected for the same rationale. Remaining dependent claims 2-7, 9-14 and 16-20 are also rejected due to similar deficiency inherited from the rejected independent claims.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more or integrating into practical application.
Claims 1-20 are determined to be directed to an abstract idea. Examples of abstract ideas include at least Mathematical concepts, Mental process and Certain Methods of organizing human activity. Independent claim 1 is directed to “determining the data need to be transmitted to another node, and transmitting the data to second processor in the first node and from second processor in the first node to the third processor to in the second node” at a high level of generality.
Step 1
As described in MPEP § 2106, subsection III, Step 1 of the eligibility analysis asks: Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites a method, which falls within the “process” category of 35 U.S.C. § 101. Claim 8 recites a cluster comprising processors, which falls within the “machine” category of 35 U.S.C. § 101. Claim 15 recites a node comprising processor, which falls within the “machine / manufacture” category of 35 U.S.C. § 101. Thus, the analysis determines whether the claims recite a judicial exception and fail to integrate the exception into practical application. If both elements are satisfied, the claims are directed to a judicial exception under the first step of the Alice/Mayo test.
Step 2A Prong One
As described in MPEP § 2106, subsection III, Step 2A of the Office’s eligibility analysis is the first part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217-18, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. at 77-78, 101 USPQ2d at 1967-68).
Step 2A is a two-prong inquiry, in which examiners determine in Prong One whether a claim recites a judicial exception, and if so, then determine in Prong Two if the recited judicial exception is integrated into a practical application of that exception.
claim elements
i
A method, applied to a computing cluster,
generic computing
ii
wherein the computing cluster comprises a first node and a second node, the first node comprises a first processor and a second processor, and the second processor is connected to a third processor in the second node; and
generic computing
iii
the method comprises:
generic computing
iv
determining, by the first processor, that the first data in the first processor needs to be transmitted to the second node;
mental process abstract idea
v
transmitting, by the first processor, the first data to the second processor; and
information transmission
vi
transmitting, by the second processor, the first data or processed first data to the third processor in the second node.
information transmission
The process described by step [iv] describes “concepts performed in the human mind” or “observation, evaluation, judgement, opinion.” Thus steps [iv] recite the abstract concept of [m]ental processes.” For example, step [iv] recites “determining, by the first processor, that the first data in the first processor needs to be transmitted to the second node;”, which is a combination of observation, evaluation, judgement and opinion, and may be performed by human mind. The courts consider a mental process (thinking) that "can be performed in the human mind, or by a human using a pen and paper" to be an abstract idea. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011).
Thus, claim 1 recites a judicial exception. For these same reasons and based on similar analysis, claims 8 and 15 also recite judicial exception.
Step 2A, Prong Two
As described in MPEP § 2106, subsection III, Step 2A of the Office’s eligibility analysis is the first part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217-18, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. at 77-78, 101 USPQ2d at 1967-68).
Step 2A is a two-prong inquiry, in which examiners determine in Prong One whether a claim recites a judicial exception, and if so, then determine in Prong Two if the recited judicial exception is integrated into a practical application of that exception.
Because claims 1, 8 and 15 recite a judicial exception, Analysis determines if the claims recites additional elements that integrate the judicial exception into practical application.
In addition to the limitations of claim 1 discussed above that recite the abstract concepts, claim 1 also recites additional steps [i]-[iii] and [v]-[vi]. Claim 1 in step [i] recites
“method, applied to a computing cluster”, which is directed to generic computing cluster and therefore do not integrate the abstract idea into practical application. See MPEP § 2106.04(d). Claim 1 in step [ii] recites “wherein the computing cluster comprises a first node and a second node, the first node comprises a first processor and a second processor, and the second processor is connected to a third processor in the second node;”, which describes the clusters comprising multiple nodes with multiple processors, which is further directed to generic computing components, and neither improve technology / technical field. Claim 1 in step [iii] recites generic computing method and therefore, it doesn’t integrate abstract idea into practical application. Claim 1 steps [v] and [vi] are directed to transmitting data from one processor to another processor. Transmission of information between different processors is common activities in the field of computing, and therefore, it doesn’t integrate the abstract idea into practical application. The Specification doesn’t provide additional details that would distinguish the additional limitations recited in claim 1 steps [i]-[iii], [v]-[vi] from a generic implementation of the abstract idea. Thus, the claim elements recited in steps [i]-[iii], [v]-[vi] , under broadest reasonable interpretation, do not integrate the judicial exception into a practical application.
Thus, claim 1 recites a judicial exception without integrating into practical application. For these same reasons and based on similar analysis as above, claims 8 and 15 also recites judicial exception without integrating into practical application.
Step 2B
As described in MPEP § 2106, subsection III, Step 2B of the Office’s eligibility analysis is the second part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. 66, 101 USPQ2d 1961 (2012)).
Step 2B asks: Does the claim recite additional elements that amount to significantly more than the judicial exception.
Because claims 1, 8 and 15 are directed to judicial exception, analysis must determine, according to Alice, whether these claims recite an element, or combination of elements that is enough to ensure that the claim is directed to significantly more than a judicial exception.
The Memorandum, Section III (B) (footnote 36) states:
In accordance with existing guidance, an Examiner’s conclusion that an additional element (or combination of elements) is well understood, routine, conventional activity must be supported with a factual determination. For more information concerning evaluation of well-understood, routine, convention activity, see MPEP 2106.05(d), as modified by the USPTO Berkheimer Memorandum.
The Berkheimer Memorandum, Section III(A)(1) states:
A Specification demonstrates the well-understood, routine, conventional nature of additional elements when it describes the additional elements as well-understood or routine or conventional (or an equivalent term), as a commercially available product, on in a manner that indicates that the additional elements are sufficiently well-known that the specification does not need to describe the particulars of such additional elements to satisfy 35 §U.S.C. 112(a). A finding that an element is well-understood, routine, or conventional cannot be based only on the fact that the specification is silent with respect to describing such element.
in addition to the limitations of claim 1 discussed above that recite the abstract concepts, claim 1 also recites additional steps [i]-[iii] and [v]-[vi]. Claim 1 in step [i] recites
“method, applied to a computing cluster”, which is directed to generic computing cluster and therefore do not amount to significantly. Claim 1 in step [ii] recites “wherein the computing cluster comprises a first node and a second node, the first node comprises a first processor and a second processor, and the second processor is connected to a third processor in the second nod;”, which describes the clusters comprising multiple nodes with multiple processors, which is further directed to generic computing components, and do not amount to significantly more. Claim 1 in step [iii] recites generic computing method and therefore, doesn’t amount to significantly more. Claim 1 steps [v] and [vi] are directed to transmitting data from one processor to another processor. Transmission of information between different processors is well-understood, routine and conventional activity, according to one of ordinary skills in the art. The Specification doesn’t provide additional details that would distinguish the additional limitations recited in claim 1 steps [i]-[iii], [v]-[vi] from a generic implementation of the abstract idea. As such these additional claim elements are not directed to anything beyond conventional nature of these elements or otherwise more than well-understood, routine, conventional activity in the field of computing. These limitations either alone or in combination simply append well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception. Further, the Specification doesn’t provide additional details that would distinguish the additional limitations as recited in the claim from a generic implementation of the abstract idea. Therefore, additional claim elements in claim 1 don’t amount to significantly more.
It has been recognized by court that receiving, processing, and storing data as well as receiving or transmitting data over a network are a well-understood, routine and conventional activities. Mortg. Grader, Inc. v. First choice Loan Servs. Inc., 811 F.3d 1314 (Fed. Cir. 2016) (generic computer components, such as interface, “network”, and “database,” fail to satisfy the inventive concept requirement); see also TLI Commc’ns, 823 F.3d 607; Elec. Power, 830 F.3d at 1350. There is no indication that the recited claim elements override the conventional use of known features or involve an unconventional arrangement or combination of elements such that the particular combination of generic technology results in anything beyond well-understood, routine, and conventional data gathering and output. Alice, 573 U.S. at 223 (“[T]he mere recitation of a generic computer cannot transform a patent ineligible abstract idea into a patent-eligible invention.”) See also Customedia Techs. LLC v. Dish Network Corp., 951 F.3d 1359, 1366(Fed. Cir. 2020) (“[T]he invocation of ‘already-available computers that are not themselves plausibly asserted to be an advance…amounts to a recitation of what is well-understood, routine, and conventional.”)(quoting SAP Am., Inc. v. InvestPic, LLC, 898F3.d 1161, 1170 (Fed. Cir. 2018)); and buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355(Fed. Cir 2014)(“That a computer receives and sends the information over a network -- with no further specification -- is not even arguably inventive.”).
Thus, Claims 1, 8 and 15 are directed to judicial exception without integrating into practical application, and do not amount significantly more.
Dependent claim 2 recites “the second processor and the third processor are connected via an optical cross-connect (OXC) device”, which is directed to common computing device.
Dependent claim 3 recites “wherein the first node comprises a topology between a processor in the first node and another node, and the topology comprises a connection relationship between the second processor and the third processor; and the transmitting, by the first processor, the first data to the second processor comprises: transmitting, by the first processor, the first data to the second processor based on the connection relationship between the second processor and the third processor in the topology”, which is directed to the topology, and is a combination of observation, evaluation, judgement and opinion. Transmission of information is well-understood, routine and conventional.
Dependent claim 4 recites “wherein the first node comprises a topology between a processor in the first node and another node, the topology comprises a one-to-one connection relationship between k processors in the first node and k processors in the second node, and k is an integer greater than 1; and the transmitting, by the first processor, the first data to the second processor comprises: determining, by the first processor, the k processors in the first node as k candidate processors based on the one-to-one connection relationship between the k processors in the first node and the k processors in the second node in the topology; selecting, by the first processor, the second processor from the k candidate processors; and transmitting, by the first processor, the first data to the second processor”, which is also directed to defining the topology and 1-1 connection, and selecting the processor from candidate processor, all of which is a combination of observation, evaluation, judgement, and opinion. Transmission of information is well-understood, routine and conventional.
Dependent claims 5 recites wherein data transmission between the first node and the second node is performed by using an allreduce interface in a message passing interface (MPI). MPI is well-understood and conventional to one of ordinary skills in the art. Claim 5 further recites cluster configuration and division of data to be transmitted to the processor using modulo operation, which is directed to mental process abstract idea or mathematical concepts.
Dependent claim 6 is directed to aggregation of data, and is considered insignificant data gathering activity.
Dependent claim 7 recites limitations similar to claim 5 is directed to MPI and is well-understood, routine and conventional and division and distribution of data, which resembles the idea of mental process abstract idea.
Based on similar analysis as above, dependent claims 2-7, 9-14 and 16-20 recite claim elements that are either abstract idea or additional claim elements, that individually or in combination, are either generic computing methods/components or insignificant pre-post solution activity and neither integrate into practical application nor amount to significantly more.
Therefore, the claim(s) 1-20 are rejected under 35 U.S.C. 101 as being directed to judicial exception without integrating into practical application or significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 6, 8-11, 13, 15-18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Langer et al. (US 2018/0183857 A1, hereafter Langer) in view of Li et al. (US 2020/0097328 A1, hereafter Li).
As per claim 1, Langer teaches the invention substantially as claimed including a method, applied to a computing cluster ([0021] fig. 1 collection of nodes 102 a-f), wherein the computing cluster comprises a first node ([0021] fig. 1 group 102a collection of nodes 104a - considered as a single node) and a second node ([0021] fig. 1 group 102 collection of nodes 104b -considered as another single node), the first node comprises a first processor (fig. 1 node 104 node 110 [0047] each node 110 include a processor memory 116 118) and a second processor (fig. 1 node 104 switch 112 [0049] switches 112 include a processor), and the second processor is connected to a third processor in the second node ([0035] multiple switches directly connected to each other to form a group; fig. 2 104a-112a-104b-112b); and
the method comprises:
determining, by the first processor, that first data in the first processor needs to be transmitted to the second node ([0063] data transferred from one group to another group, nodes, send portion of the data to nodes in another collection of nodes in another group [0067] fig. 10 an amount of data is determined to be sent to a node 1002);
transmitting, by the first processor, the first data to the second processor ([0036] data, exchanged, across nodes within the same switch e.g. nodes 110a,a-110a,0 exchange data using switch 112a); and
transmitting, by the second processor, the first data or processed first data to the third processor in the second node ([0036] data can be exchanged between nodes coupled to different switches e.g. nodes in collection of nodes 104a are coupled to switch 112a and nodes in collection of nodes 104b are coupled to switch 112b within 102a).
Langer doesn’t specifically teach data in the processor.
Li, however, teaches data in the processor ([0032] data in the cache).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Langer with the teachings of Li of data in the cache to improve efficiency and allow transmitting the cache data to the method of Langer as in the instant invention. The combination would have been obvious because transmitting the data in the cache to another node/ processor by applying the method taught by Langer to yield expected result and improved efficiency.
As per claim 2, Langer teaches wherein the second processor and the third processor are connected (OXC) device ([0022] elements, coupled, one another, connections, wired or wireless).
Li teaches remaining claim elements of connect via an optical cross-connect ([0025] optical cross connect switches [0033] optical links)
As per claim 3, Langer teaches wherein the first node comprises a topology between a processor in the first node and another node ([0035] multi-tier dragonfly topology or some other interconnected network topology), and the topology comprises a connection relationship between the second processor and the third processor ([0035] multi-tier, topology, direct connections at each tier of the topology); and
the transmitting, by the first processor, the first data to the second processor comprises:
transmitting, by the first processor, the first data to the second processor based on the connection relationship between the second processor and the third processor in the topology ([0035] first tier, nodes are directly connected to each other through a switch, second tier, multiple switches, directly connected to each other to form a group, third tier, grouped are directly connected to each other through the switches).
As per claim 4, Langer teaches wherein the first node comprises a topology between a processor in the first node and another node ([0035] multi-tier dragonfly topology or some other interconnected network topology), the topology comprises a one-to-one connection relationship between k processors in the first node and k processors in the second node ([0035] multi-tier, topology, direct connections at each tier of the topology; first tier, nodes are directly connected to each other through a switch, second tier, multiple switches, directly connected to each other to form a group, third tier, grouped are directly connected to each other through the switches [0047] each node 110 include a processor memory 116 118 [0049] switches 112 include a processor); and k is an integer greater than 1 ([0041] number of nodes, collection of nodes, groups, need not be symmetric); and
the transmitting, by the first processor, the first data to the second processor
comprises ([0036] data can be exchanged between nodes coupled to different switches e.g. nodes in collection of nodes 104a are coupled to switch 112a and nodes in collection of nodes 104b are coupled to switch 112b within 102a):
determining, by the first processor, the k processors in the first node as k candidate processors based on the one-to-one connection relationship between the k processors in the first node and the k processors in the second node in the topology ([0035] multi-tier, topology, direct connections at each tier of the topology; first tier, nodes are directly connected to each other through a switch, second tier, multiple switches, directly connected to each other to form a group, third tier, grouped are directly connected to each other through the switches [0062] each data engine 120 on a node can be configured to determine, what node is sending, what the receiving node will be);
selecting, by the first processor, the second processor from the k candidate processors ([0057] fig.7A node 110aaa, can communicate with node 110baa using switch 112a and group path 108a [0062] each data engine 120 on a node can be configured to determine, what node is sending, what the receiving node will be); and
transmitting, by the first processor, the first data to the second processor ([0036] data can be exchanged between nodes coupled to different switches e.g. nodes in collection of nodes 104a are coupled to switch 112a and nodes in collection of nodes 104b are coupled to switch 112b within 102a).
As per claim 6, Langer teaches aggregating, by the second processor, the first data and Ith portion of data in each of other (N - 1) processors in the first node ([0027] allgather operation, data on each node is combined).
Claim 8 recites computing cluster with elements similar to claim 1. Therefore, it is rejected for the same rationales.
Claim 9 recites elements similar to claim 2. Therefore, it is rejected for the same rationales.
Claim 10 recites elements similar to claim 3. Therefore, it is rejected for the same rationales.
Claim 11 recites elements similar to claim 4. Therefore, it is rejected for the same rationales.
Claim 13 recites elements similar to claim 6. Therefore, it is rejected for the same rationales.
Claim 15 recites a computing node, comprised in a computing cluster with elements similar to claim 1. Therefore, it is rejected for the same rationales.
Claim 16 recites elements similar to claim 2. Therefore, it is rejected for the same rationales.
Claim 17 recites elements similar to claim 3. Therefore, it is rejected for the same rationales.
Claim 18 recites elements similar to claim 4. Therefore, it is rejected for the same rationales.
Claim 20 recites elements similar to claim 6. Therefore, it is rejected for the same rationales.
Claims 5, 7, 12, 14 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Langer, in view of Li, as applied to the above claims, and further in view of Yan et al. (CN 109214512 B, hereafter Yan).
As per claim 5, Langer teaches wherein data transmission between the first node and the second node is performed by using an allreduce interface in a message passing interface (MPI) ([0031] all gather or scatter process [0032] MPI, reduction operation [0043] communication system , network traffic, send and received, MPI ), the computing cluster comprises M nodes, each of the M nodes comprises N processors (fig. 1 node 104 node 110 [0047] each node 110 include a processor memory 116 118 [0041] number of nodes, collection of nodes, groups, etc. does not need to be symmetric or similar and one node can communicate with different nodes in different collection of nodes or groups) data in each of the N processors is divided into N portions of data, and the first data is an Ith portion of data in the N portions of data ([0034] segmenting large message into small chunks [0067] data is divided into segments, communicated to the node); and
the determining, by the first processor, that first data in the first processor needs to be transmitted to the second node comprises (([0063] data transferred from one group to another group, nodes, send portion of the data to nodes in another collection of nodes in another group [0067] fig. 10 an amount of data is determined to be sent to a node 1002):
determining, by the first processor, a Jth node in the computing cluster as the second node ([0035] multi-tier, topology, direct connections at each tier of the topology; first tier, nodes are directly connected to each other through a switch, second tier, multiple switches, directly connected to each other to form a group, third tier, grouped are directly connected to each other through the switches), wherein
N is an integer greater than 1 (fig. 1 104:considered as single node, number of processor 110 i.e. greater than one), I is an integer greater than or equal to 1 ([0034] segmenting large messages into small chunks i.e. must be greater than equal to 1), and M is an integer greater than 1 (fig. 1 104:considered as single node, number of processor 110 i.e. greater than one ).
Langer and Li, in combination, do not specifically teach performing, by the first processor, a modulo operation on M by using I to obtain a remainder J.
Yan, however, teaches performing, by the first processor, a modulo operation on M by using I to obtain a remainder J ( page 4:, the cluster comprises 8 processors; each node is provided with 4 processors; the sequence number of the node is represented by A; the number of the processor is represented by a; the offset of the processor is equal to A + a * 4. supposing that the data needed to be allocated is the nth row in the training data set; then the processor obtains the nth row data in the training data set by the processor with the remainder obtained by dividing n by 8 as m).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Langer and Li with the teachings of Yan of determining the data allocated to nth row based on product of serial number of the node and number of processors in the node added to the number of processor to improve efficiency and allow performing, by the first processor, a modulo operation on M by using I to obtain a remainder J to the method of Langer and Li as in the instant invention. The combination would have been obvious because applying the method of determining data offset taught by Yan to the method taught by Langer and Li to yield expected result and improved efficiency.
As per claim 7, Langer teaches wherein data transmission between the first node and the second node is performed by using an alltoall interface in a message passing interface (MPI) ([0036] communication system, perform data exchange, all-to-all connections across switches [0043] communication system , network traffic, send and received, MPI ), the computing cluster comprises M nodes, each of the M nodes comprises N processors (fig. 1 node 104 node 110 [0047] each node 110 include a processor memory 116 118 [0041] number of nodes, collection of nodes, groups, etc. does not need to be symmetric or similar and one node can communicate with different nodes in different collection of nodes or groups) data in each of the N processors is divided into MxN portions of data, and the first data is an I X Nth portion of data to an (I+1) x N - 1)th portions of data ([0034] segmenting large message into small chunks [0062] data to be communicated should be divided into parts or segments, what node is sending what part or segment, and what the receiving node will be receiving each part or segment [0067] data is divided into segments, communicated to the node); and
the determining, by the first processor, that first data in the first processor needs to be transmitted to the second node comprises ([0063] data transferred from one group to another group, nodes, send portion of the data to nodes in another collection of nodes in another group [0067] fig. 10 an amount of data is determined to be sent to a node 1002):
determining, by the first processor, a Jth node in the computing cluster as the second node ([0035] multi-tier, topology, direct connections at each tier of the topology; first tier, nodes are directly connected to each other through a switch, second tier, multiple switches, directly connected to each other to form a group, third tier, grouped are directly connected to each other through the switches), wherein
N is an integer greater than 1 (fig. 1 104:considered as single node, number of processor 110 i.e. greater than one), I is an integer greater than or equal to 1 ([0034] segmenting large messages into small chunks i.e. must be greater than equal to 1), and M is an integer greater than 1 (fig. 1 104:considered as single node, number of processor 110 i.e. greater than one ).
Yan teaches remaining claim elements of performing, by the first processor, a modulo operation on M by using I to obtain a remainder J ( page 4:, the cluster comprises 8 processors; each node is provided with 4 processors; the sequence number of the node is represented by A; the number of the processor is represented by a; the offset of the processor is equal to A + a * 4. supposing that the data needed to be allocated is the nth row in the training data set; then the processor obtains the nth row data in the training data set by the processor with the remainder obtained by dividing n by 8 as m).
Claim 12 recites elements similar to claim 5. Therefore, it is rejected for the same rationales.
Claim 14 recites elements similar to claim 7. Therefore, it is rejected for the same rationales.
Claim 19 recites elements similar to claim 5. Therefore, it is rejected for the same rationales.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Dain et al. (US 2014/0047116 A1) teaches service management modes of operation in distributed node service management
Gustavsson (US 2009/0082023 A1) teaches routing based on transmission utilization
Heinz et al. (US 2016/0323150 A1) teaches method for improving the performance of collective operations in high performance computing
Liu et al. (US 2018/0004451 A1) teaches reading message forwarded by data switching device
Norton et al. (US 2021/0250297 A1) teaches method for selecting data routing paths having reduced latencies in a distributed computer network
Osborne et al. (US 2021/0191731 A1) teaches communication in a computer having multiple processors
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABU ZAR GHAFFARI whose telephone number is (571)270-3799. The examiner can normally be reached Monday-Thursday 9:00 - 17:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at 571-272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
ABU ZAR GHAFFARI
Primary Examiner
Art Unit 2195
/ABU ZAR GHAFFARI/Primary Examiner, Art Unit 2195
Prosecution Insights