DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This non-final office action is responsive to Applicants' application filed on 07/12/24. Claims 1-6 are presented for examination and are pending for the reasons indicated herein below.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 rejected under 35 U.S.C. 103 as being unpatentable over Bianco et al. (US 10425012 B2) in view of Liu (US 5363287 A)
Regarding claim 1. Bia teaches a dual-output power converter, comprising: an input voltage [122];
a first N-channel power metal oxide semiconductor field effect transistor switch being electrically connected to said input voltage [128];
a second N-channel power metal oxide semiconductor field effect transistor switch being electrically connected to said input voltage [126], and being electrically connected to said first N-channel power metal oxide semiconductor field effect transistor switch;
a resonant inductor [130] being electrically connected to the first N-channel power metal oxide semiconductor field effect transistor switch and being electrically connected to said second N-channel power metal oxide semiconductor field effect transistor switch;
a transformer [134] primary-side magnetizing inductor being electrically connected to said resonant inductor;
a transformer primary-side coil [158] being electrically connected to said resonant inductor, and being electrically connected to said transformer primary-side magnetizing inductor;
a resonant capacitor [148] being electrically connected to said input voltage, being electrically connected to said second N-channel power metal oxide semiconductor field effect transistor switch, and being electrically connected to said transformer primary-side magnetizing inductor and said transformer primary-side coil, wherein said resonant capacitor having a resonant voltage [resonance given by LLC circuit].
However, Bia does not explicitly mention a circuit comprising: a first output resistor being electrically connected to a transformer first secondary-side coil, being electrically connected to a first diode, and being electrically connected to a first output capacitor, said first output resistor having a first output voltage, said first diode being electrically connected to said first output capacitor, and said transformer first secondary-side coil being electrically connected to said first output capacitor; and a second output resistor being electrically connected to a transformer second secondary-side coil, being electrically connected to a second diode, and being electrically connected to a second output capacitor, wherein said second output resistor having a second output voltage, said second diode being electrically connected to said second output capacitor, and said transformer second secondary-side coil is electrically connected to said second output capacitor.
Liu teaches a circuit comprising: a first output resistor [fig 2, 50.1] being electrically connected to a transformer first secondary-side coil [14.1], being electrically connected to a first diode [50.1], and being electrically connected to a first output capacitor [48.1], said first output resistor having a first output voltage [i.e. Vo of 50.1], said first diode being electrically connected to said first output capacitor, and said transformer first secondary-side coil being electrically connected to said first output capacitor;
and a second output resistor [50.m] being electrically connected to a transformer second secondary-side coil [14.m], being electrically connected to a second diode [42.m], and being electrically connected to a second output capacitor [48.m], wherein said second output resistor having a second output voltage [Vo of 50.m], said second diode being electrically connected to said second output capacitor, and said transformer second secondary-side coil is electrically connected to said second output capacitor.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use the features of Liu in order to provide such a power supply having a low switching loss, low EMI noise, and at least one high voltage output rectifying circuit [col 1 lines 65-67].
Allowable Subject Matter
Claims 2-6 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if the claim objections stated above were overcome.
Examiner Note
The examiner cites particular columns and lines numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Bryan Perez whose telephone number is (571)272-8837. The examiner can normally be reached on Mon.-Fri. (7:30 – 5:00).
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Crystal Hammond, can be reached on (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRYAN R PEREZ/Examiner, Art Unit 2838