DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are subject to examination and rejected.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Su (US PGPub 2021/0278462).
Regarding claims 1, 9 and 14, Su teaches an interface system (Su, see abstract, An automated test equipment (ATE) apparatus), comprising:
one or more processors (Su, see abstract, a tester processor);
a memory communicably coupled to the one or more processors and storing a control module, including instructions that, when executed by the one or more processors (Su, see paragraph 0004, The ATE body 100 also includes a tester processor 101 with an associated memory 108 to control the hardware components built into the ATE body 100), cause the one or more processors to:
receive, within an interface device, an initialization request to access a test device (Su, see paragraph 0087, commands and data for testing a DUT are generated by the tester processor and/or the FPGA), the test device connected with a bridge in the interface device via connector pins (Su, see paragraphs 0013 and 0039, The ATE also comprises a connector module communicatively coupled to the FPGA comprising a socket to which the DUT connects. each of the DUTs 220A-220N in the system can be connected to a dedicated instantiated FPGA tester block 210A-210N [corresponding to a bridge in the interface device]);
retrieve from a memory within the interface device configuration information about the test device that includes at least a mapping of the connector pins with the bridge (Su, see figure 6 and paragraphs 0070 and 0079, routing logic 482 may comprise a “lane swizzle” module 497 and a “lane mask” module 498 that enables the lane remapping between, for example, U.2 and U.3 type devices as will be explained further in connection with FIG. 6. Table 621 illustrates the manner in which the pins on connector 620 may be mapped based on the type of device in accordance with an embodiment of the present invention. The columns of Table 621 correspond to each of the pins A, B, C, D, E, and F on the connector 620. The rows correspond to the interface standards that may be implemented using the connector 620, e.g., U.2 single port, U.3 single port, U.2 Port A, U.2 Port B, U.3 Port A and U.3 Port B. U.2 Port A and U.2 Port B implement the dual port U.2 standard); and
provide the configuration information to facilitate mediating communication with the test device (Su, see paragraph 0089, At block 816, the re-routed signals are transmitted selectively over lanes corresponding to a particular set of pins on the DUT, wherein the particular set of pins receiving the selectively transmitted signals depends on the type of DUT).
Regarding claims 2, 10 and 15, Su teaches wherein the control module includes instructions to provide the configuration information including instructions to generate a mapping of pins of the test device for communicating with the test device via the bridge and the connector pins over a network connection (Su, see figure 6 and paragraphs 0070 and 0079, routing logic 482 may comprise a “lane swizzle” module 497 and a “lane mask” module 498 that enables the lane remapping between, for example, U.2 and U.3 type devices as will be explained further in connection with FIG. 6. Table 621 illustrates the manner in which the pins on connector 620 may be mapped based on the type of device in accordance with an embodiment of the present invention. The columns of Table 621 correspond to each of the pins A, B, C, D, E, and F on the connector 620. The rows correspond to the interface standards that may be implemented using the connector 620, e.g., U.2 single port, U.3 single port, U.2 Port A, U.2 Port B, U.3 Port A and U.3 Port B. U.2 Port A and U.2 Port B implement the dual port U.2 standard).
Regarding claims 3, 11 and 16, Su teaches wherein the control module includes instructions to emulate a wire harness between multiple test devices including the test device include instructions to map connections using separate configuration information for the multiple test devices queried from the memory of the interface device (Su, see paragraph 0076, The socket 620 comprises pins A, B, C, D, E and F that can be re-mapped to different lanes (e.g., lanes 0, 1, 2, 3 and 4) depending on the type of device connected to the socket 620).
Regarding claims 4, 12 and 17, Su teaches wherein the control module includes instructions to emulate the wire harness including instructions to emulate the wire harness among multiple interface devices including the interface device with the multiple test devices distributed among the multiple interface devices (Su, see paragraph 0076, The socket 620 comprises pins A, B, C, D, E and F that can be re-mapped to different lanes (e.g., lanes 0, 1, 2, 3 and 4) depending on the type of device connected to the socket 620).
Regarding claims 5, 13 and 18, Su teaches wherein the control module includes instructions to emulate the wire harness including instructions to manage the wire harness using an edge service by:
querying the multiple interface devices to retrieve configuration information for the multiple test devices that are to be virtually connected via the wire harness (Su, see figure 6 and paragraphs 0070 and 0079, routing logic 482 may comprise a “lane swizzle” module 497 and a “lane mask” module 498 that enables the lane remapping between, for example, U.2 and U.3 type devices as will be explained further in connection with FIG. 6. Table 621 illustrates the manner in which the pins on connector 620 may be mapped based on the type of device in accordance with an embodiment of the present invention. The columns of Table 621 correspond to each of the pins A, B, C, D, E, and F on the connector 620. The rows correspond to the interface standards that may be implemented using the connector 620, e.g., U.2 single port, U.3 single port, U.2 Port A, U.2 Port B, U.3 Port A and U.3 Port B. U.2 Port A and U.2 Port B implement the dual port U.2 standard), and
generating a harness mapping that identifies connections through respective interface devices for the multiple test devices for mediating communications between the multiple test devices (Su, see paragraph 0076, The socket 620 comprises pins A, B, C, D, E and F that can be re-mapped to different lanes (e.g., lanes 0, 1, 2, 3 and 4) depending on the type of device connected to the socket 620).
Regarding claims 6 and 19, Su teaches wherein the control module includes instructions to emulate the wire harness including instructions to emulate, using a cloud service, the wire harness among multiple edge services that each separately communicate with multiple interface devices (Su, see paragraph 0073, The primitive can also comprise an enclosure 570. The DIB 500 can, in one embodiment, interface to a universal backplane (not shown) of the primitive 510 through a load board (not shown). The primitive 510 contains test circuitry for performing a test plan on the DUTs 520. The primitive 510 can operate independently of any other primitive and is connected to a control server (similar to system controller 301 shown in FIG. 3)),
wherein the control module includes instructions to use the cloud service to emulate the wire harness including instructions to provide remote access to the interface devices via the cloud service (Su, see paragraph 0073, The primitive can also comprise an enclosure 570. The DIB 500 can, in one embodiment, interface to a universal backplane (not shown) of the primitive 510 through a load board (not shown). The primitive 510 contains test circuitry for performing a test plan on the DUTs 520. The primitive 510 can operate independently of any other primitive and is connected to a control server (similar to system controller 301 shown in FIG. 3)).
Regarding claims 7, 8 and 20, Su teaches wherein providing the configuration information to facilitate mediating communication with the test device includes mediating access with the test device from the interface device that is a first device and an additional interface device that is a second device that both connect with the test device (Su, see paragraph 0073, The primitive can also comprise an enclosure 570. The DIB 500 can, in one embodiment, interface to a universal backplane (not shown) of the primitive 510 through a load board (not shown). The primitive 510 contains test circuitry for performing a test plan on the DUTs 520. The primitive 510 can operate independently of any other primitive and is connected to a control server (similar to system controller 301 shown in FIG. 3)),
wherein the first device and the second device provide access to different components of the test device (Su, see paragraph 0073, The primitive can also comprise an enclosure 570. The DIB 500 can, in one embodiment, interface to a universal backplane (not shown) of the primitive 510 through a load board (not shown). The primitive 510 contains test circuitry for performing a test plan on the DUTs 520. The primitive 510 can operate independently of any other primitive and is connected to a control server (similar to system controller 301 shown in FIG. 3)),
wherein the bridge connects the interface device with an external network (Su, see paragraph 0073, The primitive can also comprise an enclosure 570. The DIB 500 can, in one embodiment, interface to a universal backplane (not shown) of the primitive 510 through a load board (not shown). The primitive 510 contains test circuitry for performing a test plan on the DUTs 520. The primitive 510 can operate independently of any other primitive and is connected to a control server (similar to system controller 301 shown in FIG. 3)).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHONG G KIM whose telephone number is (571)270-0619. The examiner can normally be reached Mon-Fri @ 9am - 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nicholas R. Taylor can be reached at 571-272-3889. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHONG G KIM/Examiner, Art Unit 2443
/CHRISTOPHER B ROBINSON/Primary Examiner, Art Unit 2443
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