Prosecution Insights
Last updated: May 29, 2026
Application No. 18/773,049

MULTILAYER ELECTRONIC COMPONENT

Non-Final OA §102§103§112§DOUBLEPATENT
Filed
Jul 15, 2024
Priority
Oct 04, 2023 — RE 10-2023-0131633 +2 more
Examiner
TORRES, TIMOTHY JOSEPH
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electro-Mechanics Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
3 currently pending
Career history
4
Total Applications
across all art units

Statute-Specific Performance

§103
60.0%
+20.0% vs TC avg
§102
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §103 §112 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: 115’ in paragraph [0080] lines 13 and 16; 114b’ and 115b’ in paragraph [0080] line 21; 115’’ in paragraph [0081] lines 1, 4, and 7. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 16 recites “The multilayer electronic component according to claim 12, wherein the at least one additional pattern is disposed only in one of the region between the internal electrodes and the fifth surface of the body or the region between the internal electrodes and the sixth surface of the body.” Whereas claim 12 recites “The multilayer electronic component according to claim 1, wherein the at least one additional pattern includes a first additional pattern disposed in a region between the internal electrodes and the fifth surface of the body and a second additional pattern disposed in a region between the internal electrodes and the sixth surface of the body.” For claim 16, it is unclear if the at least one additional pattern is only in one region or both regions as claim 16 contradicts claim 12 and is therefore indefinite. For the purpose of examination, the examiner is taking claim 16 as depending from claim 1 rather than claim 12. In other words, claim 16 will be examined as “The multilayer electronic component according to claim 1, wherein the at least one additional pattern is disposed only in one of the region between the internal electrodes and the fifth surface of the body or the region between the internal electrodes and the sixth surface of the body.” Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 4, 9, 12-13, 15 and 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yeon et al. (Pub. No.: US 2022/0139617 A1) hereinafter referred to as Yeon. In regards to claim 1, Yeon discloses A multilayer electronic component, comprising: a body (110 – Fig. 1) including a dielectric layer (111 – Fig. 2 paragraph 0037) and internal electrodes alternately disposed with the dielectric layer in a first direction (121, 122 – Fig. 2 paragraph 0038), and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction (1, 2, 3, 4, 5, 6 – Fig. 1 paragraph 0040); side margin portions disposed on the fifth and sixth surfaces of the body, respectively (141, 142 – Fig. 1 paragraphs 0068-0069); and external electrodes disposed on the third and fourth surfaces of the body, respectively (131, 132 – Fig. 1 paragraph 0017), wherein at least one additional pattern spaced apart from the internal electrodes is disposed in at least one of a region between the internal electrodes and the fifth surface of the body or a region between the internal electrodes and the sixth surface of the body (121b – Fig. 3A paragraph 0052 and 122b – Fig. 3B paragraph 0054). In regards to claim 4, Yeon discloses The multilayer electronic component according to claim 1, wherein the at least one additional pattern is spaced apart from the third and fourth surfaces of the body (121b – Fig. 3A and 122b – Fig. 3B). In regards to claim 9, Yeon discloses The multilayer electronic component according to claim 1, wherein an upper end of one of the side margin portions in the first direction is disposed on the same plane as the second surface of the body, and a lower end of the one of the side margin portions in the first direction is disposed on the same plane as the first surface of the body (Fig. 5). In regards to claim 12, Yeon discloses The multilayer electronic component according to claim 1, wherein the at least one additional pattern includes a first additional pattern disposed in a region between the internal electrodes and the fifth surface of the body (122b – Fig. 3B paragraph 0054) and a second additional pattern disposed in a region between the internal electrodes and the sixth surface of the body (121b – Fig. 3A paragraph 0048). In regards to claim 13, Yeon discloses The multilayer electronic component according to claim 12, wherein the first additional pattern is disposed to contact the fifth surface of the body (122b – Fig. 3B paragraph 0056), and the second additional pattern is disposed to contact the sixth surface of the body (121b – Fig. 3A paragraph 0050). In regards to claim 15, Yeon discloses The multilayer electronic component according to claim 12, wherein the first additional pattern is spaced apart from the fifth surface of the body, and the second additional pattern is spaced apart from the sixth surface of the body (paragraph 0008 for 1-2-th internal electrode and 2-2-th internal electrode are described as “close” to the fifth and sixth surface. The term “close” does not require them to be in contact and is therefore interpreted as “spaced apart”). In regards to claim 17, Yeon discloses The multilayer electronic component according to claim 1, wherein the external electrodes include a first external electrode disposed on the third surface of the body (131 – Fig. 1) and a second external electrode disposed on the fourth surface of the body (132 – Fig. 1), and the first external electrode covers one end of one of the side margin portions in the second direction (131 – Fig. 4 and 131b – Fig. 8 paragraphs 0073-0076), and the second external electrode covers another end of the one of the side margin portions in the second direction (132 – Fig. 4 and 132b – Fig. 8 paragraphs 0077-0080). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-3, 6, 8, and 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hong et al. (Pub. No.: US 2019/0096584 A1) in view of Kim et al. (Pub. No.: US 20120229949 A1). In regards to claim 1, Hong ‘584 discloses a multilayer electronic component, comprising: a body (110 – Fig. 1) including a dielectric layer (111 – Fig. 2 paragraph 0041) and internal electrodes (121 – Fig. 2 paragraph 0041) alternately disposed with the dielectric layer (paragraph 0012) in a first direction, and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction (Fig. 1); and external electrodes disposed on the third and fourth surfaces of the body, respectively (141, 142 – Fig. 1 paragraph 0011), wherein at least one additional pattern spaced apart from the internal electrodes is disposed in at least one of a region between the internal electrodes and the fifth surface of the body or a region between the internal electrodes and the sixth surface of the body (131 – Fig. 2 paragraph 0054). Hong ‘584 fails to disclose side margin portions disposed on the fifth and sixth surfaces of the body, respectively. Kim ‘949 discloses side margin portions disposed on the fifth and sixth surfaces of the body, respectively (113, 114 – Fig. 1C). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to dispose side margins of Kim ‘949 on the body of the multilayer electronic component taught by Hong ‘584 to improve the volume efficiency (capacitance per volume). In regards to claim 2, Hong ‘584 as modified by Kim ‘949 further discloses the multilayer electronic component according to claim 1, wherein an average thickness of both ends of one of the internal electrodes in the third direction is smaller than an average thickness of a central portion of the one of the internal electrodes in the third direction (321, 322 – Fig. 6 paragraphs 0007-0008 and 0053). In regards to claim 3, Hong ‘584 as modified by Kim ‘949 further discloses the multilayer electronic component according to claim 1, wherein both ends of one of the internal electrodes in the third direction have a shape bent toward a center of the body in the first direction (321, 322 – Fig. 6 paragraph 0008). In regards to claim 6, Hong ‘584 as modified by Kim ‘949 further discloses the multilayer electronic component according to claim 1, wherein among both ends of the at least one additional pattern in the third direction, an average thickness of an end closer to the internal electrodes is smaller than an average thickness of a central portion of the at least one additional pattern in the third direction (331, 332 – Fig. 6 paragraphs 0007-0008). In regards to claim 8, Hong ‘584 as modified by Kim ‘949 further discloses The multilayer electronic component according to claim 1, wherein among both ends of the at least one additional pattern in the third direction, an end closest to the internal electrodes has a shape bent toward a center of the body in the first direction (331, 332 – Fig. 6). In regards to claim 10, Hong ‘584 fails to disclose wherein an upper end of one of the side margin portions in the first direction is disposed to be lower than the second surface of the body in the first direction, and a lower end of the one of the side margin portions in the first direction is disposed to be higher than the first surface of the body in the first direction. Kim ‘949 discloses wherein an upper end of one of the side margin portions in the first direction is disposed to be lower than the second surface of the body in the first direction, and a lower end of the one of the side margin portions in the first direction is disposed to be higher than the first surface of the body in the first direction (113, 114 – Fig. 2 paragraphs 0070-0071). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to modify the side margins as described above such that removal of residual carbon at edges of the multilayer electronic component may be more easily performed (see paragraphs 0068-0072). In regards to claim 11, Hong ‘584 fails to disclose wherein an upper end of one of the side margin portions in the first direction is disposed to be higher than the second surface of the body in the first direction, and a lower end of the one of the side margin portions in the first direction is disposed to be lower than the first surface of the body in the first direction. Kim ‘949 discloses wherein an upper end of one of the side margin portions in the first direction is disposed to be higher than the second surface of the body in the first direction, and a lower end of the one of the side margin portions in the first direction is disposed to be lower than the first surface of the body in the first direction (114, 115 – Fig. 3 paragraph 0073). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to modify the side margins as described above such that the “radiating cracks may occur at the time of forming the outer electrodes and the mechanical strength against the external impact may be improved” (see paragraph 0075) for the multilayer electronic component. Claim(s) 1 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (Pub. No.: US 20150255213 A1) in view of Kim et al. (Pub. No.: US 20120229949 A1). In regards to claim 1, Lee ‘213 discloses a multilayer electronic component, comprising: a body (110 – Fig. 1) including a dielectric layer (111 – Fig. 1 paragraph 0031) and internal electrodes (121, 122 – Fig. 1 paragraph 0031) alternately disposed with the dielectric layer (paragraph 0031) in a first direction, and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction (Fig. 1); and external electrodes disposed on the third and fourth surfaces of the body, respectively (131, 132 – Fig. 3 paragraph 0041), wherein at least one additional pattern spaced apart from the internal electrodes is disposed in at least one of a region between the internal electrodes and the fifth surface of the body or a region between the internal electrodes and the sixth surface of the body (141, 142 – Fig. 1 paragraphs 0009 and 0074). Hong ‘584 fails to disclose side margin portions disposed on the fifth and sixth surfaces of the body, respectively. Kim ‘949 discloses side margin portions disposed on the fifth and sixth surfaces of the body, respectively (113, 114 – Fig. 1C). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to dispose side margins of Kim ‘949 on the body of the multilayer electronic component taught by Hong ‘584 to improve the volume efficiency (capacitance per volume). In regards to claim 16, Lee ‘213 as modified by Kim ‘949 discloses the multilayer electronic component according to claim 1, wherein the at least one additional pattern is disposed only in one of the region between the internal electrodes and the fifth surface of the body or the region between the internal electrodes and the sixth surface of the body (142 – Fig. 6A and 141, 142 – Fig. 6B paragraphs 0074 and 0093). Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hong et al. (Pub. No.: US 2019/0096584 A1) in view of Kim et al. (Pub. No: US 2012/0229949 A1), and further in view of Kato (Pub. No.: US 20220084752 A1). In regards to claim 5, Hong ‘584 as modified by Kim ‘949 discloses the multilayer electronic component according to claim 1, but fails to disclose wherein a separation distance between the at least one additional pattern and the internal electrodes in the third direction is 15 to 45 um. Kato ‘752 discloses wherein a separation distance between the at least one additional pattern and the internal electrodes in the third direction is 30 um or less (paragraph 0009). Furthermore, Kato discloses that the at least one additional pattern (conductive layers or shock absorption layers) “are respectively spaced and separated from the plurality of internal electrode layers” (paragraph 0006). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to impose a restriction on the separation distance of 30 um or less, which significantly overlaps with the claimed range of 15 to 45 um, to avoid cracks forming due to thermal shock during a firing process or a reflow process (see paragraph 0043). Claim(s) 18 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yeon in view of Kim et al. (Pub. No.: US 2021/0166881 A1). In regards to claim 18, Yeon discloses the multilayer electronic component according to claim 1, but fails to disclose wherein the side margin portions have a different composition from the dielectric layer. Kim ‘881 discloses wherein the side margin portions have a different composition from the dielectric layer (paragraph 0087). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to form the side margin having a different composition from the dielectric, “thereby obtaining both effects of improving the moisture resistance reliability and improving the withstand voltage characteristics” (paragraph 0087). In regards to claim 19, Hong ‘584 as modified by Kim ‘949 and as further modified by Kim ‘881 discloses the multilayer electronic component according to claim 18, but fails to disclose wherein the side margin portions have a different grain size from the dielectric layer and a different porosity from the dielectric layer. Kim ‘881 further discloses wherein the side margin portions have a different grain size from the dielectric layer (paragraph 0107-0109) and a different porosity from the dielectric layer (paragraph 0105). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to form the side margin with a different grain size from the dielectric layer to control the number of pores between both (paragraph 00107). Furthermore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to also form the side margin with a different porosity from the dielectric layer “thereby improving moisture resistance reliability and withstand voltage characteristics” (paragraph 0106). Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yeon in view of Fujita et al. (Pub No.: US 2015/0228409 A1). In regards to claim 20, Yeon discloses the multilayer electronic component according to claim 1, but fails to disclose wherein the side margin portions have the same composition as the dielectric layer. Fujita ‘409 discloses wherein the side margin portions have the same composition as the dielectric layer (paragraph 0068). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date to form the side margin portions having the same composition as the dielectric layer “to reduce the contraction ratio difference during firing” (paragraph 0068). Allowable Subject Matter Claim(s) 7 and 14 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art for the limitations of claims 7 and 14 has not been found. In regards to claim 7, an example of where the end of the additional pattern closer to the internal electrodes is has a smaller average thickness is not known. The examiner notes that this quality rests fully on where the stacked body ceramic green sheet is cut. This is due to the internal electrodes and/or additional patterns becoming bent/stretched/ warped during compression of the ceramic green sheets (as disclosed in paragraph 0051 of the present application and paragraph 0007 of Hong et al. US 20190096584 A1). Claim 14 is also dependent on how the stacked body ceramic green sheet is cut. No prior can be found that teaches the specific cutting of a green ceramic block or location of additional patterns as claimed in 7 and 14. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 12-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 5, 7-8, and 11-14 of copending Application No. 18/781519 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because claims and 12-13 of the present application are generic (broader than) to claims 5, 7-8, and 11-14 of copending Application No. 18/781519. Claim 5 of the copending application narrows the location and shape of the generic internal electrode. Additionally, it narrows the number of “at least one additional pattern” to “a first additional pattern” and narrows the location “spaced apart from the internal electrodes is disposed in at least one of a region between the internal electrodes and the fifth surface of the body or a region between the internal electrodes and the sixth surface of the body” to “in contact with the fifth surface of the body and spaced apart from the first end”. Therefore, claim 1 of the present application is anticipated by claim 5 of the copending application No. 18/781519. Claims 7-8 of the copending application further narrows claim 5 of the copending application, making claim 1 of the present application broader. Therefore, claim 1 of the present application is anticipated by claim 7-9 of the copending application No. 18/781519. Claims 11-14 of the copending application narrows the location/shape of the generic internal electrode, and/or location/shape/quantity of the at least one additional pattern of claim 1 of the present application. Therefore, claim 1 of the present application is anticipated by claims 11-14 of the copending application No. 18/781519. Claim 14 of the copending application narrows the location of the first additional pattern and the second additional pattern of claim 12 of the present application. Therefore, claim 12 of the present application is anticipated by claim 14 of the copending application No. 18/781519. Claim 14 of the copending application claims the same location for the first additional pattern and the second additional pattern of claim 13 of the present application. Therefore, claim 13 of the present application is anticipated by claim 14 of the copending application No. 18/781519. In regards to claim 1 of the present application, Application No. 18/781519 claims A multilayer electronic component, comprising: a body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction, and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction; side margin portions disposed on the fifth and sixth surfaces of the body, respectively (claim 1); and external electrodes disposed on the third and fourth surfaces of the body, respectively, wherein at least one additional pattern spaced apart from the internal electrodes is disposed in at least one of a region between the internal electrodes and the fifth surface of the body or a region between the internal electrodes and the sixth surface of the body (claims 5, 7-8, and 11-14). In regards to claim 12 of the present application, Application No. 18/781519 claims, The multilayer electronic component according to claim 1, wherein the at least one additional pattern includes a first additional pattern disposed in a region between the internal electrodes and the fifth surface of the body and a second additional pattern disposed in a region between the internal electrodes and the sixth surface of the body (claim 14). In regards to claim 13 of the present application, Application No. 18/781519 claims, The multilayer electronic component according to claim 12, wherein the first additional pattern is disposed to contact the fifth surface of the body, and the second additional pattern is disposed to contact the sixth surface of the body (claim 14). This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2021/0098195 A1 – Fig. 4 US 2021/0074479 A1 – [0071]-[0075] US 2020/0402717 A1 – Fig. 5 US 2015/0228409 A1 – [0068] US 2017/0243697 A1 – Fig. 4 US 2014/0301013 A1 – Fig. 3 US 2017/0301470 A1 – Figs. 5/6 US 2022/0076891 A1 – Figs. 6/7A/7B US 2012/0134068 A1 – Fig. 1 US 2020/0411243 A1 – Fig. 5 US 2017/0103854 A1 – Claim 30 Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOTHY JOSEPH TORRES whose telephone number is (571)272-9896. The examiner can normally be reached Mon-Fri 7:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /T.J.T./Examiner, Art Unit 2848 /Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2848
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Prosecution Timeline

Jul 15, 2024
Application Filed
Mar 27, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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