Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 6, 9-12, 15, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (U.S. PGPUB 20140119675) in view of Hung et al. (U.S. Patent No. 9,787,937).
With respect to claim 1, Kim et al. disclose an image processing apparatus (paragraph 24, FIG. 1 is a block diagram of an exemplary image processing apparatus 100), comprising:
an output circuit (130 in Fig. 1), comprising a plurality of connection ports (paragraph 25, a plurality of connectors 130 that are respectively connected to a plurality of external display apparatuses 200), the output circuit being configured to perform handshakes through connected ones of the connection ports to obtain a plurality of display capability data respectively through the connected ones of the connection ports (paragraph 36, As illustrated in FIG. 1, information on the resolution of the first to fourth display apparatuses 200a, 200b, 200c and 200d may be transmitted by the first to fourth display apparatuses 200a, 200b, 200c and 200d connected through the first to fourth connectors 130a, 130b, 130c and 130d), and being configured to output a plurality of picture data through the connected ones of the connection ports respectively (paragraph 37, The first to fourth divided images that have been scaled by the first to fourth scalers 120a, 120b, 120c and 120d may be transmitted to the first to fourth display apparatuses 200a, 200b, 200c and 200d through the first to fourth connectors 130a, 130b, 130c and 130d);
a processing circuit (110 in Fig. 1), coupled with the output circuit (110 is coupled to 130 through 120 in Fig. 1); and
a receiving circuit (paragraph 25, the image processing apparatus 100 includes a receiver (not shown) to receive a source image), coupled with the processing circuit (source image to 110 in Fig. 1);
wherein the processing circuit is configured to slice the first image into a plurality of sub-images corresponding to the display capability data (paragraph 32, as illustrated in FIG. 2, if a source image 20 has a 4K resolution (3,840.times.2,160) and four display apparatuses 200 are connected to the plurality of connectors 130 and the display apparatuses 200 support a FHD resolution (1,920.times.1,080), the image processor 110 divides the 4K source image into a first divided image 21, a second divided image 22, a third divided image 23 and a fourth divided image 24), and is configured to generate the picture data comprising the sub-images (paragraph 61, At operation S520, the source image having the adjusted resolution by the plurality of scalers 120 is transmitted to the plurality of display apparatuses 200 through the plurality of connectors 130). The components correspond to circuitry (paragraph 38, The controller 140 controls elements of the image processing apparatus 100). However, Kim et al. do not expressly disclose the processing circuit being configured to determine a stitching mode resolution according to the display capability data; and the receiving circuit being configured to perform handshakes according to the stitching mode resolution in order to obtain a first image having the stitching mode resolution.
Hung et al., who also deal with multiple displays, disclose a method for the processing circuit being configured to determine a stitching mode resolution according to the display capability data (column 6, lines 5-13, It is assumed that the resolution of all the four display apparatuses 120_1, 120_2, 120_3 and 120_4 illustrated in FIG. 3 is 1920*1080. The video processing circuit 420 may set the resolution information of the EDID in the memory circuit 410 as a video wall resolution, which is 3840*2160, adapted to the video wall 100 (instead of the default resolution of 1920*1080 of the display panel 430 itself) based on the video wall configuration parameter); and the receiving circuit being configured to perform handshakes according to the stitching mode resolution in order to obtain a first image having the stitching mode resolution (column 6, lines 13-22, The video source 110 illustrated in FIG. 3 may read the EDID from the display apparatus 120_1 (i.e., the display apparatus 400) which is connected therewith to obtain that the video wall resolution of the video wall 100 in this case is 3840*2160. Because the video source 110 is capable of obtaining that the optimal resolution of the video wall 100 is 3840*2160, the video source 110 may output the video frame signal with the resolution of 3840*2160 to the four display apparatuses 120_1 to 120_4 of the video wall 100). The stitching mode resolution is 3840*2160 and handshakes are performed between the video source 110 and display apparatuses to obtain the video frame signal with the resolution of 3840*2160.
Kim et al. and Hung et al. are in the same field of endeavor, namely computer graphics.
Before the effective filing date of the claimed invention, it would have been obvious to apply the method of the processing circuit being configured to determine a stitching mode resolution according to the display capability data; and the receiving circuit being configured to perform handshakes according to the stitching mode resolution in order to obtain a first image having the stitching mode resolution, as taught by Hung et al., to the Kim et al. system, because the display apparatus provided by the embodiments of the invention can provide the resolution information of the video wall to the video source 110, such that the video source 110 can adaptively adjust the resolution of the video frame signal according to the resolution information of the video wall (column 11, lines 1-5 of Hung et al.), thus obtaining an optimal video resolution for displaying an output image.
With respect to claim 2, Kim et al. as modified by Hung et al. disclose the image processing apparatus of claim 1, wherein each of the display capability data comprises a pose, a relative positional relationship regarding to other display devices (Hung et al.: column 5, lines 65-67, column 6, lines 1-5, the video processing circuit 420 may determine that the display apparatus 400 is the first display apparatus 120_1 of the video wall 100 illustrated in FIG. 3 based on a predetermined video wall configuration parameter and may obtain that the video wall 100 is a 2*2 video wall based on the video wall configuration parameter), a size, a supported resolution, or any combination thereof of a corresponding display device (Kim et al.: paragraph 43, That is, the controller 140 determines the resolution of the source image, determines the number and resolution of the plurality of display apparatuses 200 connected by the plurality of connectors 13). It would have been obvious for the display capability to include a pose or positional relationship because this would allow for generating a video wall of various sizes for different applications.
With respect to claim 3, Kim et al. as modified by Hung et al. disclose the image processing apparatus of claim 1, wherein the processing circuit is configured to determine a resolution of each of the sub-images according to an amount of display devices represented by the display capability data and a relative positional relationship regarding to other display devices comprised in each of the display capability data (Kim et al.: paragraph 42, The controller 140 determines the resolution of the source image, and controls the image processor 110 to divide the source image taking into account the determined resolution of the source image and the number and resolution of the connected display apparatuses 200, paragraph 44, as illustrated in FIG. 2, if the source image is 4K UHD (3,840.times.2,160), the number of connected display apparatuses is four display apparatuses and the resolution of the display apparatuses is FHD (1,920.times.1,080), the controller 140 may control the image processor 110 to divide the source image into four images).
With respect to claim 6, Kim et al. as modified by Hung et al. disclose the image processing apparatus of claim 1, wherein the display capability data are configured to record a relative positional relationship between display devices (Hung et al.: column 4, lines 18-41, The four display apparatuses 120_1 to 120_4 are spliced to form a 2*2 video wall, as illustrated in FIG. 3. Based on a preset video wall configuration, the upper left display apparatus 120_1 may capture an upper left part subframe from the video frame signal provided by the video source 110 and display the same…); wherein a relative positional relationship between the sub-images in the first image is the same as the relative positional relationship between the display devices (Fig. 3, upper left part of the subframe and upper left display apparatus 120_1).
With respect to claim 9, Kim et al. as modified by Hung et al. disclose the image processing apparatus of claim 1, wherein the display capability data comprise a plurality of supported resolutions of display devices (Kim et al.: paragraph 41, the controller 140 may determine that the first to fourth display apparatuses 200a, 200b, 200c and 200d support FHD (1,920.times.1,080) resolution, each of the display apparatuses have a corresponding supported resolution), the stitching mode resolution is N times as dense as a maximum or a minimum among the supported resolutions, wherein N is a positive integer greater than or equal to 2 (Hung et al.: column 6, lines 5-13, It is assumed that the resolution of all the four display apparatuses 120_1, 120_2, 120_3 and 120_4 illustrated in FIG. 3 is 1920*1080. The video processing circuit 420 may set the resolution information of the EDID in the memory circuit 410 as a video wall resolution, which is 3840*2160, adapted to the video wall 100). The stitching mode resolution is four times the as dense as the maximum 1920x1080 resolution. It would have been obvious for the stitching mode resolution to be N times as dense as a maximum or minimum among the supported resolutions, because this would adaptively adjust the resolution of the video frame signal according to the resolution information of the video wall (column 11, lines 1-5 of Hung et al.), thus obtaining an optimal video resolution for displaying an output image.
With respect to claim 10, Kim et al. as modified by Hung et al. disclose an image processing method, as executed by the system of claim 1; see rationale for rejection of claim 1.
With respect to claim 11, Kim et al. as modified by Hung et al. disclose the image processing method of claim 10, as executed by the system of claim 2; see rationale for rejection of claim 2.
With respect to claim 12, Kim et al. as modified by Hung et al. disclose the image processing method of claim 10, as executed by the system of claim 3; see rationale for rejection of claim 3.
With respect to claim 15, Kim et al. as modified by Hung et al. disclose the image processing method of claim 10, as executed by the system of claim 6; see rationale for rejection of claim 6.
With respect to claim 18, Kim et al. as modified by Hung et al. disclose the image processing method of claim 10, as executed by the system of claim 9; see rationale for rejection of claim 9.
Claim(s) 4-5 and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (U.S. PGPUB 20140119675) in view of Hung et al. (U.S. Patent No. 9,787,937) and further in view of Minamihara et al. (U.S. PGPUB 20150098664).
With respect to claim 4, Kim et al. as modified by Hung et al. disclose the image processing apparatus of claim 1, wherein the display capability data respectively comprise a plurality of poses of display devices (Hung et al.: column 4, lines 18-41, The four display apparatuses 120_1 to 120_4 are spliced to form a 2*2 video wall, as illustrated in FIG. 3. Based on a preset video wall configuration, the upper left display apparatus 120_1 may capture an upper left part subframe from the video frame signal provided by the video source 110 and display the same, column 5, lines 65-67, column 6, lines 1-5, the video processing circuit 420 may determine that the display apparatus 400 is the first display apparatus 120_1 of the video wall 100 illustrated in FIG. 3 based on a predetermined video wall configuration parameter and may obtain that the video wall 100 is a 2*2 video wall based on the video wall configuration parameter). However, Kim et al. as modified by Hung et al. do not expressly disclose each of the poses comprises a plurality of spatial coordinates; wherein a plurality of center points of the sub-images form a first shape in the first image, the spatial coordinates form a second shape, and the first shape and the second shape are in similar shapes.
Minamihara et al., who also deal with multiple images, disclose a method wherein each of the poses comprises a plurality of spatial coordinates (paragraph 45, In step S180, the image arranging program 124 creates a collage image by determining a size of each image MPj at a time of arranging, and arranging a center of the image MPj at each generatrix Mj, poses of images MP1-MP5 in Fig. 6 have spatial coordinates at center);
wherein a plurality of center points of the sub-images form a first shape in the first image (paragraph 45, arranging a center of the image MPj at each generatrix Mj, connecting the dots of M1-M5 in Fig. 6 forms a first trapezoid shape), the spatial coordinates form a second shape, and the first shape and the second shape are in similar shapes (Fig. 6, the images MP1-MP5 are arranged in a similar trapezoidal shape).
Kim et al., Hung et al., and Minamihara et al. are in the same field of endeavor, namely computer graphics.
Before the effective filing date of the claimed invention, it would have been obvious to apply the method wherein each of the poses comprises a plurality of spatial coordinates; wherein a plurality of center points of the sub-images form a first shape in the first image, the spatial coordinates form a second shape, and the first shape and the second shape are in similar shapes, as taught by Minamihara et al., to the Kim et al. as modified by Hung et al. system, because this would use an algorithm to arrange images in a preset order.
With respect to claim 5, Kim et al. as modified by Hung et al. and Minamihara et al. disclose the image processing apparatus of claim 4, wherein the processing circuit rotates at least one of the sub-images according to the poses (Minamihara et al.: paragraph 66, it is possible to determine an arrangement of an image according to an arrangement algorithm having the aspect ratio Aj, the rotation angle θj, and the weight Qj of arrangement size of each image as parameters also in the second embodiment). It would have been obvious to rotate at least one of the sub-images according to the poses because it is possible to appropriately change various editing items or parameters by a user so that a favorite collage image is obtained (paragraph 66 of Minamihara et al.), thus allow for custom rotation of the images.
With respect to claim 13, Kim et al. as modified by Hung et al. disclose the image processing method of claim 10, as executed by the system of claim 4; see rationale for rejection of claim 4.
With respect to claim 14, Kim et al. as modified by Hung et al. disclose the image processing method of claim 13, as executed by the system of claim 5; see rationale for rejection of claim 5.
Allowable Subject Matter
Claims 7-8 and 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: none of the cited art teaches or suggests determining a threshold of height or width differences between multiple displays arranged in a matrix orientation for performing various operations, i.e.,
(2) a height difference between a first row and a second row adjacent to each other in the matrix is higher than or equal to a height threshold, or a width difference between a first column and a second column adjacent to each other in the matrix is higher than or equal to a width threshold: the receiving circuit uses a non-stitching mode resolution to perform handshakes so as to obtain a second image data, wherein the second image data comprises a second image having the non-stitching mode resolution, the processing circuit is configured to generate the picture data respectively comprising the second image.
None of the cited art teaches or suggests:
(2) a first row and a second row adjacent to each other in the matrix have different heights, and a height difference between the first row and the second row is lower than a height threshold: the processing circuit reduces resolutions of one or more of the sub-images of one of the first row and the second row; and in response to a condition, determined by the processing circuit through the display capability data, that (1) the display devices are configured to be arranged in a matrix so the sub-images are used to form a rectangular stitched image, and (2) a first column and a second column adjacent to each other in the matrix have different widths, and a width difference between the first column and the second column is lower than a width threshold: the processing circuit reduces resolutions of one or more of the sub-images of one of the first column and the second column.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. PGPUB 20250103269 to Rothschild for a method of determining Edid (compatibility information) for displays
U.S. PGPUB 20230324952 to Martinson et al. for a method of forming a matrix of display panels
U.S. PGPUB 20220012000 to Thyagarajan et al. for a method of forming a monitor array of different sizes and orientations.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW GUS YANG whose telephone number is (571)272-5514. The examiner can normally be reached M-F 9 AM - 5:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kent Chang can be reached at (571)272-7667. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANDREW G YANG/Primary Examiner, Art Unit 2614
3/2/26