Prosecution Insights
Last updated: May 29, 2026
Application No. 18/773,891

MULTILAYER FEEDTHROUGH CAPACITOR

Non-Final OA §102§112
Filed
Jul 16, 2024
Priority
Aug 30, 2023 — JP 2023-139719
Examiner
TORRES, TIMOTHY JOSEPH
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
TDK Corporation
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
3 currently pending
Career history
4
Total Applications
across all art units

Statute-Specific Performance

§103
60.0%
+20.0% vs TC avg
§102
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim(s) 4 and 6 recite(s) the limitation "…a plurality of second internal electrodes opposing each other with an interval smaller than the interval between the at least one fourth internal electrode and the at least one fifth internal electrode." in lines 21-24 of claim 4 and lines 6-9 of claim 6. Since “an interval” and “the interval” are referring to a different interval, there is insufficient antecedent basis for the limitation “the interval” in the claims. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Togashi et al. (US 2012/0250218 A1), hereafter referred to as Togashi. PNG media_image1.png 697 1230 media_image1.png Greyscale Figure 1: Examiner drawn capacitor stack of a modification example as described by Togashi in paragraphs 0050-0064 and 0085-0088. Relative internal electrode connection widths and regions chosen for a first mapping are shown. The perspective shown is equivalent to Fig. 3 of Togashi. PNG media_image2.png 704 1258 media_image2.png Greyscale Figure 2: Examiner drawn capacitor stack of a modification example as described by Togashi in paragraphs 0050-0064 and 0085-0088. Relative internal electrode connection widths and regions chosen for a second mapping are shown. The perspective shown is equivalent to Fig. 2 of Togashi. PNG media_image3.png 692 1318 media_image3.png Greyscale Figure 3: Examiner drawn capacitor stack of a modification example as described by Togashi in paragraphs 0050-0064 and 0085-0088. Relatove internal electrode connection widths and regions chosen for a third mapping are shown. The perspective shown is equivalent to Fig. 2 of Togashi. In regards to claim 1, Togashi discloses A multilayer feedthrough capacitor comprising: an element body (L – Fig. 1); a pair of first external electrodes disposed on the element body and separated from each other (1, 2 – Fig. 1 or 3, 4 – Fig. 1); a second external electrode disposed on the element body and separated from the pair of first external electrodes (3 and/or 4 – Fig. 1 or 1 and/or 2 – Fig. 1); and a plurality of internal electrodes disposed in the element body (20, 30, 31, 40, 41 – Fig. 2 paragraph 0064), wherein the plurality of internal electrodes include at least one first internal electrode connected to the pair of first external electrodes (31 nearest La – Fig. 2 paragraph 0059 or 40 nearest La – Fig. 2 paragraph 0062), at least one second internal electrode connected to the pair of first external electrodes (20 – Fig. 2 paragraph 0053 or 40 second nearest La – Fig. 2 paragraph 0062 or 41 nearest Lb paragraph 0062), and at least one third internal electrode connected to the second external electrode (41 second nearest La – Fig. 2 paragraph 0062 or 30 nearest La – Fig. 2 paragraph 0059), the element body includes a first region in which the at least one first internal electrode and the at least one third internal electrode are disposed and oppose each other (Region 1 – Figure 1 shown above or Region 1 – Figure 2 shown above), and a second region in which the at least one second internal electrode is disposed (Region 2 – Figure 1 shown above or Region 2 – Figure 2 shown above or Region 2 – Figure 3 shown above), the at least one first internal electrode is connected to the pair of first external electrodes with a first connection width (31 – Fig. 13 (b) paragraph 0085 or 40 with smaller area – Fig. 15 (b) paragraph 0087), and the at least one second internal electrode is connected to the pair of first external electrodes with a second connection width larger than the first connection width (20 – Fig. 5 is depicted as having a larger connection width as compared to 31 – Fig. 13 (b) or 40 with larger area – Fig. 15 (a) paragraph 0087 or 41 with larger area – Fig. 16 (a) paragraph 0088). In regards to claim 2, Togashi discloses The multilayer feedthrough capacitor according to claim 1, wherein the plurality of internal electrodes further include at least one fourth internal electrode connected to the pair of first external electrodes (30 nearest Lb – Figure 1 shown above or 41 second nearest Lb – Figure 2 shown above) and at least one fifth internal electrode connected to the second external electrode (40 nearest Lb – Figure 1 shown above or 31 nearest Lb – Figure 2 shown above), the element body further includes a third region in which the at least one fourth internal electrode and the at least one fifth internal electrode are disposed to oppose each other (Region 3 – Figure 1 shown above or Region 3 – Figure 2 shown above), the at least one fourth internal electrode is connected to the pair of first external electrodes with a third connection width smaller than the second connection width (30 – Fig. 14 (b) paragraph 0086 or 41- Fig. 16 (b) paragraph 0088), and the second region is positioned between the first region and the third region (Figure 1 shown above or Figure 2 shown above). In regards to claim 3, Togashi discloses The multilayer feedthrough capacitor according to claim 2, wherein the at least one fourth internal electrode (41 second nearest Lb – Figure 2 shown above) includes an electrode region opposing the at least one fifth internal electrode (31 nearest Lb – Figure 2 shown above) and having a width larger than the third connection width (41 smaller area – Fig. 16 (b)). In regards to claim 4, Togashi discloses The multilayer feedthrough capacitor according to claim 2, wherein the at least one second internal electrode (20 – Fig. 2) includes a plurality of second internal electrodes opposing each other (20 – Fig. 8) with an interval smaller than the interval (G0, G2 – Fig. 8 paragraphs 0065-0066) between the at least one fourth internal electrode (30 nearest Lb – Fig. 8) and the at least one fifth internal electrode (40 nearest Lb – Fig. 8). In regards to claim 5, Togashi discloses The multilayer feedthrough capacitor according to claim 1, wherein the at least one first internal electrode (40 nearest La – Fig. 2) includes an electrode region opposing the at least one third internal electrode (30 nearest La – Fig. 2) and having a width larger than the first connection width (40 smaller area – Fig. 15 (b)). In regards to claim 6, Togashi discloses The multilayer feedthrough capacitor according to claim 1, wherein the at least one second internal electrode (20 – Fig. 2) includes a plurality of second internal electrodes opposing each other (20 – Fig. 8) with an interval smaller than the interval (G0, G4 – Fig. 8 paragraphs 0065-0066) between the at least one first internal electrode (31 nearest La – Fig. 2) and the at least one third internal electrode (41 second nearest La – Fig. 2). In regards to claim 7, Togashi discloses The multilayer feedthrough capacitor according to claim 1, wherein the plurality of internal electrodes further include at least one sixth internal electrode connected to the pair of first external electrodes (41 second nearest La – Figure 3 shown above paragraph 0062), the element body further includes a fourth region in which the at least one sixth internal electrode is disposed (Region 4 – Figure 3 shown above), the at least one sixth internal electrode is connected to the pair of first external electrodes with a fourth connection width larger than the first connection width (41 with larger area – Fig. 16 (a) paragraph 0088), and the first region is positioned between the second region and the fourth region (Region 1, Region 2, Region 4 – Figure 3 shown above). In regards to claim 8, Togashi discloses The multilayer feedthrough capacitor according to claim 1, wherein the at least one first internal electrode (31 nearest La – Figure 1 shown above) includes a plurality of first internal electrodes having different first connection widths (31, 30 nearest La – Figure 1 shown above; Note: as claimed in claims 1 and 8, it is not required that each of the at least one first internal electrodes have a connection width smaller than the second connection width. Therefore, 30, which is depicted as having the same connection width as the second connection width in Togashi, reads on the claim). In regards to claim 9, Togashi discloses The multilayer feedthrough capacitor according to claim 2, wherein the element body includes first and second side surfaces opposing each other (La, Lb – Figure 1 shown above paragraph 0042), the first region is positioned at an outermost position of the first side surface in a direction in which the pair of side surfaces opposes each other (Region 1, La, Lb, - Figure 1 shown above), and the third region is positioned at an outermost position of the second side surface in the direction in which the first and second side surfaces oppose each other (Region 3, La, Lb – Figure 1 shown above). In regards to claim 10, Togashi discloses The multilayer feedthrough capacitor according to claim 7, wherein the element body includes first and second side surfaces opposing each other (Lb, La – Figure 3 shown above paragraph 0042), the second region is positioned at an outermost position of the first side surface in a direction in which the pair of side surfaces opposes each other (Region 2, Lb, La – Figure 3 shown above), and the fourth region is positioned at an outermost position of the second side surface in the direction in which the first and second side surfaces oppose each other (Region 4, Lb, La – Figure 3 shown above). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sasaki US 2022/0068561 A1 – Fig. 5-9 Sasaki US 2022/0270825 A1 – Figs. 5-8 Park et al. 2017/0367188 – Figs. 2, 3, 8, 9 Togashi US 2008/0013248 A1 – Fig. 2 Ritter US 2016/0346555 A1 – Figs. 7A-D Adachi et al. 9715967 – Fig. 7 Col. 10 lines 22-49 Park et al. US 2016/0050759 A1 – Figs. 3, 5, 8, 10 Park et al. US 2016/0049252 A1– Figs. 3-5 Aoki et al. JP 2009218363 A – Figs. 4, 5, 8, 9, 12, 13, 17, 18, 21, 22, 25, 26 Akazawa et al. US 2012/0188684 A1 Figs. 2-6 Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy Torres whose telephone number is (571)272-9896. The examiner can normally be reached Mon-Fri 7:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /T.J.T./Examiner, Art Unit 2847 /Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Jul 16, 2024
Application Filed
Apr 17, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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