DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Note by the Examiner
For clarity, references to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and examiner explanations for 102 &/or 103 rejections are provided in parenthesis.
Election/Restrictions
Applicant’s election without traverse of Species I, drawn to Fig. 3, in the reply filed on 8/11/2026 is acknowledged.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 122R-1, 122R-2, 122G-1, 122G-2, 122B-1, and 122B-2 in Figs. 3, 7-10, and 12-15; and 120uR, 120uG, 120uB, 120bR, 120bG, and 120bB in Fig. 3. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-15 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the same surface" in the twelfth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Due to their dependency, claims 2-13 are rejected as well.
Claim 14 recites the limitation "the second surface" in the ninth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Due to their dependency, claims 15 and 20 are rejected as well.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3-5, and 12-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Danesh et al. (Pub. No.: US 20180114878 A1), hereinafter as Danesh.
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Image A: close up of Danesh Fig. 9, showcasing first and second surfaces.
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Image B: close up of Danesh Fig. 23, showcasing chips, terminals, and various surfaces.
With regards to claim 1, Danesh teaches a display device, comprising: a substrate (see Danesh Fig. 23, backplane substrate 400; Danesh [0094]) having a first surface (see Image A) and a second surface (see Image A) opposite the first surface (see Image A); a first chip (see Danesh Fig. 23 and Image B, third light emitting devices 10R, conductive interconnect structures 480, and third conductive bonding structure 430R; Danesh [0075], [0103], and [0157]; see Danesh [0075]: “In one embodiment, devices (10B, 10G, 10R, 10S) can include light emitting devices (10B, 10G, 10R).”) arranged on the first surface (see Image A) and having a first terminal forming surface (see Image B) on which a first terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480; Danesh [0157]) is arranged on an opposite side of a first mounting surface (see Image B) in contact with the first surface (see Image B and Image A); and a second chip (see Danesh Fig. 23 and Image B, second light emitting devices 10G, conductive interconnect structures 480, and second conductive bonding structure 430G; Danesh [0075], [0103], and [0157]; see Danesh [0075]) arranged on the first surface (see Image A), having a second terminal forming surface (see Image B) on which a second terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) is arranged on an opposite side of a second mounting surface (see Image B) in contact with the first surface (see Image B and Image A), and having a different thickness (see Danesh Fig. 23 and Danesh [0140]: “the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices… The green light emitting device may have a thickness of 7 microns… The red light emitting device may have a thickness of 8 microns…”) from the first chip (see Danesh Fig. 23 and Danesh [0140]), wherein an upper surface (see Image B) of the first terminal and an upper surface (see Image B) of the second terminal are located on a same surface (see Danesh Fig. 23 and Image B) parallel to the second surface (see Danesh Fig. 23).
With regards to claim 3, Danesh teaches the display device according to claim 1, wherein the first surface (see Image A) of the substrate (see Danesh Fig. 23, backplane substrate 400) has a first recess (see Danesh Fig. 9, third region R3; Danesh [0096]) on which the first chip (see Danesh Fig. 23 and Image B, third light emitting devices 10R, conductive interconnect structures 480, and third conductive bonding structure 430R) is arranged (see Danesh Fig. 23), and a second recess (see Danesh Fig. 9, second region R2; Danesh [0096]) on which the second chip (see Danesh Fig. 23 and Image B, second light emitting devices 10G, conductive interconnect structures 480, and second conductive bonding structure 430G) is arranged (see Danesh Fig. 23) and having a different depth from the first recess (see Danesh Figs. 9&23).
With regards to claim 4, Danesh teaches the display device according to claim 3, wherein the same surface (see Image B) is located above the first surface (see Image A).
With regards to claim 5, Danesh teaches the display device according to claim 3, wherein the substrate (see Danesh Fig. 23, backplane substrate 400) includes glass (see Danesh [0094]: “In one embodiment, the backplane substrate 400 can be a substrate of silicon, glass, plastic, and/or at least other material that can provide structural support to the devices to be subsequently transferred thereupon.”, where one would choose glass.).
With regards to claim 12, Danesh teaches the display device of claim 1, wherein the first chip (see Danesh Fig. 23 and Image B, third light emitting devices 10R, conductive interconnect structures 480, and third conductive bonding structure 430R) is selected from a group (see Danesh Fig. 23, devices 10B, 10G, 10R, 10S; Danesh [0075]) consisting of an LED chip (see Danesh [0070]: “As used herein, a “light emitting device” refers to any device that is configured to emit light and includes, but is not limited to, a light emitting diode (LED), a laser, such as a vertical-cavity surface-emitting laser (VCSEL), and any other electronic device that is configured to emit light upon application of a suitable electrical bias.”, where one would choose the light emitting devices to be LEDs; and see Danesh [0075]: “In one embodiment, devices (10B, 10G, 10R, 10S) can include light emitting devices (10B, 10G, 10R).”) including an LED that emits red light (see Danesh [0140]: “In an illustrative example of a three-color RGB display panel comprising sensors, the first light emitting devices 10B can be blue light emitting devices, the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices.”), an LED chip including an LED that emits green light (see Danesh [0140]), an LED chip including an LED that emits blue light (see Danesh [0140]), and a circuit chip (see Danesh [0075]: “In addition, an array of sensor devices 10S can be formed on a fourth-type growth substrate 100S.”).
With regards to claim 13, Danesh teaches the display device of claim 12, wherein the second chip (see Danesh Fig. 23 and Image B, second light emitting devices 10G, conductive interconnect structures 480, and second conductive bonding structure 430G) is selected from the group (see Danesh Fig. 23, devices 10B, 10G, 10R, 10S) and is different from the first chip (see Danesh [0140]: “the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices…”, where second light emitting devices 10G emits a different color than third light emitting devices 10R, which makes the second chip different from the first chip.).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2, 14, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Danesh, in view of Li et al. (Pub. No.: US 20210366881 A1), hereinafter as Li.
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Image C: close up of Li Fig. 7, showcasing first and second terminals.
With regards to claim 2, Danesh teaches the display device according to claim 1.
Danesh does not teach a wiring connecting the first terminal and the second terminal and located on the same surface.
Li teaches a wiring (see Li Fig. 7, driving wire layer 60; Li [0045] & [0072]) connecting a first terminal (see Li Fig. 7 and Image C, second pin 202; Li [0045] & [0076]) and a second terminal (see Image C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to add the wiring taught by Li to the device of Danesh in order to convey driving signals to the chips.
Together, Danesh and Li teach a wiring (see Li Fig. 7, driving wire layer 60; Li [0045] & [0072]) connecting the first terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) and the second terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) and located on the same surface (see Image B).
With regards to claim 14, Danesh teaches a method for manufacturing a display device, comprising: forming a first recess (see Danesh Fig. 9, third region R3; Danesh [0096]) and a second recess (see Danesh Fig. 9, second region R2; Danesh [0096]) having a different depth from the first recess (see Danesh Figs. 9&23) on a first surface (see Image A) of a substrate (see Danesh Fig. 23, backplane substrate 400; Danesh [0094]); mounting a first chip (see Danesh Fig. 23, third light emitting devices 10R, conductive interconnect structures 480, and third conductive bonding structure 430R; Danesh [0075], [0103], and [0157]; see Danesh [0075]) having a first terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480; Danesh [0157]) on the first recess (see Danesh Fig. 23); mounting a second chip (see Danesh Fig. 23, second light emitting devices 10G, conductive interconnect structures 480, and second conductive bonding structure 430G; Danesh [0075], [0103], and [0157]; see Danesh [0075]) having a second terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) and having a different thickness from the first chip (see Danesh Fig. 23 and Danesh [0140]: “the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices… The green light emitting device may have a thickness of 7 microns… The red light emitting device may have a thickness of 8 microns…”) on the second recess (see Danesh Fig. 23); forming an insulating layer (see Danesh Fig. 23, transparent encapsulation dielectric layer 470; Danesh [0139]) above the first chip and the second chip (see Danesh Fig. 23), the insulating layer having a surface (see Image B, same surface) including an upper surface (see Image B) of the first terminal and an upper surface (see Image B) of the second terminal parallel to a second surface (see Image A) opposite to the first surface (see Image A and Image B).
Danesh does not teach forming a wiring connecting the first terminal and the second terminal on the surface.
Li teaches forming a wiring (see Li Fig. 7, driving wire layer 60; Li [0045] & [0072]) connecting a first terminal (see Li Fig. 7 and Image C, second pin 202; Li [0045] & [0076]) and a second terminal (see Image C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to add the wiring taught by Li to the device of Danesh in order to convey driving signals to the chips.
Together, Danesh and Li teach forming a wiring (see Li Fig. 7, driving wire layer 60; Li [0045] & [0072]) connecting the first terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) and the second terminal (see Danesh Fig. 23 and Image B, conductive interconnect structures 480) on the surface (see Image B, same surface).
With regards to claim 20, Danesh and Li teach the method for manufacturing the display device according to claim 14, wherein the first chip (see Danesh Fig. 23, third light emitting devices 10R, conductive interconnect structures 480, and third conductive bonding structure 430R) and the second chip (see Danesh Fig. 23, second light emitting devices 10G, conductive interconnect structures 480, and second conductive bonding structure 430G) are different from each other (see Danesh [0140]: “the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices…”, where second light emitting devices 10G emits a different color than third light emitting devices 10R, which makes the second chip different from the first chip.) and both are selected from a group (see Danesh Fig. 23, devices 10B, 10G, 10R, 10S; Danesh [0075]) consisting of an LED chip (see Danesh [0070]: “As used herein, a “light emitting device” refers to any device that is configured to emit light and includes, but is not limited to, a light emitting diode (LED), a laser, such as a vertical-cavity surface-emitting laser (VCSEL), and any other electronic device that is configured to emit light upon application of a suitable electrical bias.”, where one would choose the light emitting devices to be LEDs; and see Danesh [0075]: “In one embodiment, devices (10B, 10G, 10R, 10S) can include light emitting devices (10B, 10G, 10R).”) including an LED that emits red light (see Danesh [0140]: “In an illustrative example of a three-color RGB display panel comprising sensors, the first light emitting devices 10B can be blue light emitting devices, the second light emitting devices can be green light emitting devices, and the third light emitting devices can be red light emitting devices.”), an LED chip including an LED that emits green light (see Danesh [0140]), an LED chip including an LED that emits blue light (see Danesh [0140]), and a circuit chip (see Danesh [0075]: “In addition, an array of sensor devices 10S can be formed on a fourth-type growth substrate 100S.”).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Danesh and Li, in view of Smith et al. (Patent No.: US 6479395 B1), hereinafter as Smith.
With regards to claim 15, Danesh and Li teach the method for manufacturing the display device according to claim 14, wherein the substrate (see Danesh Fig. 23, backplane substrate 400) includes glass (see Danesh [0094]: “In one embodiment, the backplane substrate 400 can be a substrate of silicon, glass, plastic, and/or at least other material that can provide structural support to the devices to be subsequently transferred thereupon.”, where one would choose glass.).
Danesh and Li do not teach forming the first recess and the second recess is performed by etching using hydrofluoric acid.
Smith teaches forming a recess (see Smith Fig. 3C, opening 105; Smith col. 7, ln. 9) is performed by etching using hydrofluoric acid (see Smith col. 7, lns. 10-24: “In one example of the present invention, the etch to create the opening 105 is a wet etch. The preferred etch mix depends on the type of glass used. The etch mix contains dilute hydrofluoric acid and, preferably, an additional acid such as nitric acid, sulfuric acid, perchloric acid, or more preferably a halide acid such as hydrobromic acid or hydrochloric acid or hydriodic acid. The ratio of water to the second acid to hydrofluoric acid ranges from 2:1:1 to 50:20:1, depending on the type of glass used for the substrate. The substrate is etched for roughly one quarter of the total etch time. In one particular embodiment, the ratios of an etchant which includes water, hydrochloric acid and hydrofluoric acid is 4:1:1 (water:hydrochloric:hydrofluoric) and the total etch time is such that the total depth of the etchant produces an opening having a depth of 14.5 microns.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to etch with hydrofluoric acid, as taught by Smith, the recesses of Danesh and Li in order to create a deep recess in a glass substrate while also controlling the width (see Smith col. 9, lns. 22-27: “Using the method shown in FIGS. 3A through 3G, it is possible to create a deep opening which is not too wide and which includes a beveled edge. This opening has improved characteristics for receiving separately fabricated elements which may be assembled by a self assembly process, such as fluidic self assembly.”).
Together, Danesh, Li and Smith teach forming the first recess (see Danesh Fig. 9, third region R3) and the second recess (see Danesh Fig. 9, second region R2) is performed by etching using hydrofluoric acid (see Smith col. 7, lns. 10-24).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EKATERINA T BIRCH whose telephone number is (571)272-8676. The examiner can normally be reached Mon-Fri, 8am-4pm ET.
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/E.T.B./Examiner, Art Unit 2818
/STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
