DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As to claims 1 and 9, applicant is claiming that the power ratio signal is applied to control an output power of the power supply. However, it is unclear from the claim language how the power signal ratio is controlling an output power of the power supply. It is also unclear where is the power ratio signal is applied to control an output power of the power supply. Due to the absence of recitation of any steps to control an output power of the power supply the claim has been rendered indefinite.
Claims 2 - 8 are rejected by virtue of their dependency on claim 1.
Claims 10 - 13 are rejected by virtue of their dependency on claim 9.
Claims 1 and 9 are rejected in so far as understood by the Examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liao et al. (2013/0250631).
As to claim 1, Liao et al. (hereinafter Liao) discloses a power supply circuit with power factor correction function, and automatic gain control, circuit therefore and control method thereof comprising: a sensing circuit (Fig. 2, 220; Fig. 6, 6032; Fig. 7, 7032), [0040], [0045, the load driver circuit 603 has a differential amplifier circuit A3, a power stage circuit 6031, and a current sense circuit 6032.], coupled to a power supply (Fig. 2B, 200), including a plurality of impedance devices (Fig. 9A – 9K and Fig. 4), detecting an output power signal (Fig. 2B, 200) of the power supply (Fig. 2B, Vout/Iout), obtaining a sensing impedance (Fig. 6, 6032) from one of the impedance devices (Fig. 9A – 9K) corresponding to the output power signal (Fig. 2B, Vout/Iout), and generating a power sensing signal (Fig. 2B, Vout/Iout) according to the sensing impedance (Fig. 6, 6032) and the output power signal (Fig. 2B, Vout/Iout); and a signal generation circuit (Fig. 2B, 2503; Fig. 8, 9051, 9052), coupled to the sensing circuit (Fig. 6, 6032; Fig. 7, 7032), including a calibration circuit (Fig. 2B, 210, 2503; Fig. 8, 905), generating a power ratio signal (Fig. 8, control signal, 9053, 9054; Fig. 2B, CS; Fig. 6, 7, current sensing signal) according to the power sensing signal (Fig. 2B, Vout/Iout), and the calibration circuit (Fig. 2B, 210, 2503; Fig. 8, 905) generating a calibrating signal (Vrsin, Fig. 2B, 4, 8) according to the power ratio signal (Fig. 8, control signal, 9053, 9054) and feeding the calibrating signal (Vrsin) to the signal generation circuit (Fig. 2B, 2503, Fig. 8, 9051, 9052) for driving the signal generation circuit (Fig. 2B, 2503, Fig. 8, 9051, 9052) further generating the power ratio signal according to the calibrating signal (Fig. 8, Vrsin); where the power ratio signal (Fig. 8, control signal, 9053, 9054; Fig. 2B, CS; Fig. 6, 7, current sensing signal) is applied to control an output power of the power supply ((Fig. 2B, 200; Fig. 4, 8).
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As to claim 9, Liao et al. (hereinafter Liao) discloses a power supply circuit with power factor correction function, and automatic gain control, circuit therefore and control method thereof comprising: sensing an output power signal of a power supply (Fig. 2B, 200) by a sensing circuit (Fig. 2, 220; Fig. 6, 6032; Fig. 7, 7032), [0040], [0045, the load driver circuit 603 has a differential amplifier circuit A3, a power stage circuit 6031, and a current sense circuit 6032.],and obtaining a sensing impedance (Fig. 6, 6032) from one of a plurality of impedance devices (Fig. 9A – 9K) corresponding to the output power signal (Fig. 2B, Vout/Iout), for generating a power sensing signal (Fig. 2B, Vout/Iout); a signal generation circuit (Fig. 2B, 2503; Fig. 8, 9051, 9052) generating a power ratio signal according to the power sensing signal (Fig. 2B, Vout/Iout); and a calibration circuit (Fig. 2B, 210, 2503; Fig. 8, 905) generating a calibrating signal (Vrsin, Fig. 2B, 4, 8) based on the power ratio signal (Fig. 8, control signal, 9053, 9054) for driving the signal generation circuit (Fig. 2B, 2503, Fig. 8, 9051, 9052) to perform a feedback control (Vrsin) and generate the power ratio signal (Fig. 2B, 2503, Fig. 8, 9051, 9052); where the power ratio signal (Fig. 8, control signal, 9053, 9054; Fig. 2B, CS; Fig. 6, 7, current sensing signal) is applied to control an output power of the power supply (Fig. 2B, 200; Fig. 4, 8).
Prior Art of Record
The prior art made of record and not relied upon is considered pertinent to applicant s disclosure.
Yang (10,044,274) is cited for its disclosure of a protection circuit for power supply.
So (4,795,969) is cited for its disclosure of load loss standard for testing and calibrating high voltage power measuring systems.
MIRVAKILI (2024/0250611) is cited for its disclosure of systems and methods for supplying power and high precision voltage measurement.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to REENA AURORA whose telephone number is (571)272-2263. The examiner can normally be reached M-F: 8:00AM-5:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 5712705628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/REENA AURORA/Primary Examiner, Art Unit 2858