Prosecution Insights
Last updated: July 17, 2026
Application No. 18/774,969

PHOTONIC CHIP COUPLER CONNECTOR MODULE

Non-Final OA §103
Filed
Jul 17, 2024
Priority
Jul 24, 2020 — provisional 63/055,901 +1 more
Examiner
WONG, ERIC K
Art Unit
Tech Center
Assignee
Molex LLC
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
781 granted / 930 resolved
+24.0% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
36 currently pending
Career history
967
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
76.7%
+36.7% vs TC avg
§102
19.2%
-20.8% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 930 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-21 of U.S. Patent No. 12,068,791. Although the claims at issue are not identical, they are not patentably distinct from each other because the patented case contains all the limitations currently claimed since the current application broadens the claims and separates some features from prior independent claims into dependent form. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-3, 5-8, 10-14 and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 10,684,419 to Fortusini et al. in view of US 2021/0271037 to Brusberg et al. Fortusini discloses in figures 11-12 and 23A-23B, an optical interconnect module comprising: A coupler (1110) for interfacing to a photonic integrated chip (1120), the coupler comprising at least one guide pin (column 22, line 1); Wherein the coupler further comprises a lens plate (1012) extending (sp) downwardly from a bottom surface of the coupler and is configured to connect optical fibers and the PIC. As to claim 2, the coupler comprises waveguide structure (1111, 1211, 2311) that direct multiple rows of fiber signals into a single row of signals through waveguide coupling (figures 11-12, 23A-23b and abstract). As to claim 3, latching components are disclosed (column 23, line 12). As to claim 6, visual surface indicators are disclosed (“F”; figure 22B) or the structural notch (1260) in figure 12. As to claim 7, no structure is recited as to how polarization is preserved. At the very minimum, no polarizers are disclosed in Fortusini’s coupler to suggest polarization is to be altered. As to claim 8, multiple attachment points are disclosed from notches to adhesives to alignment pins. As to claim 10, metal films are deposited (column 19, line 62). As to claim 11, the coupler is glass (Summary; Specification). As to claim 12, lenses are disclosed (1012). As to claim 13, a chip side facet is disclosed (edge face 2314). As to claim 14, waveguides are coupled to fibers. As to claim 16, latching structure is disclosed (column 23, line 11). Claims 17-21 are method claims that relate to providing the above structure. However, Fortusini fails to explicitly disclose a detachable ferrule connector to the above coupling structure. It is noted that connectorizing or adding removable connectors is generally practiced in the optical communications art. Further, although not shown, it would be implied that the input end of Fortusini would be connected somehow to either a source or destination location. Fortusini at various points in the Specification discloses connectors and even MT connections with various additional alignment guides, pins and securing features (such as pins disclosed in column 21, line 59). Brusberg discloses such a detachable ferrule connector to a waveguide coupler that couples to a PCB (figures 7C and 9A-9C). As to claim 5, two guide pins are disclosed. It would have been obvious to one having ordinary skill in the art to add the detachable connector taught by Brusberg to connect and couple light to the PCB of Fortusini to make the cable replaceable. Claim(s) 4, 9, 15 and 22-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fortusini in view of Brusberg as applied to claims above, and further in view of US 2022/0082759 to Butler et al. Fortusini in view of Brusberg discloses the interconnect as claimed except for certain well-known added features related to interconnects below. For each of these listed claims, Butler discloses the following: As to claim 4, a tensioning member (980) is disclosed. As to claim 15, a 250 micrometer pitch is disclosed (paragraph 5). Claims 22-23 are method claims that recite steps of providing the above structure. Since the structure is present, the method of supplying these parts would also be anticipated. It would have been obvious to one having ordinary skill in the art to combine well known features taught by Butler in the interconnect of Fortusini in view of Brusberg to create a more secure connection. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2021/0109298 (lenses 40). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eric K Wong whose telephone number is (571)272-2363. The examiner can normally be reached M-Tu, Th-F 8A-6P. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ERIC K. WONG Primary Examiner Art Unit 2874 /Eric Wong/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Jul 17, 2024
Application Filed
Jun 16, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
92%
With Interview (+8.4%)
2y 2m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 930 resolved cases by this examiner. Grant probability derived from career allowance rate.

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