Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 pending
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 state “treatment temperature is ℃ to 1350 ℃.”, as “is ℃” does not state the low range of the temperature.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 11, 13, 17-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sano (US Pat. 5,486,237).
Consider Claim 1, Sano teaches the process of forming coating component (abstract), the process include forming on a substrate surface (21) a silicon-based Bond coating/first amorphous silicon layer (22) having dispersed crystal phase (23) (grain of crystalline silicon) (Col. 4, lines 37-47, figure 3), and forming barrier coating (2nd amorphous silicon layer 24) on the silicon-based Bond coating (1st amorphous silicon layer 22) (figure 3).
Consider Claim 11, Sano teaches the process in the above claimed, including amorphous silicon phase (22) having a thickness spans from the substrate (21) to the inner surface of the barrier layer (24) (figure 3), leading to having a 3D structure.
Sano does not explicitly teach a 3-dimensional network and a bond.
However, the prior art of Sano teaches each and every process step and limitation of the applicant’s claims, including the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”. Since the “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” by the applicant’s claimed process is simply a function of the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”, and the prior art of Sano teaches the claimed process steps. The process of the prior art of Sano would have naturally flow or inherently produced “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” unless essential process steps and/or limitations are missing from the applicant’s claims.
Consider Claim 13, Sano teaches the process of forming amorphous silicon phase dope with boron (Col. 7, lines 15-17).
Consider Claim 17, Sano teaches the process of forming grains crystalline silicon (23) with size ranging from 0.01 micrometer to 10 microns (Col. 5, lines 5-6).
Consider Claim 18, Sano teaches the amorphous silicon phase is a continuous phase, and wherein the grains of crystalline silicon form a plurality of discrete particulate phases within the amorphous silicon phase (Figure 3).
Alternatively, Claim(s) 1 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sano (US Pat. 5,486,237).
Consider Claim 1, Sano teaches the process of forming coating component (abstract), the process include forming on first amorphous silicon layer (22) as a substrate, second amorphous layer (24) having dispersed crystal phase (23) (grain of crystalline silicon) (Col. 4, lines 37-47, figure 3), and forming additional undoped amorphous silicon as barrier coating on the silicon-based Bond coating (additional undoped 2nd amorphous silicon layer) as plural layers of undoped amorphous silicon are formed on the doped first silicon layer (Col. 6, lines 30-32). Leading to having first amorphous silicon (22) as substrate, second undoped amorphous silicon layer (24) having grain of crystalline silicon (23) as silicon based bond coating, and the additional undoped amorphous silicon as barrier coating.
Consider Claim 12, Sano teaches the process of forming second undoped amorphous silicon phase (24) (figure 3, Col. 5, lines 22-30) with pure silicon (undoped).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 11, 13, 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Sano (US Pat. 5,486,237).
Consider Claim 1, Sano teaches the process of forming coating component (abstract), the process include forming on a substrate surface (21) a silicon-based Bond coating/first amorphous silicon layer (22) having dispersed crystal phase (23) (grain of crystalline silicon) (Col. 4, lines 37-47, figure 3), and forming barrier coating (2nd amorphous silicon layer 24) on the silicon-based Bond coating (1st amorphous silicon layer 22) (figure 3).
Consider Claim 11, Sano teaches the process in the above claimed, including amorphous silicon phase (22) having a thickness spans from the substrate (21) to the inner surface of the barrier layer (24) (figure 3), leading to having a 3D structure.
Sano does not explicitly teach a 3-dimensional network and a bond.
However, the prior art of Sano teaches each and every process step and limitation of the applicant’s claims, including the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”. Since the “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” by the applicant’s claimed process is simply a function of the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”, and the prior art of Sano teaches the claimed process steps. The process of the prior art of Sano would have naturally flow or inherently produced “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” unless essential process steps and/or limitations are missing from the applicant’s claims.
Consider Claim 13, Sano teaches the process of forming amorphous silicon phase dope with boron (Col. 7, lines 15-17).
Consider Claim 17, Sano teaches the process of forming grains crystalline silicon (23) with size ranging from 0.01 micrometer to 10 microns (Col. 5, lines 5-6). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
Consider Claim 18, Sano teaches the amorphous silicon phase is a continuous phase, and wherein the grains of crystalline silicon form a plurality of discrete particulate phases within the amorphous silicon phase (Figure 3).
Claim(s) 1, 11, 13-18, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Luczak (PG Pub 2014/0079559 A1) in view of Sano (US Pat. 5,486,237), with Liu (Thermal conductivity of amorphous and nanocrystalline silicon films prepared by hot-wire chemical-vapor deposition, as evidentiary support)).
Consider Claim 1, Luczak teaches the process of coating a CMC substrate (128) with silicon-based Bond layer (132), and an environmental barrier coating (130) on top of the silicon-based bond layer (132) (figure 4, [0045]-[0046]).
Luczak does not teach the silicon-based bond layer comprising amorphous silicon phase having grains of crystalline silicon distributed within.
However, Sano is in the prior art of forming silicon-based bond layer (132) between the substrate surface (128) and the barrier coating (130) (figure 3), teaches the process include forming on a substrate surface (21) a silicon-based Bond coating/first amorphous silicon layer (22) having dispersed crystal phase (23) (grain of crystalline silicon) (Col. 4, lines 37-47, figure 3), and forming barrier coating (2nd amorphous silicon layer 24) on the silicon-based Bond coating (1st amorphous silicon layer 22) (figure 3).
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak with Sano form grain of crystalline silicon within the amorphous silicon layer, to increase the thermal conductivity of the silicon film to a 70% higher (Liu, abstract), allowing Luczak’s blade (66) and shim (94) to dissipate heat during the thermal expansion and contraction (of Luczak, [0053]) at faster rate using the formed crystalline silicon (of Sano), by increasing the thermal conductivity needed for heat dissipation due to the thermal expansion and contraction.
Consider Claim 11, the combined Luczak (with Sano) teaches the process in the above claimed, including amorphous silicon phase (22) having a thickness spans from the substrate (21) to the inner surface of the barrier layer (24) (Sano, figure 3), leading to having a 3D structure.
The combined Luczak (with Sano)does not explicitly teach a 3-dimensional network and a bond.
However, the combined Luczak (with Sano) teaches each and every process step and limitation of the applicant’s claims, including the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”. Since the “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” by the applicant’s claimed process is simply a function of the “claimed process in claim 1, and forming a 3D structure between the substrate surface and the inner surface of the barrier coating”, and the combined Luczak (with Sano) teaches the claimed process steps. The process of the combined Luczak (with Sano) would have naturally flow or inherently produced “amorphous silicon phase forms a 3-dimensional network that spans a thickness of the silicon-based bond coating and is bonded to the surface of the substrate and to an inner surface of the barrier coating” unless essential process steps and/or limitations are missing from the applicant’s claims.
Consider Claim 13, the combined Luczak (with Sano) teaches the process of forming amorphous silicon phase dope with boron (Sano, Col. 7, lines 15-17).
Consider Claim 14-16, the combined Luczak (with Sano) teaches the grain of the crystalline silicon to the amorphous silicon layer is about 0.1-1 relative to the film thickness with a thickness ranging from 5 µm to 20 µm (Sano, Col. 4, lines 1-10). Leading to having a volume ratio of grains of crystalline silicon to amorphous silicon of 0.1:1 to 1:1, encompassing 0.05% by Vol, to 50% by Vol. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
Consider Claim 17, the combined Luczak (with Sano) teaches the process of forming grains crystalline silicon (23) with size ranging from 0.01 micrometer to 10 microns (Sano, Col. 5, lines 5-6). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
Consider Claim 18, the combined Luczak (with Sano) teaches the amorphous silicon phase is a continuous phase, and wherein the grains of crystalline silicon form a plurality of discrete particulate phases within the amorphous silicon phase (Sano, Figure 3).
Consider Claim 20, the combined Luczak (with Sano) teaches the substrate comprises ceramic metrics composite comprising silicon carbide (Luczak, [0046]), and where the substrate comprises plurality of CMC woven fibers/plies (Luczak, [0030]).
Claim(s) 2, 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Luczak (PG Pub 2014/0079559 A1) in view of Sano (US Pat. 5,486,237), with Liu (Thermal conductivity of amorphous and nanocrystalline silicon films prepared by hot-wire chemical-vapor deposition, as evidentiary support), and in further view of Mao (US Pat. 4,902,642).
Consider Claims 2 and 5-6, the combined Luczak (with Sano) teaches the process of forming 1st amorphous silicon layer (22) as silicone-based Bond coating on the surface of the substrate (21) using CVD and using silicon precursor (SiH4) and the deposition temperature ranging from 500°C to 600°C (Sano, Col. 4, lines 49-52), where the deposition temperature range from 500°C to 600°C (within claimed range) prevents crystallization of the silicon material.
The combined Luczak (with Sano) does not teach the treatment temperature for forming the grains of crystalline silicon from amorphous silicon
However, Mao is in the process of forming amorphous silicon (18) on top of the silicon film (16) as a substrate (abstract), teaches the process of annealing the layer of the amorphous silicon from the layer of the crystalline silicon (claim 1) by annealing the amorphous layer to a temperature above 1000°C (claim 12).
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak (with Sano) with Mao to form grain of crystalline silicon by annealing the amorphous silicon above 1000°C, to provide with process of forming grain having crystallinity of single crystalline (Col. 6, lines 6-8).
Consider Claim 7, the combined Luczak (with Sano and Mao) teaches the process using silane as silicon containing precursor (Sano, Col. 4, line 48-52), where the second amorphous silicon layer is formed use silane or disilane (Sano, Col. 5, line 28-30). Therefore it would be obvious for ordinary skilled person in the art to replace silane with disilane in forming any amorphous silicon layer, with reasonable and predictable expectation of success.
Claim(s) 3-4 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Luczak (PG Pub 2014/0079559 A1) in view of Sano (US Pat. 5,486,237), and in further view of Mao (US Pat. 4,902,642), and in further view of Stamp (PG Pub 2004/0084149 A1).
Consider Claims 3-4, the combined Luczak (with Sano and Mao) teaches forming the amorphous silicon using CVD process (Sano, Col. 4, lines 49-52).
The combined Luczak (with Sano and Mao) does not teach the range of 400°C to 750°C.
However, Stamp is in the prior art of forming amorphous silicon film into an oxide substrate using trisilane (as a silicon precursor) using CVD processor [0052], teaches the deposition temperature are typically in the range of 400°C to 750°C [0052]. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak (with Sano and Mao) with Stamp to deposit the silicone precursor for forming amorphous silicon layer using CVD processor within the range of 400°C to 750°C, to provide with a desired deposition rate any desired film thickness based on the desired application [0052]-[0053].
Consider Claim 8, the combined Luczak (with Sano and Mao) teaches forming the amorphous silicon using CVD process (Sano, Col. 4, lines 49-52).
The combined Luczak (with Sano and Mao) does not teach the use of chlorosilane.
However, stamp teaches the process of using dichlorosilane, and trichlorosilane as a silicon precursor [0107].
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak (with Sano and Mao) with Stamp to use dichlorosilane, and trichlorosilane as a silicon precursor, with reasonable and predictable expectation of success.
Consider Claim 9, the combined Luczak (with Sano and Mao) teaches forming the amorphous silicon using CVD process (Sano, Col. 4, lines 49-52).
The combined Luczak (with Sano and Mao) does not teach the deposition pressure
However, Stamp is in the prior art of forming amorphous silicon film into an oxide substrate using trisilane (as a silicon precursor) using CVD processor [0052], teaches the deposition pressure within the CVD processor ranges between 0.001 Torr to 780 Torr [0046].
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak (with Sano and Mao) with Stamp to control the partial pressure of the silicon precursor during the deposition process [0046].
Consider Claim 10, the combined Luczak (with Sano and Mao) teaches forming the amorphous silicon using CVD process (Sano, Col. 4, lines 49-52).
The combined Luczak (with Sano and Mao) does not teach the precursor flow rate.
However, Stamp teaches the supply of the silicon precursor with a flow rate of 0.1 g per minute [0097]. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
A person having ordinary skill in the art before the effective date of the claimed invention would combine Luczak (with Sano and Mao) with Stamp to use the above chlorate, to provide with a desired thickness of the amorphous layer,
Claim(s) 19 is rejected under 35 U.S.C. 103 as being unpatentable over Sano (US Pat. 5,486,237) and in view of Miyakawa (US Pat. 4,614,698).
Consider Claim 19, Sano teaches forming the amorphous silicon (abstract)., for a photovoltaic element (Col. 1, lines 58-60).
Sano does not teach the thickness of the amorphous silicon.
However, Miyakawa is in the prior art of forming amorphous photoconductor (Col. 2, lines 33-35), teaches the film thickness of the amorphous silicon from 10-30 micron (Col. 12, lines 40-45). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05).
A person having ordinary skill in the art before the effective date of the claimed invention would combine Sano with Miyakawa to have the amorphous silicon within the claimed range, to lower the charge potential (Col. 12, lines 43-45), which prevent the dielectric breakdown (Col. 2, lines 20-22).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammad Mayy whose telephone number is (571)272-9983. The examiner can normally be reached Monday to Friday, 8:00AM-5:00PM EST.
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/Mohammad Mayy/
Art Unit 1718
/GORDON BALDWIN/Supervisory Patent Examiner, Art Unit 1718