DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is in reply to papers filed on 2024-07-18. Claims 1-14 are pending. Claims 1 is/are independent.
Priority papers submitted under 35 U.S.C. § 119(a)-(d) are acknowledged.
Information Disclosure Statement PTO-1449
The Information Disclosure Statement(s) submitted by applicant on 2024-07-18 has/have been considered. The submission is in compliance with the provisions of 37 CFR § 1.97. Form PTO-1449 signed and attached hereto.
Summary of Claim Rejections under 35 U.S.C. § 102 and § 103
The following table summarizes the rejections set forth in detail below of the claims over the prior art.
Claim No.
Kuo '526
Kuo '526 in view of Caraccio '737
Kuo '526 in view of Caraccio '737 in view of Schrodinger '969
1
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2
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3
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4
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5
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6
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7
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8
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9
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10
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11
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12
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13
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14
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Claim Rejections - 35 U.S.C. § 102
The following is a quotation of the appropriate paragraphs of AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim(s) 1-5, 11, 13-15 is/are rejected under 35 U.S.C. § 102 as being anticipated by U.S. Publication 20090089526 to Kuo et al. (hereinafter "Kuo '526"). Kuo '526 is prior art to the claims under 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 102(a)(2).
Per claim 1 (independent):
Kuo '526 discloses a method of securization of programs in a memory of a microcontroller (security register controls writing to status register, which controls writing to memory blocks storing programs [Kuo '526 ¶ 0017-0018, 0004]; processor accesses memory [Kuo '526 ¶ 0002])
Kuo '526 discloses writing a boot program into a first area of said memory (first memory block stores boot program [Kuo '526 ¶ 0018, 0003-0004])
Kuo '526 discloses writing at least one additional program into at least one second area of said memory (second memory block stores BIOS or other program [Kuo '526 ¶ 0018, 0002-0004])
Kuo '526 discloses modifying one or a plurality of values of a first register to provide a write protection of the first and second areas (status register controls writing to memory blocks storing programs [Kuo '526 ¶ 0018, Fig. 1, Fig. 3])
Kuo '526 discloses prohibiting modification of said one or a plurality of values of the first register when said one or a plurality of values are associated with a write protection state of the first area (security register controls writing to status register [Kuo '526 ¶ 0021, Fig. 1, Fig. 4])
Per claim 2 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 discloses said first register associates a write protection state value with one or a plurality of areas of said memory (status register controls writing to memory blocks storing programs [Kuo '526 ¶ 0018, Fig. 1, Fig. 3])
Per claim 3 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 discloses prohibiting modification comprises a modification of a value of a second register (security register controls writing to status register [Kuo '526 ¶ 0021, Fig. 1, Fig. 4])
Per claim 4 (dependent on claim 3):
Kuo '526 discloses the elements detailed in the rejection of claim 3 above, incorporated herein by reference
Kuo '526 discloses the modification of the value of the second register is authorized according to a state of the microcontroller comprising said memory (security register can be modified only while processor is in reset state [Kuo '526 ¶ 0021-0022])
Per claim 5 (dependent on claim 4):
Kuo '526 discloses the elements detailed in the rejection of claim 4 above, incorporated herein by reference
Kuo '526 discloses the state of the microcontroller comprising said memory is a state selected from among a regression state, a state open to writing, and a provisioning state (manufacturer sets security bits of security register during manufacturing [Kuo '526 ¶ 0023-0024])
Per claim 10 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 discloses prohibiting modification of said one or a plurality of values of the first register is implemented after writing said at least one additional program into the at least one second area of said memory (during regular operation, status register controls writing to memory blocks storing programs [Kuo '526 ¶ 0018, Fig. 1, Fig. 3]; during regular operation, security register controls writing to status register [Kuo '526 ¶ 0021, Fig. 1, Fig. 4]; second memory block may store BIOS or other program prior to regular operation [Kuo '526 ¶ 0018, 0002-0004])
Per claim 11 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 discloses prohibiting modification of said one or a plurality of values of the first register is implemented prior to writing said at least one additional program into the at least one second area of said memory (status register can be set prior to regular operation to allow writing to a given memory blocks during regular operation for storing programs [Kuo '526 ¶ 0018, Fig. 1, Fig. 3]; during regular operation, security register controls writing to status register [Kuo '526 ¶ 0021, Fig. 1, Fig. 4]; second memory block may store BIOS or other program prior to regular operation [Kuo '526 ¶ 0018, 0002-0004])
Per claim 13 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 discloses the write protection of said boot program is implemented prior to the writing of said at least one additional program ((first memory block stores boot program [Kuo '526 ¶ 0018, 0003-0004]; status register can be set prior to regular operation to allow writing to a given memory blocks during regular operation for storing programs [Kuo '526 ¶ 0018, Fig. 1, Fig. 3]; during regular operation, security register controls writing to status register [Kuo '526 ¶ 0021, Fig. 1, Fig. 4]; second memory block may store BIOS or other program prior to regular operation [Kuo '526 ¶ 0018, 0002-0004])
Per claim 14 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
The remaining limitations of the claim(s) correspond(s) to features of claim(s) 1 and the claim(s) is/are rejected for the reasons detailed with respect to those claims.
Per claim 15 (dependent on claim 14):
Kuo '526 discloses the elements detailed in the rejection of claim 14 above, incorporated herein by reference
Kuo '526 discloses said memory is non-volatile (nonvolatile memory [Kuo '526 ¶ 0003-0004])
Claim Rejections - 35 U.S.C. § 103
The following is a quotation of AIA 35 U.S.C. 103 that forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. § 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6, 7, 12 is/are rejected under 35 U.S.C. § 103 as being unpatentable over Kuo '526 in view of U.S. Publication 20210286737 to Caraccio et al. (hereinafter "Caraccio '737"). Caraccio '737 is prior art to the claims under 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 102(a)(2).
Per claim 6 (dependent on claim 3):
Kuo '526 discloses the elements detailed in the rejection of claim 3 above, incorporated herein by reference
Kuo '526 does not disclose the modification of the value of the second register is authorized by the use of a specific security code
Further:
Caraccio '737 discloses the modification of the value of the second register is authorized by the use of a specific security code (checks generated MAC/token to determine permission to change write protections in register 44 for protected memory block 40 [Caraccio '737 ¶ 0039, Fig. 5; ¶ 0035-0038])
It would have been obvious to a person having ordinary skill in the art (1) before the effective filing date of the claimed invention and (2) before the invention was made to have modified Kuo '526 with the cryptographic authorization and block addressing of Caraccio '737 to arrive at an apparatus, method, and product including:
the modification of the value of the second register is authorized by the use of a specific security code
A person having ordinary skill in the art would have been motivated to combine them at least because having a cryptographic authorization mechanism would allow authorized persons, and only authorized persons, to update the memory contents of particular block addresses when needed. A person having ordinary skill in the art would have been further motivated to combine them at least because Caraccio '737 teaches [Caraccio '737 ¶ 0039, Fig. 5; ¶ 0035-0038; ¶ 0041, Fig. 6 at 74] modifying a memory protection scheme [Kuo '526 ¶ 0017-0018, 0004] such as that of Kuo '526 to arrive at the claimed invention; because Caraccio '737 and Kuo '526 are in the same field of endeavor; because doing so constitutes use of a known technique (cryptographic authorization and block addressing [Caraccio '737 ¶ 0039, Fig. 5; ¶ 0035-0038; ¶ 0041, Fig. 6 at 74]) to improve similar devices and/or methods (memory protection scheme [Kuo '526 ¶ 0017-0018, 0004]) in the same way; because doing so constitutes applying a known technique (cryptographic authorization and block addressing [Caraccio '737 ¶ 0039, Fig. 5; ¶ 0035-0038; ¶ 0041, Fig. 6 at 74]) to known devices and/or methods (memory protection scheme [Kuo '526 ¶ 0017-0018, 0004]) ready for improvement to yield predictable results; and because the modification amounts to combining prior art elements according to known methods to yield predictable results. Here, (1) the prior art included each element (as detailed above); (2) one of ordinary skill in the art could have combined the elements as claimed by known methods, and in this combination, each element merely performs the same function as it does separately (memory protection scheme prevents alteration of program code [Kuo '526 ¶ 0017-0018, 0004] except by those with cryptographic authorization for particular block addresses [Caraccio '737 ¶ 0039, Fig. 5; ¶ 0035-0038; ¶ 0041, Fig. 6 at 74]); (3) one of ordinary skill in the art would have recognized that the results of the combination were predictable; and (4) other considerations do not overcome this conclusion.
Per claim 7 (dependent on claim 6):
Kuo '526 in view of Caraccio '737 discloses the elements detailed in the rejection of claim 6 above, incorporated herein by reference
Kuo '526 discloses the second register is configured to take two distinct values each coded over a number of bits greater than or equal to 8, each bit of one of the two distinct values being different from the corresponding bit of the other value (status register comprises bits 0-7 [Kuo '526 ¶ 0020, Fig. 3]; security register comprises bits 0-7 [Kuo '526 ¶ 0021, Fig. 4]; bits are used individually [Kuo '526 ¶ 0020-0022, Fig. 3, Fig. 4])
Per claim 12 (dependent on claim 1):
Kuo '526 discloses the elements detailed in the rejection of claim 1 above, incorporated herein by reference
Kuo '526 does not disclose the first area of said memory is defined by two user option bytes
Further:
Caraccio '737 discloses the first area of said memory is defined by two user option bytes (identifies WP blocks by 2-byte address [Caraccio '737 ¶ 0041, Fig. 6 at 74])
For the reasons detailed above with respect to claim 6, it would have been obvious to a person having ordinary skill in the art (1) before the effective filing date of the claimed invention and (2) before the invention was made to have modified Kuo '526 with the cryptographic authorization and block addressing of Caraccio '737 to arrive at an apparatus, method, and product including:
the first area of said memory is defined by two user option bytes
Claim(s) 8-9 is/are rejected under 35 U.S.C. § 103 as being unpatentable over Kuo '526 in view of Caraccio '737 in view of U.S. Publication 20050038969 to Schrodinger et al. (hereinafter "Schrodinger '969"). Schrodinger '969 is prior art to the claims under 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 102(a)(2).
Per claim 8 (dependent on claim 7):
Kuo '526 in view of Caraccio '737 discloses the elements detailed in the rejection of claim 7 above, incorporated herein by reference
Kuo '526 does not disclose the second register is non-volatile
However, Kuo '526 discloses the second register is (security register controls writing to status register, which controls writing to memory blocks storing programs [Kuo '526 ¶ 0017-0018, 0004])
Further:
Schrodinger '969 discloses the protection register is non-volatile (non-volatile write protect registers 3 and 21-2x [Schrodinger '969 ¶ 0056-0058])
It would have been obvious to a person having ordinary skill in the art (1) before the effective filing date of the claimed invention and (2) before the invention was made to have modified Kuo '526 with the nonvolatile registers of Schrodinger '969 to arrive at an apparatus, method, and product including:
the second register is non-volatile
A person having ordinary skill in the art would have been motivated to combine them at least because nonvolatile registers would assist in maintaining state during power downs so that memory protection would continue after reboot. A person having ordinary skill in the art would have been further motivated to combine them at least because Schrodinger '969 teaches [Schrodinger '969 ¶ 0056-0058] modifying a memory protection scheme [Kuo '526 ¶ 0017-0018, 0004] such as that of Kuo '526 to arrive at the claimed invention; because Schrodinger '969 and Kuo '526 are in the same field of endeavor; because doing so constitutes use of a known technique (nonvolatile registers [Schrodinger '969 ¶ 0056-0058]) to improve similar devices and/or methods (memory protection scheme [Kuo '526 ¶ 0017-0018, 0004]) in the same way; because doing so constitutes applying a known technique (nonvolatile registers [Schrodinger '969 ¶ 0056-0058]) to known devices and/or methods (memory protection scheme [Kuo '526 ¶ 0017-0018, 0004]) ready for improvement to yield predictable results; and because the modification amounts to combining prior art elements according to known methods to yield predictable results. Here, (1) the prior art included each element (as detailed above); (2) one of ordinary skill in the art could have combined the elements as claimed by known methods, and in this combination, each element merely performs the same function as it does separately (memory protection scheme prevents alteration of program code [Kuo '526 ¶ 0017-0018, 0004] after power loss using nonvolatile registers [Schrodinger '969 ¶ 0056-0058]); (3) one of ordinary skill in the art would have recognized that the results of the combination were predictable; and (4) other considerations do not overcome this conclusion.
Per claim 9 (dependent on claim 8):
Kuo '526 in view of Caraccio '737 in view of Schrodinger '969 discloses the elements detailed in the rejection of claim 8 above, incorporated herein by reference
Kuo '526 does not disclose the first register is non-volatile
However, Kuo '526 discloses the first register is (security register controls writing to status register, which controls writing to memory blocks storing programs [Kuo '526 ¶ 0017-0018, 0004])
Further:
Schrodinger '969 discloses the first register is non-volatile (non-volatile write protect registers 3 and 21-2x [Schrodinger '969 ¶ 0056-0058])
For the reasons detailed above with respect to claim 8, it would have been obvious to a person having ordinary skill in the art (1) before the effective filing date of the claimed invention and (2) before the invention was made to have modified Kuo '526 with the nonvolatile registers of Schrodinger '969 to arrive at an apparatus, method, and product including:
the first register is non-volatile
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THEODORE C PARSONS whose telephone number is (571)270-1475. The examiner can normally be reached on MTWRF 7:30-4:30.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jung Kim can be reached on (571) 272-3804. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THEODORE C PARSONS/Primary Examiner, Art Unit 2494