Prosecution Insights
Last updated: July 17, 2026
Application No. 18/776,740

Zoned Namespaces in Solid-Stage Drives

Non-Final OA §103
Filed
Jul 18, 2024
Priority
Sep 25, 2019 — provisional 62/905,894 +2 more
Examiner
GRULLON, FRANCISCO A
Art Unit
2132
Tech Center
2100 — Computer Architecture & Software
Assignee
SanDisk Technologies Inc.
OA Round
3 (Non-Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
348 granted / 396 resolved
+32.9% vs TC avg
Minimal -2% lift
Without
With
+-1.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
19 currently pending
Career history
414
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
78.3%
+38.3% vs TC avg
§102
14.0%
-26.0% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 396 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Note It is noted that any citations to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP § 2123. Claim Status Claims 1-20 are currently pending with claims 7-20 previously withdrawn. Claim 1 and 7 are amended as per Applicant’s amendment filed on 13 April 2026. This office action is in response to a request for continued examination and amendments filed on 18 May 2026. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 18 May 2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The amended claims are addressed in the rejection below further in view of Ramsundar (US 20140325115 A1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Karr (US 20210326048 A1) in view of Chuang (US 20190286365 A1) and further in view of Ramsundar (US 20140325115 A1). Referring to claim 1, Karr teaches A storage device, comprising: a media unit, wherein a capacity of the media unit is divided into a plurality of zones, and wherein the media unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks; ([Karr 0033-0035, 0052, 0105, Fig. 1A, 2C] Storage arrays 102A-B may provide persistent data storage for the computing devices 164A-B. The persistent storage resource 170A-B main include any number of storage drives 171A-F (also referred to as “storage devices” herein) and any number of non-volatile Random Access Memory (‘NVRAM’) devices (not shown), storage drive 171A-F may be one or more zoned storage devices. In some implementations, the one or more zoned storage devices may be a shingled HDD. In implementations, the one or more storage devices may be a flash-based SSD. In a zoned storage device, a zoned namespace on the zoned storage device can be addressed by groups of blocks that are grouped and aligned by a natural size, forming a number of addressable zones. In implementations utilizing an SSD, the natural size may be based on the erase block size of the SSD. The flash memory 206 is implemented as multiple flash dies 222, which may be referred to as packages of flash dies 222 or an array of flash dies 222. It should be appreciated that the flash dies 222 could be packaged in any number of ways, with a single die per package, multiple dies per package (i.e., multichip packages), in hybrid packages, as bare dies on a printed circuit board or other substrate, as encapsulated dies, etc.) and a controller coupled to the media unit, ([Karr 0027, 0033-0037, Fig. 1A] a controller associated with multiple flash storage devices in a flash storage system maintains a list of available allocation units across a plurality of flash devices of a flash storage system. The flash devices map erase blocks as directly addressable storage. The erase blocks may be categorized by the flash storage system as available for use, in use, or unusable. In one implementation, at least a portion of an erase block can be assigned as an allocation unit. the storage array controllers 110A-D may be configured for offloading device management responsibilities from storage drive 171A-F in storage array 102A-B.) the controller configured to: determine a writeable zone capacity of each of the plurality of zones, the writeable zone capacity being equal to or less than a total zone storage capacity of each zone, wherein the writeable capacity of each zone is aligned with a capacity of one or more erase blocks; ([Karr 0027, 0052-0056, 0197, Fig. 1A] a controller associated with multiple flash storage devices in a flash storage system maintains a list of available allocation units across a plurality of flash devices of a flash storage system. The flash devices map erase blocks as directly addressable storage. The erase blocks may be categorized by the flash storage system as available for use, in use, or unusable. In one implementation, at least a portion of an erase block can be assigned as an allocation unit. the storage array controllers 110A-D may be configured for offloading device management responsibilities from storage drive 171A-F in storage array 102A-B. storage drive 171A-F may be one or more zoned storage devices. In some implementations, the one or more zoned storage devices may be a shingled HDD. In implementations, the one or more storage devices may be a flash-based SSD. In a zoned storage device, a zoned namespace on the zoned storage device can be addressed by groups of blocks that are grouped and aligned by a natural size, forming a number of addressable zones. In implementations utilizing an SSD, the natural size may be based on the erase block size of the SSD. ZNS SSDs or some other form of zoned block devices may be utilized that expose a namespace logical address space using zones. With the zones aligned to the internal physical properties of the device, several inefficiencies in the placement of data can be eliminated.) update zone metadata to notify a host device of the writeable zone capacity of each of the plurality of zones ([Karr 0037-0038, 0053-0057, 0197, 0258] storage array controllers 110A-D may manage control information that may describe the state of one or more memory blocks in the storage drives 171A-F, the control information may be stored with an associated memory block as metadata. ZNS SSDs or some other form of zoned block devices may be utilized that expose a namespace logical address space using zones. With the zones aligned to the internal physical properties of the device, several inefficiencies in the placement of data can be eliminated. Referring to FIG. 6, at block 602, processing logic maintains a list of available allocation units across a plurality of flash devices of a flash storage system (e.g., storage drives 171 of storage system 100). The erase blocks may be categorized by the flash storage system as available for use, in use, or unusable. In one implementation, at least a portion of an erase block can be assigned as an allocation unit. In another embodiment, multiple erase blocks may be assigned as an allocation unit. In yet another implementation, a single erase block may be assigned as multiple allocation units. At block 604, processing logic receives data from a plurality of sources. In one embodiment, the data may be associated with processing a dataset and the dataset may include multiple file systems and associated metadata. In some implementations, storage devices, or even parts of a storage device, may have different sizes for erase blocks. This can result in allocation units being composed of one number of erase blocks in some cases and another number of erase blocks in some other cases even within the same storage system. In implementations, the zones of the zoned storage device may be in different states. A zone may be in an empty state in which data has not been stored at the zone. In an implementation, a zone that is in an open state may also be written to using a copy command that copies data from a different zone. A zone in a closed state is a zone that has been partially written to, but has entered a closed state after issuing an explicit close operation. A zone in a full state is a zone that is storing data and can no longer be written to.). Karr does not explicitly disclose wherein all data stored in a zone will be either valid or invalid; and update zone metadata to indicate one or more first logical block addresses were skipped and to indicate a next valid logical block address is available to store the data in a zone of the plurality of zones. Chuang teaches wherein all data stored in a zone will be either valid or invalid ([Chuang abstract, 0023, 0029-0030] The control circuit writes the valid data to at least one valid storage zone of a flash memory and the invalid data to at least one invalid storage zone of the flash memory. During the process when the controller 20 writes the valid data to the valid storage zones, the controller 20 also writes the non-fixed-constant invalid data to the invalid storage zones. Thereby, the coupling interference, including the capacitive coupling effect or the signal transmission interference, of the invalid storage zones in the nearby valid storage zones may be reduced.). Karr and Chuang are analogous art because they are from the same field of endeavor in storage systems. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Karr and Chuang before him or her to modify the system of Karr to include the zone data segregation of Chuang, thereafter the system is connected to zone data segregation. The suggestion and/or motivation for doing so would be obtaining the advantage of allowing system to have increased stability by the interference of the invalid storage zones on the valid storage zones being decreased as suggested by Chuang. It is known to combine prior art elements according to known methods to yield predictable results. Therefore, it would have been obvious to combine Karr with Chuang to obtain the invention as specified in the instant application claims. Karr in view of Chuang does not explicitly disclose and update zone metadata to indicate one or more first logical block addresses were skipped and to indicate a next valid logical block address is available to store the data in a zone of the plurality of zones. Ramsundar teaches and update zone metadata to indicate one or more first logical block addresses were skipped and to indicate a next valid logical block address is available to store the data in a zone of the plurality of zones ([Ramsundar 0075, 0121, 0125] An iteration request may be to initialize or instantiate an iterator, to increment or decrement an iterator, to request data, an address, or a key at a current iterator position, to request each data segment, address, or key that satisfies a condition, to request a previous or next data segment, address, or key that satisfies a condition, or the like. An iteration request may iterate or traverse data or a logical-to-physical address mapping structure for data in an address order (e.g., a forward address order by increasing address, a reverse order by decreasing address), in a sequential or chronological temporal order (e.g., from oldest to newest, from newest to oldest, based on a time data was written or the like), or in another order. As described below, in certain embodiments, a logical-to-physical address mapping structure may be sparsely populated, including entries only for data that the non-volatile memory device 120 stores data. In one embodiment, an iteration request may be for sparse iteration, iterating from one contiguous range of logical addresses to another contiguous range of logical addresses, skipping one or more unused or unoccupied logical addresses between the ranges. An iterator, as used herein, comprises a module, an object, a data structure, a handle, a pointer, a variable, or the like that indicates or provides access to data, metadata, an address, an address range, a key, or the like at a modifiable iterator position associated with the iterator. An iterator may be provided by the result module 206 in response to an iteration request, may be provided by and/or maintained by a client 116, or the like.). Karr, Chuang, and Ramsundar are analogous art because they are from the same field of endeavor in storage systems. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Karr, Chuang, and Ramsundar before him or her to modify the system of Karr and Chuang to include the sparse logical address skipping of Ramsundar, thereafter the system is connected to zone data segregation. The suggestion and/or motivation for doing so would be obtaining the advantage of allowing system to have efficient use of the logical address space as suggested by Ramsundar. It is known to combine prior art elements according to known methods to yield predictable results. Therefore, it would have been obvious to combine Karr and Chuang with Ramsundar to obtain the invention as specified in the instant application claims. Referring to claim 2, Karr in view of Chuang and Ramsundar teaches The storage device of claim 1, wherein the controller updates a Writeable ZCAP attribute in the zone metadata to notify the host device of the writeable zone capacity ([Karr 0027, 0052-0057, 0258] The flash devices map erase blocks as directly addressable storage. The erase blocks may be categorized by the flash storage system as available for use, in use, or unusable. In one implementation, at least a portion of an erase block can be assigned as an allocation unit. Data to be stored in the flash storage system may be received from a number of different sources. The data may be associated with processing a dataset and the dataset may include multiple file systems and associated metadata. the one or more zoned storage devices may be a shingled HDD. In implementations, the one or more storage devices may be a flash-based SSD. In a zoned storage device, a zoned namespace on the zoned storage device can be addressed by groups of blocks that are grouped and aligned by a natural size, forming a number of addressable zones. In implementations utilizing an SSD, the natural size may be based on the erase block size of the SSD. In some implementations, the zones of the zoned storage device may be defined during initialization of the zoned storage device. In implementations, the zones may be defined dynamically as data is written to the zoned storage device. In implementations, the zones of the zoned storage device may be in different states. A zone may be in an empty state in which data has not been stored at the zone. In an implementation, a zone that is in an open state may also be written to using a copy command that copies data from a different zone. A zone in a closed state is a zone that has been partially written to, but has entered a closed state after issuing an explicit close operation. A zone in a full state is a zone that is storing data and can no longer be written to.). Referring to claim 3, Karr in view of Chuang and Ramsundar teaches The storage device of claim 1, wherein the writeable zone capacity of at least one zone is less than the total zone storage capacity of the at least one zone, and wherein the at least one zone having a writeable zone capacity less than the total zone storage capacity comprises a readable portion that is inaccessible to write data to ([Karr 0053-0057] zones may be heterogeneous, with some zones each being a page group and other zones being multiple page groups. In implementations, some zones may correspond to an erase block and other zones may correspond to multiple erase blocks. In an implementation, zones may be any combination of differing numbers of pages in page groups and/or erase blocks, for heterogeneous mixes of programming modes, manufacturers, product types and/or product generations of storage devices, as applied to heterogeneous assemblies, upgrades, distributed storages, etc. In some implementations, zones may be defined as having usage characteristics, such as a property of supporting data with particular kinds of longevity (very short lived or very long lived, for example). These properties could be used by a zoned storage device to determine how the zone will be managed over the zone's expected lifetime. In implementations, the zones of the zoned storage device may be in different states. A zone may be in an empty state in which data has not been stored at the zone. In an implementation, a zone that is in an open state may also be written to using a copy command that copies data from a different zone. A zone in a closed state is a zone that has been partially written to, but has entered a closed state after issuing an explicit close operation. A zone in a full state is a zone that is storing data and can no longer be written to.). Referring to claim 4, Karr in view of Chuang and Ramsundar teaches The storage device of claim 3, wherein the readable portion of the at least one zone stores XOR data ([Karr 0053-0057] A zone may be in an open state either implicitly or explicitly, where a zone that is in an open state may be written to store data with write or append commands. In an implementation, a zone that is in an open state may also be written to using a copy command that copies data from a different zone. In some implementations, a zoned storage device may have a limit on the number of open zones at a particular time.). Referring to claim 5, Karr in view of Chuang and Ramsundar teaches The storage device of claim 1, wherein the controller is configured to determine the writeable zone capacity of each zone upon zone reset ([Karr 0053-0055] the zones of the zoned storage device may be in different states. A zone may be in an empty state in which data has not been stored at the zone. An empty zone may be opened explicitly, or implicitly by writing data to the zone. This is the initial state for zones on a fresh zoned storage device, but may also be the result of a zone reset.). Referring to claim 6, Karr in view of Chuang and Ramsundar teaches The storage device of claim 1, wherein the controller is configured to issue an event to inform the host device that the zone metadata has changed upon updating a Writeable ZCAP attribute in the zone metadata ([Karr 0053-0056] It should be appreciated that a zone is a virtual construct. Any particular zone may not have a fixed location at a storage device. Until allocated, a zone may not have any location at a storage device. A zone may correspond to a number representing a chunk of virtually allocatable space that is the size of an erase block or other block size in various implementations. When the system allocates or opens a zone, zones get allocated to flash or other solid-state storage memory and, as the system writes to the zone, pages are written to that mapped flash or other solid-state storage memory of the zoned storage device. When the system closes the zone, the associated erase block(s) or other sized block(s) are completed. At some point in the future, the system may delete a zone which will free up the zone's allocated space. During its lifetime, a zone may be moved around to different locations of the zoned storage device, e.g., as the zoned storage device does internal maintenance. the zones of the zoned storage device may be in different states. A zone may be in an empty state in which data has not been stored at the zone. An empty zone may be opened explicitly, or implicitly by writing data to the zone. This is the initial state for zones on a fresh zoned storage device, but may also be the result of a zone reset. In some implementations, an empty zone may have a designated location within the flash memory of the zoned storage device. In an implementation, the location of the empty zone may be chosen when the zone is first opened or first written to (or later if writes are buffered into memory). A zone may be in an open state either implicitly or explicitly, where a zone that is in an open state may be written to store data with write or append commands. In an implementation, a zone that is in an open state may also be written to using a copy command that copies data from a different zone. In some implementations, a zoned storage device may have a limit on the number of open zones at a particular time.). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Regarding zone based addressing and metadata maintenance. US 20240160562 A1 US 20170083438 A1 Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRANCISCO A GRULLON whose telephone number is (571)272-8318. The examiner can normally be reached Monday - Friday, 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at (571)272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FRANCISCO A GRULLON/Primary Examiner, Art Unit 2132
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Prosecution Timeline

Show 6 earlier events
Feb 19, 2026
Final Rejection mailed — §103
Apr 13, 2026
Response after Non-Final Action
May 18, 2026
Request for Continued Examination
May 20, 2026
Response after Non-Final Action
Jun 02, 2026
Non-Final Rejection mailed — §103
Jun 26, 2026
Interview Requested
Jul 02, 2026
Applicant Interview (Telephonic)
Jul 02, 2026
Examiner Interview Summary

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
86%
With Interview (-1.5%)
2y 4m (~4m remaining)
Median Time to Grant
High
PTA Risk
Based on 396 resolved cases by this examiner. Grant probability derived from career allowance rate.

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