DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed June 25, 2026, have been fully considered but they are not persuasive.
Applicant argues US Publication 2021/0183569 to Lee et al. (hereinafter Lee) fails to disclose “a method comprising applying a conductive material at first intervals along a direction on a first dielectric ceramic green sheet to form a first conductive pattern, and applying the conductive material at second intervals in the direction on a second dielectric ceramic green sheet to form a second conductive pattern, wherein the first and second conductive patterns are formed on separate, respective green sheets, each bearing electrodes of a single respective polarity” (Remarks 8).
Applicant argues, “Lee does not teach or suggest applying separate single-polarity conductive patterns to respective dedicated green sheets as recited in claim 14, and thus Lee does not anticipate claim 14 or claims 15-17 depending therefrom” (Remarks 8).
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., each green sheet only having a single conductive pattern of a single polarity, separate single-polarity conductive patterns on dedicated green sheets with no other pattern present) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Claim 14 uses the transitional phrase “comprising”, an open-ended term that does not exclude the additional conductive patterns disclosed in Lee. As shown in FIG. 11A of Lee, Lee discloses applying a conductive material (paragraph 57) at first intervals (spaced in width) along a direction (length) on a first dielectric ceramic green sheet (111) to form a first conductive pattern (180-184; note that 190-194 are not required to be part of the “first conductive pattern”); similarly, FIG. 11B discloses applying the conductive material (paragraph 57) at second intervals (spaced in width) in the direction (length) on a second dielectric ceramic green (112) sheet to form a second conductive pattern (195-199; note that 185-189 are not required to be part of the “second conductive pattern”).
Regarding the rejection of independent claim 1 by Lee in view of US Publication 2022/0165502 to Iguchi et al. (hereinafter Iguchi), applicant argues the combination of references fails to teach or suggest, “when a shortest distance between the first internal electrode and a second internal electrode that is closest to the first internal electrode is defined as a, and a maximum size of the first internal electrode in the first direction is defined as te, 0.01 ≤ (a/te) ≤ 1.37 is satisfied” (Remarks 8-9).
As previously set forth, Lee discloses a first internal electrode layer (FIG. 11A: 180-184 and 190-194) includes a first internal electrode (180) and a second internal electrode layer (FIG. 11B: 185-189 and 195-199) includes a second internal electrode (195).
In the stack of Lee, first internal electrode 180 is located below second internal electrode 195 by the thickness of a dielectric sheet.
Iguchi (paragraph 37) teaches a thickness of an internal electrode layer is greater than a thickness of a dielectric layer separating a first internal electrode from a second internal electrode.
Accordingly, the combination/modification of Lee by Iguchi teaches a shortest distance between the first internal electrode 180 and the second internal electrode 195 is defined as a (the thickness of the dielectric layer) and a maximum size of the first internal electrode in the first (stacking) direction is defined as te, 0.01 ≤ (a/te) ≤ 1.37 is satisfied: the thickness of the dielectric layer is less than the thickness of the internal electrode layer, as taught by Iguchi, therefore a/te is less than one, satisfying the claimed range.
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Iguchi with Lee to incorporate an internal electrode layer thicker than a dielectric layer as taught by Iguchi in the structure taught by Lee and thereby have a shortest distance between a first internal electrode and a second internal electrode that is closest to the first internal electrode is defined as a (thickness of a dielectric layer), and a maximum size of the first internal electrode in the first direction (stacking direction) is defined as te (thickness of the internal electrode layer), 0.01 ≤ (a/te) ≤ 1.37 is satisfied: the thickness of the dielectric layer is less than the thickness of the internal electrode layer, as taught by Iguchi, therefore a/te is less than one, satisfying the claimed range (see also Iguchi paragraph 37-39), as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for suppressing crack formation even in a thin multilayer ceramic component (Iguchi paragraph 5).
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
In response to applicant's argument that Lee or Iguchi do not recognize “Applicant’s own inventive insight” (Remarks 9), the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985).
Additionally, attorney argument is not evidence unless it is an admission, in which case, an examiner may use the admission in making a rejection. See MPEP § 2129 and § 2144.03 for a discussion of admissions as prior art. The arguments of counsel cannot take the place of evidence in the record. In re Schulze, 346 F.2d 600, 602, 145 USPQ 716, 718 (CCPA 1965); In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997) (“An assertion of what seems to follow from common experience is just attorney argument and not the kind of factual evidence that is required to rebut a prima facie case of obviousness.”). See MPEP § 716.01(c) for examples of attorney statements which are not evidence and which must be supported by an appropriate affidavit or declaration.
Accordingly, applicant’s arguments have been fully considered but are not persuasive.
Drawings
Drawing sheets were received on June 25, 2026. The drawings are acceptable and the objection to the drawings is withdrawn.
Claim Rejections - 35 USC § 112
The rejection of claims 1-13 and 16-17 under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, is withdrawn.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 14-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee.
Claim 14
Lee (FIG. 1, 11) discloses a method of manufacturing a multilayer electronic component comprising:
(FIG. 11A) applying a conductive material (paragraph 57) at first intervals (spaced in width) along a direction (length) on a first dielectric ceramic green sheet (111) to form a first conductive pattern (180-184; note that 190-194 are not required to be part of the “first conductive pattern”);
(FIG. 11B) applying the conductive material (paragraph 57) at second intervals (spaced in width) in the direction (length) on a second dielectric ceramic green (112) sheet to form a second conductive pattern (195-199; note that 185-189 are not required to be part of the “second conductive pattern”);
stacking the first dielectric ceramic green sheet (111) on which the first conductive pattern is formed (180-184) and the second dielectric ceramic green sheet (112) on which the second conductive pattern is formed (195-199) to form a stack;
pressing and firing the stack (paragraph 44) to form a body (110) including a first internal electrode (180) formed from the first conductive pattern (180-184) and a second internal electrode (195) formed from the second conductive pattern (195-199); and
forming a first external electrode (3) and a second external electrode (4) on the body (110),
wherein the first internal electrode (180) is connected to the first external electrode (3) and spaced apart from the second external electrode (4), and the second internal electrode (195) is spaced apart from the first external electrode (3) and connected to the second external electrode (4).
Claim 15
Lee discloses the method of claim 14, wherein the conductive material includes a conductive paste (paragraph 57).
Claim 16
Lee discloses the method of claim 14, wherein the conductive material includes an elongated conductive material having a length in the second direction greater than a width in the third direction (FIG. 11A-B: narrow shape).
Claim 17
Lee discloses the method of claim 14, wherein the conductive material is an elongated conductive material having a length in the second direction greater than a width in the third direction (FIG. 11A-B: narrow shape).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 5, 8, 10, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Iguchi.
Claim 1
Lee (FIG. 1, 11) discloses a multilayer electronic component, comprising:
a body including a dielectric layer (111-112), a first internal electrode layer (FIG. 11A: 180-184 and 190-194), and a second internal electrode layer (FIG. 11B: 185-189 and 195-199) alternately disposed in a first direction (stacking) with the dielectric layer (111-112) interposed therebetween;
a first external electrode (3) disposed on a first surface among two surfaces of the body opposing each other in a second direction (length), which is perpendicular to the first direction (stacking); and
a second external electrode (4) disposed on a second surface among the two surfaces of the body opposing each other in the second direction (length),
wherein the first internal electrode layer (FIG. 11A: 180-184 and 190-194) includes a plurality of first internal electrodes (180-184) connected to the first external electrode (3) and disposed to be spaced apart from each other in a third direction (width), which is perpendicular to the first direction (stacking) and the second direction (length), and the second internal electrode layer (FIG. 11B: 185-189 and 195-199) includes a plurality of second internal electrodes (195-199) connected to the second external electrode (4) and disposed to be spaced apart from each other in the third direction (width), as recited in claim 1.
Lee does not expressly disclose wherein, when a shortest distance between the first internal electrode and a second internal electrode that is closest to the first internal electrode is defined as a, and a maximum size of the first internal electrode in the first direction is defined as te, 0.01 ≤ (a/te) ≤ 1.37 is satisfied, as recited in claim 1.
Iguchi (paragraph 37) teaches a thickness of an internal electrode layer is greater than a thickness of a dielectric layer separating a first internal electrode from a second internal electrode.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Iguchi with Lee to incorporate an internal electrode layer thicker than a dielectric layer as taught by Iguchi in the structure taught by Lee and thereby have a shortest distance between a first internal electrode and a second internal electrode that is closest to the first internal electrode is defined as a (thickness of a dielectric layer), and a maximum size of the first internal electrode in the first direction (stacking direction) is defined as te (thickness of the internal electrode layer), 0.01 ≤ (a/te) ≤ 1.37 is satisfied: the thickness of the dielectric layer is less than the thickness of the internal electrode layer, as taught by Iguchi, therefore a/te is less than one, satisfying the claimed range (see also Iguchi paragraph 37-39), as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for suppressing crack formation even in a thin multilayer ceramic component (Iguchi paragraph 5).
Claim 2
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein 0.01 ≤ (a/te) ≤ 1.10 is satisfied (Iguchi paragraph 37-39).
Claim 5
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein when a distance between adjacent first internal electrodes (180-184) among the plurality of the first internal electrode in the third direction (width) is defined as s1, and a distance between adjacent second internal electrodes (185-199) among the plurality of the second internal electrode in the third direction (width) is defined as s2, 0.9 ≤ s1/s2 ≤ 1.1 is satisfied (FIG. 11A-B: same spacing of first and second internal electrodes so as to overlap, therefore s1 is equal to s2, which meets the claimed range).
Claim 8
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein te is 0.05 μm or more and 5 μm or less (Iguchi paragraph 39).
Claim 10
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein, when a distance in the first direction (stacking) between the first internal electrode (Iguchi 180) and the second internal electrode (195) that is closest to the first internal electrode in the first direction (stacking) is defined as td, a ≥ td is satisfied (as the electrodes overlap by the thickness of the dielectric layer, a = td, which satisfies the claimed range).
Claim 12
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein, when a maximum size of the multilayer electronic component in the first direction is defined as t and a maximum size of the multilayer electronic component in the second direction is defined as L, t < L is satisfied (Iguchi paragraph 24: length 0.4 to 3.2 mm, paragraph 25: thickness of 0.2 to 2.5 mm).
Claim 13
Lee with Iguchi teaches the multilayer electronic component of claim 1, wherein the dielectric layer includes Ba and Ti (Lee paragraph 47).
Allowable Subject Matter
Claims 3-4, 6-7, 9, and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN MILAKOVICH whose telephone number is (571)270-3087. The examiner can normally be reached Monday - Friday 9:00 AM - 5:00 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY DOLE can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/NATHAN MILAKOVICH/Primary Examiner, Art Unit 2847