DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/19/2026 has been entered.
Claim status
Claims 1, 3-11 and 13-21 are pending; claims 1, 11 and 18 are independent. Claims 2 and 12 have been cancelled.
Response to Arguments
Applicant's arguments filed 02/19/2026 have been fully considered but they are not persuasive.
In response to applicant’s argument, in page 2, that the cited references fail to teach or render obvious the subject matter “Regarding claim 1 as previously presented, the Office Action alleges that Ju anticipates all of the claimed features. Specifically, the Office Action makes reference to Ju's Fig. 6 and alleges that Ju's first switching control signal (SCS1) corresponds to the claimed "first level shift," Ju's second switching control signal (SCS2) corresponds to the claimed "second level shift," and that Ju's first switch (SW1) and second switch (SW2) correspond to the claimed "plurality of switching elements." Thus, under this broad interpretation, it is assumed that the Examiner is interpreting Ju's first switch (SW1) and second switch (SW2) as being just one mux part among a plurality of mux parts (see Office Action, pages 4 and 5).
However, the examiner respectfully disagrees, this statement is not true, see the rejection to claim 1 below, JU clearly taught in figs 3, 5, 6 and Para 0058, wherein the source drive IC 31 considered as claimed "first level shift” supplies the analog data voltages to the data lines (D1˜Dm). Also, the source drive IC 31 supplies data voltages of black grayscale to the viewing angle data lines (VD1˜VDm) via the first and second switching elements SW1 and SW2; In figs 3, 5, 6 and Para 0078, wherein the first and second switch control signals (SCS1, SCS2) may be generated in the timing controller 50 considered as claimed "second level shift” according to whether it is driven in the wide viewing angle mode or narrow viewing angle mode; and in figs 5, 6 and combination of switching elements SW1 and SW2, considered as claimed “a plurality of switching elements” and Paras 0078-0082, wherein in the wide viewing angle mode, as shown in FIG. 5, the first switch (SW1) is turned-on by the first switch control signal (SCS1) of the first logic level voltage, and the second switch (SW2) is turned-off by the second switch control signal (SCS2) of the second logic level voltage. in case of the narrow viewing angle mode, as shown in FIG. 6, the first switch (SW1) is turned-off by the first switch control signal (SCS1) of the second logic level voltage, and the second switch (SW2) is turned-on by the second switch control signal (SCS2) of the first logic level voltage.
The rest of applicant’s arguments in pages 2-3 with respect to claim(s) 1, 3-11 and 13-21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-7, 11 and 13-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over JU (US 2018/0122292), and further in view of Wang (US 2019/0066600).
Regarding claims 1 and 11, JU teaches a display device (fig. 2, a display device 100) comprising:
a plurality of pixel blocks (figs 2, 5, 6), each of the plurality of pixel blocks including a plurality of pixels (figs 2, 5, 6, two pixels of SP1 and SP2, see reproduced fig. 5 below);
a plurality of mux parts disposed to correspond to columns of the plurality of pixel blocks (figs 5, 6 and combination of switching elements SW1 and SW2);
a first level shift configured to transmit a first mode signal or a second mode signal to the plurality of mux parts (figs 3, 5, 6 and Para 0058, wherein the source drive IC 31 supplies the analog data voltages to the data lines (D1˜Dm). Also, the source drive IC 31 supplies data voltages of black grayscale to the viewing angle data lines (VD1˜VDm) via the first and second switching elements SW1 and SW2);
a second level shift configured to transmit a plurality of mux signals to the plurality of mux parts (figs 5, 6 and Para 0078, wherein the first and second switch control signals (SCS1, SCS2) may be generated in the timing controller 50 according to whether it is driven in the wide viewing angle mode or narrow viewing angle mode); and
a mode controller configured to control the first level shift and the second level shift (fig. 2 and Para 0066, wherein the timing controller 50 supplies the video data (DATA) and the data control signal (DCS) to the data driver 30. In figs 5, 6 and Para 0078, the first and second switch control signals (SCS1, SCS2) may be generated in the timing controller 50 according to whether it is driven in the wide viewing angle mode or narrow viewing angle mode).
wherein each of the plurality of mux parts includes a plurality of switching elements, each connected to a respective pixel block disposed in a respective row of one column of the plurality of pixel blocks (figs 5, 6 and combination of switching elements SW1 and SW2 and Paras 0078-0082, wherein in the wide viewing angle mode, as shown in FIG. 5, the first switch (SW1) is turned-on by the first switch control signal (SCS1) of the first logic level voltage, and the second switch (SW2) is turned-off by the second switch control signal (SCS2) of the second logic level voltage. in case of the narrow viewing angle mode, as shown in FIG. 6, the first switch (SW1) is turned-off by the first switch control signal (SCS1) of the second logic level voltage, and the second switch (SW2) is turned-on by the second switch control signal (SCS2) of the first logic level voltage).
JU does not expressly disclose wherein each of the plurality of switching elements among of the plurality of mux parts is configured to be activated by a corresponding mux signal among the plurality of mux signals to transmit the first mode signal or the second mode signal to the respective pixel block.
However, Wang discloses “wherein each of the plurality of switching elements among of the plurality of mux parts is configured to be activated by a corresponding mux signal among the plurality of mux signals to transmit the first mode signal or the second mode signal to the respective pixel block”, see fig. 3 and Paras 0060-0062
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have modified a display device of JU by applying the teaching of Wang to include a display panel comprises a transparent substrate, a plurality of sub-pixel groups arranged in an array on the transparent substrate, and a plurality of multiplexer modules respectively corresponding to a plurality columns of the sub-pixel groups. A source driver comprises a plurality of output terminals respectively corresponding to the plurality of rows of sub-pixel groups. Each of the multiplexer modules comprises a first thin-film transistor, a second thin-film transistor, and a third thin-film transistor, each electrically connected to some sub-pixels of the sub-pixel groups of one of the columns corresponding thereto, as a known technique to get a predictable result.
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Regarding claims 3 and 13, JU in view of Wang teaches the display device of claim 1 and the display device of claim 11, wherein the plurality of switching elements include: a plurality of first switching elements connected to the plurality of pixel blocks and configured to transmit the first mode signal (fig. 5, SW1 and Para 0080, the wide viewing angle mode, JU); and
a plurality of second switching elements connected to the plurality of pixel blocks and configured to transmit the second mode signal (fig. 6, SW2 and Para 0081, the narrow viewing angle mode, JU).
Regarding claim 4, JU in view of Wang teaches the display device of claim 3, wherein the plurality of pixel blocks are disposed in m rows and n columns (figs 2, 5, 6), a number of the plurality of mux parts is n (fig. 5, 6, the number of mux parts (the combination of SW1 and SW2) is equal to the number of pixel block columns, JU),
a number of the plurality of first switching elements is m×n, a number of the plurality of second switching elements is m×n, and n and m are positive integers (see reproduced fig. 5 as shown in the rejection to claim 1, two columns and one row, so the number of the first switch element SW1 is two and the number of the second switch element SW2 is two, JU).
Regarding claims 5 and 14, JU in view of Wang teaches the display device of claim 3 and the display device of claim 13, further comprising: a plurality of first mode signal link lines configured to connect the plurality of first switching elements with the first level shift (fig. 5 and Para 0080, wherein in the wide viewing angle mode, the jth data line (Dj) and the jth viewing angle data line (VDj) are connected with each other, and the jth viewing angle data line (VDj) and the source drive IC 31 are not connected with each other, JU); and
a plurality of second mode signal link lines configured to connect the plurality of second switching elements with the first level shift (fig. 6 and Para 0081, wherein in the narrow viewing angle mode, the jth data line (Dj) and the jth viewing angle data line (VDj) are not connected with each other, and the jth viewing angle data line (VDj) and the source drive IC 31 are connected with each other, JU).
Regarding claims 6 and 15, JU in view of Wang teaches the display device of claim 3 and the display device of claim 13, further comprising: a plurality of first mode signal lines configured to connect the plurality of first switching elements with the plurality of pixel blocks (fig. 5 and Para 0080, wherein in the wide viewing angle mode, the jth data line (Dj) and the jth viewing angle data line (VDj) are connected with each other, and the jth viewing angle data line (VDj) and the source drive IC 31 are not connected with each other, JU); and
a plurality of second mode signal lines configured to connect the plurality of second switching elements with the plurality of pixel blocks (fig. 6 and Para 0081, wherein in the narrow viewing angle mode, the jth data line (Dj) and the jth viewing angle data line (VDj) are not connected with each other, and the jth viewing angle data line (VDj) and the source drive IC 31 are connected with each other, JU).
Regarding claims 7 and 17, JU in view of Wang teaches the display device of claim 1 and the display device of claim 11, further comprising: a plurality of mux signal lines configured to connect the plurality of switching elements with the second level shift (figs 5,6 and Paras 0076-0078, wherein the first and second switch control signals (SCS1, SCS2) may be generated in the timing controller 50 to control the first switch SW1 and second switch SW2, respectively, according to whether it is driven in the wide viewing angle mode or narrow viewing angle mode, JU).
Regarding claim 16, JU in view of Wang teaches the display device of claim 13, wherein a number of the plurality of first switching elements is m×n, and a number of the plurality of second switching elements is m×n (see reproduced fig. 5 as shown in the rejection to claim 1, two columns and one row, JU).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over JU, in view of Wang, and further in view of Kim (US 2021/0201740).
Regarding claim 8, JU in view of Wang teaches the display device of claim 7, but JU in view of Wang does not expressly disclose wherein the plurality of pixel blocks are disposed in m rows and n columns, a number of the plurality of mux signal lines is m, and n and m are positive integers.
However, Kim discloses “wherein the plurality of pixel blocks are disposed in m rows and n columns, a number of the plurality of mux signal lines is m, and n and m are positive integers”, see fig. 2 and Paras 0043-0045.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have modified the display device of JU in view of Wang by applying the teaching of Kim to include a MUX circuit controlled by first to third negative MUX clocks NMUX1 to NMUX3 and first to third positive MUX clocks PMUX1 to PMUX3 provided by the timing controller, as a known technique to get a predictable result.
Claim(s) 9-10 and 18-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over JU, in view of Wang, and further in view of Shikina (US 2011/0284881).
Regarding claim 9, JU in view of Wang teaches the display device of claim 1 above but JU in view of Wang does not expressly disclose, wherein each of the plurality of pixels includes: a first light-emitting element configured to emit light in response to a first mode signal transmitted from the first level shift; and a second light-emitting element configured to emit light in response to a second mode signal transmitted from the first level shift.
However, Shikina discloses “wherein each of the plurality of pixels includes: a first light-emitting element configured to emit light in response to a first mode signal transmitted from the first level shift; and a second light-emitting element configured to emit light in response to a second mode signal transmitted from the first level shift”, see figs 5, 6 and Paras 070-0076.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have modified the display device of JU in view of Wang by applying the teaching of Shikina to include a pixel circuit comprising a first organic EL element which is configured to have a "wide viewing angle characteristic" and a second organic EL element which is configured to have a different viewing angle characteristic, as a known technique to get a predictable result.
Regarding claim 10, JU in view of Wang and in view of Shikina teaches the display device of claim 9, further comprising: a first lens disposed on the first light-emitting element and having a viewing angle of a first value (figs 7A, 8A and Paras 0085-0088, wherein the convex lenses 113 are prepared on the first surface of the second substrate 112. And a ratio of a size of the main pixel (SP1) to a size of the viewing angle control pixel (SP2) is 1:2. JU); and
a second lens disposed on the second light-emitting element and having a viewing angle of a second value lower than the viewing angle of the first value (figs 7B, 8B and Paras 0085-0088, wherein the convex lenses 113 are prepared on the first surface of the second substrate 112. And a ratio of a size of the main pixel (SP1) to a size of the viewing angle control pixel (SP2) is 1:2, JU).
Regarding claim 18, JU teaches a display device (fig. 2, a display device 100) comprising:
a display panel (fig. 1, a display panel 10) including a plurality of pixel blocks (figs 2, 5, 6), each of the plurality of pixel blocks including a plurality of first type subpixels (fig. 5 and Para 0080, wherein in case of the wide viewing angle mode, the same data voltage is supplied to the main pixel (SP1) and the viewing angle control pixel (SP2), whereby an image may be displayed by the use of main pixel (SP1) and viewing angle control pixel (SP2), and
a plurality of second type subpixels (fig. 6 and Para 0081, wherein in case of the narrow viewing angle mode, the data voltage of black grayscale is supplied to the viewing angle control pixel (SP2), whereby an image may be displayed only in the main pixel (SP1)); and
a controller (fig. 2, the timing controller 50 and Para 0078) configured to:
supply a first mode signal to at least one pixel block among the plurality of pixel blocks and activate the plurality of first type subpixels within the at least one pixel block to emit light with the wide viewing angle (fig. 5 and Para 0080, wherein in case of the wide viewing angle mode, the same data voltage is supplied to the main pixel (SP1) and the viewing angle control pixel (SP2), whereby an image may be displayed by the use of main pixel (SP1) and viewing angle control pixel (SP2)), and
supply a second mode signal to at least one other pixel block among the plurality of pixel blocks and activate the plurality of second type subpixels within the at least one other pixel block to emit light with the narrow viewing angle (fig. 6 and Para 0081, wherein in case of the narrow viewing angle mode, the data voltage of black grayscale is supplied to the viewing angle control pixel (SP2), whereby an image may be displayed only in the main pixel (SP1)); and
a plurality of mux parts connected between the controller and the plurality of pixel blocks, the plurality of mux parts including a plurality of first switching elements and a plurality of second switching elements (figs 5, 6 and combination of switching elements SW1 and SW2),
wherein each of the plurality of mux parts includes a plurality of switching elements, each connected to a respective pixel block disposed in a respective row of one column of the plurality of pixel blocks (figs 5, 6 and combination of switching elements SW1 and SW2 and Paras 0078-0082, wherein in the wide viewing angle mode, as shown in FIG. 5, the first switch (SW1) is turned-on by the first switch control signal (SCS1) of the first logic level voltage, and the second switch (SW2) is turned-off by the second switch control signal (SCS2) of the second logic level voltage. in case of the narrow viewing angle mode, as shown in FIG. 6, the first switch (SW1) is turned-off by the first switch control signal (SCS1) of the second logic level voltage, and the second switch (SW2) is turned-on by the second switch control signal (SCS2) of the first logic level voltage).
JU does not expressly disclose wherein each of the plurality of switching elements among of the first to n-th mux parts is configured to be activated by a corresponding mux signal among the first to m-th mux signals to transmit the first mode signal or the second mode signal to the respective pixel block.
However, Wang discloses “wherein each of the plurality of switching elements among of the first to n-th mux parts is configured to be activated by a corresponding mux signal among the first to m-th mux signals to transmit the first mode signal or the second mode signal to the respective pixel block”, see fig. 3 and Paras 0060-0062
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have modified a display device of JU by applying the teaching of Wang to include a display panel comprises a transparent substrate, a plurality of sub-pixel groups arranged in an array on the transparent substrate, and a plurality of multiplexer modules respectively corresponding to a plurality columns of the sub-pixel groups. A source driver comprises a plurality of output terminals respectively corresponding to the plurality of rows of sub-pixel groups. Each of the multiplexer modules comprises a first thin-film transistor, a second thin-film transistor, and a third thin-film transistor, each electrically connected to some sub-pixels of the sub-pixel groups of one of the columns corresponding thereto, as a known technique to get a predictable result.
JU in view of Wang apparently does not explicitly teach the italicized portions of:
each of the plurality of pixel blocks including a plurality of first type subpixels each including a first light emitting element configured to emit a same color light with a wide viewing angle and a plurality of second type subpixels each including a second light emitting element configured to emit the same color light with a narrow viewing angle smaller than the wide viewing angle.
However, Shikina discloses “each of the plurality of pixel blocks including a plurality of first type subpixels each including a first light emitting element configured to emit a same color light with a wide viewing angle and a plurality of second type subpixels each including a second light emitting element configured to emit the same color light with a narrow viewing angle smaller than the wide viewing angle”, see figs 5, 6 and Paras 070-0076.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have modified a display device of JU in view of Wang by applying the teaching of Shikina to include a pixel circuit comprising a first organic EL element which is configured to have a "wide viewing angle characteristic" and a second organic EL element which is configured to have a different viewing angle characteristic, as a known technique to get a predictable result.
Regarding claim 19, JU in view of Wang and in view of Shikina teaches the display device of claim 18, wherein the plurality of pixel blocks are disposed in m rows and n columns (figs 5, 6, see reproduced fig. 5 below, JU ),
a number of the plurality of mux parts is n (fig. 5, 6, the number of mux parts (the combination of SW1 and SW2) is equal to the number of pixel block columns),
a number of the plurality of first switching elements is m×n, a number of the plurality of second switching elements is m×n, and n and m are positive integers (see reproduced fig. 5 below, two columns and one row, so the number of the first switch element SW1 is two and th number of the second switch element SW2 is two, JU).
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Regarding claim 20, JU in view of Wang and in view of Shikina teaches the display device of claim 18, wherein the controller is further configured to: selectively control the plurality of pixel blocks to operate in a first mode corresponding to the wide viewing angle or a second mode corresponding to the narrow viewing angle on a pixel-block by pixel block basis (figs 5, 6 and Paras 0080-0081, wherein in case of the wide viewing angle mode, the same data voltage is supplied to the main pixel (SP1) and the viewing angle control pixel (SP2), whereby an image may be displayed by the use of main pixel (SP1) and viewing angle control pixel (SP2), JU).
Regarding claim 21, JU in view of Wang and in view of Shikina teaches the display device of claim 18, further comprising: a hemispherical shaped lens disposed over the first light emitting element (Para 0112, a hemisphere or oval-spherical shape); and a semi-cylindrical shaped lens disposed over the second light emitting element (fig. 4, JU).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Jeong (US 2022/0036829), relates to a display device, and more particularly, to a display device which is capable of minimizing data transition.
Kang (US 2019/0103060), relates to a double-sided display that is capable of displaying an image on both front and back sides of a display panel.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAIFELDIN E ELNAFIA whose telephone number is (571)270-5852. The examiner can normally be reached 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM BODDIE can be reached at (571) 272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/S.E.E/Examiner, Art Unit 2625 3/12/2026
/WILLIAM BODDIE/Supervisory Patent Examiner, Art Unit 2625