CTNF 18/777,046 CTNF 76922 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION This office acknowledges receipt of the following items from the Applicant: Information Disclosure Statement (IDS) filed on 11/12/24 and 9/30/24 are considered. Claim 1 is canceled. Claims 2-21 are newly added. Claims 2-21 are pending. Double Patent Rejection 15-24-06 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970);and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b). Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Claims 2-21 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,062,389 and claims 1-25 U.S. Patent No. 11,017,831 . Although the conflicting claims are not identical, they are not patentably distinct from each other because of the reasons set forth below. Similar to the claimed invention, the instant claims 2-21 discloses “A method by a memory system, comprising: selecting, as part of an access operation for a memory cell, a digit line from a set of digit lines; coupling a subset of the set of digit lines with a plate, the plate coupled with the memory cell; and increasing a voltage of the plate from a first voltage to a second voltage while the digit line is coupled with a capacitor”; “A method by a memory system, comprising: increasing a voltage of a digit line coupled with a memory cell from a first voltage to a second voltage; activating, based at least in part on increasing the voltage of the digit line, a word line coupled with the memory cell to couple the digit line with a capacitor included in the memory cell; increasing, based at least in part on activating the word line, a voltage of a plate from the first voltage to the second voltage while the digit line is coupled with the memory cell and while a second digit line is coupled with the plate; and deactivating the word line, based at least in part on increasing the voltage of the plate, to decouple the capacitor from the digit line”; and “A memory system, comprising: a memory cell coupled with a digit line and a word line; a plate coupled with the memory cell; and a controller coupled with the digit line, the word line, and the plate, wherein the controller is configured to cause the memory system to bias the plate at a first voltage, bias the digit line at a second voltage, and activate the word line; read, based at least in part on activating the word line, a logic state stored by the memory cell; transition the plate from the first voltage to the second voltage while the digit line is coupled with the memory cell; and deactivate the word line based at least in part on transitioning the plate from the first voltage to the second voltage”. 14-37 AIA As can be seen, the patent protection for the claimed invention has already been granted to the earlier filed application. eTerminal Disclaimer The USPT© internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 2-21 would be allowable if an eTerminal Disclaimer signed and filed by an attorney or agent of record to overcome the obviousness-type double patenting rejection. Conclusion The prior art made of record and not relied upon is considered pertinent to applicants’ disclosure. Derner et al, Patent No.10,418,084 discloses FeRAM memory cells, digit lines, word lines, plate lines, and pre-write/read operations. However, it does not disclose “coupling a subset of digit lines with a plate or coupling a second digit line with the plate”. The reference maintains separate digit-line and plate-line structures and therefore does not teach the claimed configuration of the instant invention. When responding to the office action, Applicants’ are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist the examiner to locate the appropriate paragraphs. A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the date of this letter. Failure to respond within the period for response will cause the application to become abandoned (see MPEP 710.02 (b)). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Connie Yoha, whose telephone number is (571) 272-1799. The examiner can normally be reached on Mon. - Fri. from 8:00 A.M. to 5:30 PM. The examiner's supervisor, Alexander Sofocleous, can be reached at (571) 272-0635. The fax phone number for this Group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov Should you have questions on access to the Private Pair system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /CONNIE C YOHA/Primary Examiner, Art Unit 2825 Application/Control Number: 18/777,046 Page 2 Art Unit: 2825 Application/Control Number: 18/777,046 Page 3 Art Unit: 2825 Application/Control Number: 18/777,046 Page 4 Art Unit: 2825 Application/Control Number: 18/777,046 Page 5 Art Unit: 2825