Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
NONFINAL OFFICE ACTION
This Office Action addresses U.S. Patent Application No. 18/777,820, entitled “SEMICONDUCTOR DEVICE”, filed July 19, 2024, and claims priority from Japanese Application Publication No. JP2023120811A, filed July 23, 2023.
Claims 1-10 are pending.
REQUIREMENT FOR INFORMATION UNDER 37 CFR 1.105
37 CFR 1.105(a)(1) states:
In the course of examining or treating a matter in a pending or abandoned application … the examiner or other Office employee may require the submission, from individuals identified under § 1.56(c), or any assignee, of such information as may be reasonably necessary to properly examine or treat the matter.
(1) In March and April of 2024, the inventors acknowledged, under oath, the duty to disclose to the Patent and Trademark Office all information known to be material to patentability of the subject matter claimed in this application, as “materiality” is defined in Title 37, Code of Federal Regulations, § 1.56.
(2) Individuals associated with the filing or prosecution of a patent application are responsible for the duty to disclose. This includes:
(a) Each inventor named in the application;
(b) Each attorney or agent who prepares or prosecutes the application; and
(c) Every other person who is substantively involved in the preparation or prosecution of the application and who is associated with the inventor, the applicant, an assignee, or anyone to whom there is an obligation to assign the application.
(3) On July 19, 2024, U.S. Patent Application No. 18/777,820 was filed with claims directed to a semiconductor device with a reference voltage generating circuit for generating a reference voltage, a regulator circuit for generating a power supply voltage based on the reference voltage, a trimming code supply circuit for supplying a trimming code, and adjusting the reference voltage to change the output ratio of the power supply voltage to the reference voltage.
(4) On December 3, 2025, a search of the prior art by the examiner revealed several patents and published patent applications by the inventor(s) and/or assignee relating to the same subject matter as the invention. Some examples are:
U.S. Patent Application No. 20040085690
U.S. Patent Application No. 20100327841
U.S. Patent Application No. 20160291078
U.S. Patent No. 7177123
U.S. Patent No. 7456680
U.S. Patent No. 9529402
U.S. Patent No. 10310007
U.S. Patent No. 10614895
European Patent No. EP 3522348 A1
Note for example, U.S. Patent No. 10614895 is directed to a semiconductor device that adjusts a specific reference voltage with an external reference voltage at the time of a trimming operation, and then determines trimming codes corresponding to the adjustment amounts of a plurality of power supply voltages using a plurality of reference voltages generated using the adjusted specific reference voltage and a plurality of power supply voltages corresponding to the reference voltages.
Applicants have not satisfied the duty to disclose all information known to be material to patentability of the subject matter claimed in this application.
Related applications or publications authored by the applicant, suggest that applicant(s) likely has access to information necessary to a more complete understanding of the invention and its context. The record suggests that the details of such information may be relevant to the issue of patentability, and thus shows the need for information. See MPEP 704.11.
Applicant and the assignee of this application are required under 37 CFR 1.105 to provide the following information that the examiner has determined is reasonably necessary to the examination of this application.
The information is required to enter in the record the art suggested by the applicant as relevant to this examination, narrowed to the scope of technologies that use reference voltages for regulating voltage levels in semiconductor devices.
(1) In response to this requirement, please provide copies of each publication which any of the inventors authored or co-authored and which describe the disclosed subject matter, narrowed to the scope of technologies that use reference voltages for regulating voltage levels in semiconductor devices.
(2) In response to this requirement, please provide the title, citation and copy of each publication that is a source used for the description of the prior art in the disclosure, narrowed to technologies that use reference voltages for regulating voltage levels in semiconductor devices in the prior art. For each publication, please provide a concise explanation of that publication’s contribution to the description of the prior art.
(3) In response to this requirement, please provide the title, citation and copy of each publication that any of the inventors relied upon to develop and/or draft the disclosed subject matter that describes the invention, particularly as to technologies that use reference voltages for regulating voltage levels in semiconductor devices. For each publication, please provide a concise explanation of the reliance placed on that publication in the development of the disclosed subject matter.
(4) In response to this requirement, please state the specific improvements of the subject matter in claims 1-10 over the disclosed prior art and indicate the specific elements in the claimed subject matter that provide those improvements.
The timing fee and certification requirements of 37 CFR 1.97 are waived for those documents submitted in reply to the requirement. This waiver extends only to those documents within the scope of this requirement under 37 CFR 1.105 that are included in the applicant’s first complete communication responding to this requirement. Any supplemental replies subsequent to the first communication responding to this requirement and any information disclosures beyond the scope of this requirement under 37 CFR 1.105 are subject to the fee and certification requirements of 37 CFR 1.97 where appropriate.
The applicant is reminded that the reply to this requirement must be made with candor and good faith under 37 CFR 1.56. Where the applicant does not have or cannot readily obtain an item of required information, a statement that the item is unknown or cannot be readily obtained may be accepted as a complete reply to the requirement for that item.
This requirement is an attachment of the following Office action. A complete reply to the Office action must include a complete reply to this requirement. The time period for reply to this requirement coincides with the time period for reply to the enclosed Office action.
A reply, or a failure to reply, to a requirement for information under 37 CFR 1.105(a)(1) will be governed by §§ 1.135 and 1.136.
DRAWING OBJECTIONS
The drawings are objected to under 37 CFR 1.83(a) because:
The drawings are not in accordance with 37 CFR 1.84(l), which states, “Every line, number, and letter must be durable, clean, black (except for color drawings), sufficiently dense and dark, and uniformly thick and well-defined.”
In the drawings, some of the lines and text are sufficiently dense and dark (note “Trimming Code” in the example below), but others are not sufficiently dense and dark (note “Pulse Generator” in the example below). For example:
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The drawings must be revised to correct these errors where they appear.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application.
Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
SPECIFICATION
The disclosure is objected to because of the following informalities:
(1) The title of the invention is not descriptive of the claimed invention. For example, the claims are directed to a semiconductor device with a reference voltage generating circuit for generating a reference voltage, a regulator circuit for generating a power supply voltage based on the reference voltage, a trimming code supply circuit for supplying a trimming code, and adjusting the reference voltage to change the output ratio of the power supply voltage to the reference voltage.
A new title is required that is clearly indicative of the invention to which the claims are directed.
(2) The abstract of the disclosure is not in accordance with 37 C.F.R. 1.72 or MPEP 608.01(b).
(a) MPEP 608.01(b)(I)(B) states, “The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.” The language “the adjustment range … is expanded” is a comparison to the prior art.
(b) According to 37 C.F.R. 1.72, “The abstract must be as concise as the disclosure permits”. Language such as “is configured to be able to” is not concise.
(c) MPEP 608.01(b)(I)(C) requires that the form and legal phraseology often used in patent claims should be avoided. Language such as “is configured to be able to” should be avoided.
With regard to (b) and (c), “The reference voltage generation circuit is configured to be able to adjust the reference voltage” may be rewritten as “The reference voltage generation circuit adjusts the reference voltage” and “The regulator is configured to be able to change the output ratio” may be rewritten as “The regulator changes the output ratio”.
(3) The specification is required to be written in “full, clear, concise, and exact terms.” However, the present specification includes numerous errors in English idiom.
Some examples of such language of the specification are:
(a) In ¶ [0001], “including the specification, drawings and abstract” is redundant with “in its entirety.”
(b) In ¶ [0003] and ¶ [0006], “Patent Document 1” and “Patent Document 2” are not necessary. In ¶ [0006], “The publications noted above” should replace “Patent Document 1 and Patent Document 2”.
(c) In ¶ [0007] and elsewhere in the specification, “increase” should replace “expand”.
(d) In ¶ [0026], “the following descriptions and drawings are appropriately omitted and simplified” is confusing. Likewise, “omitted as necessary” does not make sense and should probably be “omitted for simplicity”.
(e) Between ¶ [0027] and ¶ [0028], the language “Consideration Leading to the Embodiment” should be revised.
Note that these are just some of examples of many errors. The entire specification should be revised to remove similar errors in translation.
CLAIM OBJECTIONS
Claims 4-9 are objected to because of the following informalities:
(1) In claim 4, “notify the timing information of supply the voltage control signal” should be revised.
(2) In claim 5, “notify the timing information of supply the voltage control signal” should be revised.
In claim 6, “configured” should replace “configure”.
In claim 6, “threshold” should replace “threshold voltage” for consistency.
Claims 7-9 are objected to as being dependent on claim 6, as objected to above.
Appropriate correction is required.
CLAIM INTERPRETATION
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
An application may include one or more claim limitations that use the words “means for” and also limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) use(s) a generic placeholder.
Three Prong Analysis
To invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, a claimed phrase must meet the three prong analysis as set forth in MPEP § 2181, subsection I.
(A) Regarding Prong (A), the MPEP states:
the claim limitation uses the term "means" or "step" or a term used as a substitute for "means" that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function....
The claim limitations listed below do not use the language "means" or "step". However, each of these may be found to be a generic placeholder.
reference voltage generating circuit
regulator circuit
buffer circuit
voltage control circuit
non-volatile memory circuit
trimming code supply circuit
memory circuit
oscillator
counter
bandgap reference circuit
operational amplifier
ladder resistor
selector circuit
Thus, these limitations meet Prong (A) of the analysis.
(B) Regarding Prong (B), the MPEP states:
the term "means" or "step" or the generic placeholder is modified by
functional language, typically, but not always linked by the transition word "for" (e.g., "means for") or another linking word or phrase, such as "configured to" or "so that"...
The claim limitations listed below may be modified by functional language, as shown.
reference voltage generating circuit (“configured to”)
regulator circuit (“configured to”)
buffer circuit (“configured to”)
voltage control circuit (“configured to”)
non-volatile memory circuit (“configured to”)
trimming code supply circuit (“configured to”)
memory circuit (“configured to”)
oscillator (“configured to”)
counter (“configured to”)
bandgap reference circuit (not modified by functional language)
operational amplifier (not modified by functional language)
ladder resistor (not modified by functional language)
selector circuit (“configured to”)
Any limitations which have been marked “not modified by functional language” do not meet Prong (B) and will not be further considered in this analysis. All other limitations meet Prong (B) of the analysis and must be considered in the following step.
(C) Regarding Prong (C), the MPEP states:
the term "means" or "step" or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
With regard to where the limitations may be found in the disclosure:
memory controller (note ¶ [0022], which states that the controller is “not shown”; however, it is described in ¶ [0056], which states “The memory controller may determine a difference between the first voltage signal and a second voltage signal and may, based on the difference, determine an operational change to apply to a memory device to compensate for the difference.”)
comparator (note ¶ [0037] “Voltages sensed by each readout circuitry 60A, 60B are transmitted to a comparator 66 and used to generate a compare result 68.”)
reference voltage generating circuit (“configured to”)
regulator circuit (see below with regard to circuitry)
buffer circuit (see below with regard to circuitry)
voltage control circuit (see below with regard to circuitry)
non-volatile memory circuit (see below with regard to circuitry)
trimming code supply circuit (see below with regard to circuitry)
memory circuit (see below with regard to circuitry)
oscillator (note Figure 1, oscillator 160)
counter (note Figure 15, counter 190)
selector circuit (see below with regard to circuitry)
Note: With regard to the circuit limitations above, the circuitry as claimed combined with a description of the function of the circuits provides sufficient structure to one of ordinary skill in the art. See Mass. Inst. of Tech., 462 F.3d at 1355-1356, 80 USPQ2d at 1332 (“circuitry” is generally determined to have sufficient structure).
Thus, the limitations listed above do not meet Prong (C) of the analysis and thus do not invoke 35 U.S.C. § 112, 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph.
CLAIM REJECTIONS - 35 USC § 112, 2nd PARAGRAPH
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude
with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
(1) In claim 1, the scope of “change the output ratio of the power supply voltage to the reference voltage” is unclear as to whether there is a change to the ratio of the power supply voltage / reference voltage that is output, or whether the output ratio of the power supply voltage is changed to match the reference voltage.
(2) In claim 2, “the trimming code read from the non-volatile memory circuit” does not have antecedent basis, since there was no reading step.
(3) In claim 4, “the memory circuit” has unclear antecedent basis.
In claim 4, “the timing information” has no antecedent basis.
(5) In claim 5, “the number of pulses” has no antecedent basis.
In claim 5, “the timing information” has no antecedent basis.
In claim 7, “the bandgap voltage” has unclear antecedent basis.
CLAIM REJECTIONS - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okayama et al., U.S. Patent No. 10,614,895 in view of Ramasundar et al., U.S. Patent Application Publication No. 2023/0205244.
Okayama et al. (hereinafter, “Okayama”) and Ramasundar et al. (hereinafter, “Ramasundar”) are both directed to adjusting voltage levels for semiconductor devices.
(1) With regard to claim 1, Okayama teaches a semiconductor device comprising:
a reference voltage generating circuit configured to generate a reference voltage (Okayama, reference voltage generation circuit 21),
a regulator circuit configured to generate a power supply voltage based on the reference voltage (Okayama, power supply circuit 11), and
a buffer circuit configured to transmit the reference voltage from the reference voltage generating circuit to the regulator circuit (see below with regard to buffering),
wherein the reference voltage generating circuit is configured to adjust the reference voltage (Okayama, e.g., Figure 3 and column 5, lines 29-37),
wherein the regulator circuit is configured to change the output ratio (i.e. comparison) of the power supply voltage to the reference voltage (Okayama, e.g., column 9, lines 52-65), and
wherein the semiconductor device further includes a voltage control circuit configured to output a voltage control signal to the regulator circuit to change the output ratio (Okayama, logic circuit 13).
Okayama described a system very similar to that of the claim 1. Okayama did not, however, explicitly mention the use of a buffer between the reference voltage generating circuit and the regulator circuit in which it resides, but did show buffers leading into its switches. Ramasundar, on the other hand, highlighted the advantage of buffers with a unity gain buffer that would strengthen the signal (Ramasundar, UGB, ¶ [0032]).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to incorporate the buffering of Ramasundar in the system of Okayama, since such a combination would have provided a stronger signal when using the UGB of Ramasundar in the system of Okayama.
With regard to claim 2, the semiconductor device according to claim 1, further comprising:
a non-volatile memory circuit (Okayama, e.g., memory circuit 52) configured to store a trimming code used to adjust the reference voltage (Okayama, column 14, lines 9-11, “the SRAM (52) is configured to be capable of temporarily storing a trimming code”), and
a trimming code supply circuit (Okayama, flash control circuit 40) configured to supply the trimming code read from the non-volatile memory circuit to the reference voltage generating circuit (Okayama, column 6, lines 17-19, “a trimming code is supplied from the flash control circuit 40 (see FIG. 7) to the reference voltage generation circuit 21”}.
With regard to claim 3, the semiconductor device according to claim 1,
wherein the voltage control circuit, when the power supply voltage exceeds a first threshold, changes the output ratio from a first output ratio to a second output ratio smaller than the first output ratio (note Okayama column 4, line 51, to column 5, line 18; note also Ramasundar, ¶ [0032] et seq.)
With regard to claim 4, the semiconductor device according to claim 2,
wherein the memory circuit is further configured to notify the timing information of supply the voltage control signal to the voltage control circuit (this language is unclear, as explained above).
With regard to claim 5, the semiconductor device according to claim 1, further comprises:
an oscillator configured to generate a clock signal (Ramasundar, clock 110 and oscillators, ¶ [0097]); and
a counter configured to count the number of pulses of the clock signal (Okayama, Figure 9, and note counter 41),
wherein the counter is further configured to notify the timing information of supply the voltage control signal to the voltage control circuit (this language is unclear, as explained above) based on the number of pulses.
With regard to claim 6, the semiconductor device according to claim 3, further comprises a voltage detection circuit configure to detect that the power supply voltage exceeds the first threshold voltage (Okayama, column 5, lines 15-18, “the power supply voltage becomes higher than the reference voltage at a certain timing. The comparator COMP outputs “Flag=1 (match)” as a comparison result at this timing, namely, the timing when the power supply voltage becomes higher than the reference voltage”).
With regard to claim 7, the semiconductor device according to claim 6,
wherein the reference voltage generation circuit comprises:
a bandgap reference circuit that generates a bandgap reference voltage;
an operational amplifier;
a ladder resistor connected between an output terminal of the operational amplifier and a ground terminal; and
a selector circuit configured to select one node from a plurality of nodes on the ladder resistor and output the voltage of the one node to an input terminal of the operational amplifier,
wherein the bandgap voltage is outputted to the operational amplifier, and
wherein the reference voltage is adjusted by the selector circuit (Ramasundar ¶ [0035] and ¶ [0097]).
With regard to claim 8, the semiconductor device according to claim 7,
wherein the first threshold is the voltage of a certain node (Okayama, e.g., node N1) of the plurality of the nodes, and
wherein the voltage of the certain node is supplied to the voltage detection circuit (Okayama, column 17, line 65, to column 18, line 4).
With regard to claim 9, the semiconductor device according to claim 6,
wherein the voltage detection circuit outputs a voltage guarantee signal when the power supply voltage exceeds a first threshold, and
wherein the voltage detection circuit stops outputting the voltage guarantee signal when the power supply voltage falls less than a second threshold signal smaller than the first threshold voltage (Okayama, column 4, lines 19-50, and note Ramasundar, ¶ [0032] et seq.)
With regard to claim 10, the semiconductor device according to claim 2, wherein the power supply voltage is supplied to the non-volatile memory circuit (Okayama, Figure 12).
CONCLUSION
Any inquiry concerning this communication or earlier communications from the examiner should be directed to B. James Peikari at telephone number (571)272-4185. The examiner can normally be reached M-F 8:30am - 5:30pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Kosowski can be reached at (571) 272-3744. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B. James Peikari/
Primary Examiner, Art Unit 3992