DETAILED ACTION
This action is in response to the claims filed 07/19/2024 for Application number 18/778,058. Claims 1-16 are currently pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/29/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-8 and 10-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 2-7 recites the limitation "A method as claimed..." in line 1. There is insufficient antecedent basis for this limitation in the claim. The examiner suggests to amend the claim to recite “The method as claim…” to overcome this antecedent basis issue.
Claim 8 recites the limitation "the method of executing a hybrid quantum algorithm of claim 1" in lines 2-3. There is insufficient antecedent basis for this limitation in the claim. It is unclear whether the claim is referring back to the same hybrid quantum algorithm of claim 1. Examiner suggests to amend the claim as follows: “The method of executing the hybrid quantum algorithm of claim 1, wherein the method further comprises a computer-implemented quantum error correction or variational quantum estimation algorithmic method.”
Claims 10-16 recites the limitation "A quantum computer as claimed in..." in line 1. There is insufficient antecedent basis for this limitation in the claim. The examiner suggests to amend the claim to recite “The quantum computer as claimed…” to overcome this antecedent basis issue.
The terms “smaller, small, and larger” in claims 3 and 12 are relative terms which render the claim indefinite. The terms “smaller, small, and larger” are not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The specification does not provide any frame of reference as to what problem instances would be considered to be “smaller” than. Similarly, the specification also does not provide any frame of reference for “small number of qubits” and “larger qubit numbers”. Since these terms are subjective definitions which differ from person to person, the metes and bounds of the claim is not made clear and one of ordinary skill in the art would not be able to properly avoid infringing upon a claim when no definition of these terms has been made.
The terms “relative, higher, and lower likelihood” in claims 5, 6, 14, and 15 are relative terms which render the claim indefinite. The terms “relative, higher, and lower” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Similarly, the specification also does not provide any frame of reference for relative, higher, and lower likelihood. Since these terms are subjective definitions which differ from person to person, the metes and bounds of the claim is not made clear and one of ordinary skill in the art would not be able to properly avoid infringing upon a claim when no definition of these terms has been made.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 7-11, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. ("US 20220374390 A1", hereinafter "Chong") in view of Zhang et al. ("Exploiting Different Levels of Parallelism in the Quantum Control Microarchitecture for Superconducting Qubits", hereinafter "Zhang").
Regarding claim 1, Chong teaches A computer-implemented method of executing a hybrid quantum algorithm in a quantum computer (¶0019, “variational algorithms (or “hybrid quantum-classical algorithms”)) having at least one CPU (¶0022, “CPU”) and at least one QPU (¶0020, “quantum processor”), the method comprising:
generating with the CPU respective sets of quantum gates [corresponding to each of the one or more result predictions] by performing respective one or more compilation tasks, each of the compilation tasks comprising compiling a portion of the algorithm (¶0024, A quantum algorithm may be described in terms of a quantum circuit. During quantum compilation, the quantum program 112 is first decomposed into a set of 1- and 2-qubit discrete quantum operations called logical quantum gates (sets of quantum gates)… ¶0029 discloses “In the example embodiment, the iteration execution result 140 is sent back to the compilation engine 114 and the compilation engine 114 performs additional compilation to generate a new optimized physical schedule for the next iteration… ¶0030 further states “The quantum computing system 100 may use VQE to find the ground state energy of a molecule. This task is exponentially difficult in general for a classical computer, but efficiently solvable by a quantum computer…);
receiving at the CPU the result of the measurement; (See FIG. 1, control computing device comprises the CPU and the result of the quantum processor is fed into the compilation engine) and
providing the QPU with a set of quantum gates that corresponds to the result of the measurement (See FIG. 1, ¶0020, “The quantum computing system described herein includes a compilation engine (e.g., executed on a classical computing device) that is configured to prepare and optimize a quantum program for execution on a quantum processor.”).
However fails to explicitly teach forming one or more result predictions or algorithm branches with the CPU of a result of a measurement being performed or to be performed by the QPU;
generating with the CPU respective sets of quantum gates corresponding to each of the one or more result predictions
Zhang teaches forming one or more result predictions or algorithm branches with the CPU of a result of a measurement being performed or to be performed by the QPU (“Quantum feedback control is a special control flow for the quantum scenario. This type of control requires real-time interaction between QCP and QPU. It refers to intermediate measurements, and branching according to the measurement outcomes, in a quantum circuit. This feedback control significantly complicates the parallelism exploitation by introducing pipeline stalls.” [pg. 2, left col, Quantum Feedback control]);
generating with the CPU respective sets of quantum gates corresponding to each of the one or more result predictions (“For instance, we can use a MRCE (Measurement Result Conditional Execution) instruction to indicate a simple feedback control process… Relevant information of this feedback control is stored, including the quantum operations and target qubits. The processor then continues to execute sub sequent instructions until one of the following occurs: (1) The valid measurement result is returned, and the processor switches back to the MRCE instruction. (2) The pipeline reads an instruction about the stored qubits, and thus stalls due to the dependence of these quantum instructions” [pgs. 8-9, §5.4, ¶3-¶4])
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Chong’s teachings by using quantum operations corresponding to respective measurement outcomes as taught by Zhang. One would have been motivated to make this modification as this mechanism allows for parallel execution of simple feedback control and quantum instructions that are irrelevant to this control and further reduces latency caused by conditional execution. [pg. 9, left col, Zhang]
Regarding claim 2, Chong/Zhang teaches A method as claimed in claim 1, Zhang teaches wherein the forming of the one or more result predictions comprises modelling the QPU with a classical quantum computer model. (See Figure 8, and §5.3.2., “Each processor has one classical pipeline and multiple quantum pipelines, which decode and execute classical and quantum instructions respectively.”)
Same motivation to combine the teachings of Chong/Zhang as claim 1.
Regarding claim 7, Chong/Zhang teaches A method as claimed in claim 1, Zhang teaches wherein, if a compilation task indicated by the measurement result received by the CPU has not been completed, the method includes responding by performing the compilation task indicated by the measurement result received by the CPU, generating the correct set of quantum gates, and passing the correct set of quantum gates to the QPU for execution. (“The processor needs to switch to the next program after the current execution is complete. It takes certain time for the scheduler 4 4 to fetch new instructions into the private cache, which may exceed the expected time for the next quantum operation to start acting on the QPU...Its status is changed to "done" when the execution completes, which is used to indicate the scheduling of subsequent blocks” [pg. 7, bottom left col – top right col])
Same motivation to combine the teachings of Chong/Zhang as claim 1.
Regarding claim 8, Chong/Zhang teaches A computer-implemented quantum error correction or variational quantum estimation algorithmic method, comprising the method of executing a hybrid quantum algorithm of claim 1. (Chong, See Abstract “variational algorithm”)
Regarding claim 9, it is substantially similar to claim 1 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Regarding claim 10, it is substantially similar to claims 1 and 2 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Regarding claim 11, it is substantially similar to claim 2 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Regarding claim 16, it is substantially similar to claim 7 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Claims 3 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chong in view of Zhang and further in view of Cantori et al. ("Supervised learning of random quantum circuits via scalable neural networks", hereinafter "Cantori").
Regarding claim 3, Chong/Zhang teaches A method as claimed in claim 2, however fails to explicitly teach comprising:
modelling a distribution of the future measurement results on the basis of smaller problem instances; or
modelling a distribution of the future measurement results on the basis of smaller problem instances, and simulating with the classical quantum computer model the selected quantum algorithm for a small number of qubits and extrapolating to larger qubit numbers.
Cantori teaches modelling a distribution of the future measurement results on the basis of smaller problem instances; or
modelling a distribution of the future measurement results on the basis of smaller problem instances, and simulating with the classical quantum computer model the selected quantum algorithm for a small number of qubits and extrapolating to larger qubit numbers. (“Still, producing training sets for supervised learning via classical computers quickly becomes unfeasible as the system size increases. In the context of ground-state simulations, this problem has been addressed via scalable neural networks [14, 15]. These allow performing transfer learning from small to large systems [9, 16], and even to extrapolate to sizes larger than those included in the training set. So, it is natural to wonder whether neural networks might also be trained to emulate quantum circuits, and whether they might extrapolate to large qubit numbers where exact simulation methods become problematic” [pg. 1, 1. Introduction])
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Chong’s/Zhang’s teachings in order to implement the extrapolation technique as taught by Cantori. One would have been motivated to make this modification in order to allow transfer learning from small to large systems. [Abstract, Introduction, Cantori]
Regarding claim 12, it is substantially similar to claim 3 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Claims 4 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chong in view of Zhang and further in view of Dhand et al. ("US 20220391571 A1", hereinafter "Dhand").
Regarding claim 4, Chong/Zhang teaches A method as claimed in claim 2, however fails to explicitly teach comprising the classical quantum computer model performing a classical simulation using: tensor network states; or one or more artificial neural networks; or one or more quantum Monte-Carlo methods.
Dhand teaches comprising the classical quantum computer model performing a classical simulation using: tensor network states; or one or more artificial neural networks; or one or more quantum Monte-Carlo methods. (“A method includes receiving a representation of a quantum circuit at a processor and identifying multiple contraction trees based on the representation of the quantum circuit. Each of the contraction trees represents a tensor network from a set of tensor networks” [Abstract; note: under the BRI, the claim recites “or” thus recites alternative language where the examiner is only required to map to one of the recited elements.])
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Chong’s/Zhang’s teachings in order to use classical tensor network simulations of quantum circuits as taught by Dhang. One would have been motivated to make this modification in order to address known challenges in RQC simulation techniques. [¶0022, Dhand]
Regarding claim 13, it is substantially similar to claim 4 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Claims 5, 6, 14, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Chong in view of Zhang and further in view of Mladenov et al. ("US 20240104413 A1", hereinafter "Mladenov").
Regarding claim 5, Chong/Zhang teaches A method as claimed in claim 1, comprising determining a likelihood or relative likelihood of each of the one or more result predictions being correct.
Mladenov teaches determining a likelihood or relative likelihood of each of the one or more result predictions being correct. (“Quantum computing systems execute algorithms containing quantum logic operations performed on qubits. In some cases, the result of the algorithm is not deterministic. The quantum algorithm may be repeated many times in order to determine a statistical distribution of results or in order to have a high likelihood of finding the correct answer. In some cases, a classical algorithm may be used to check if the quantum computer determined the correct result.” [¶0027])
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Chong’s/Zhang’s teachings in order to determine a likelihood of a result prediction being correct as taught by Mladenov. One would have been motivated to make this modification as quantum algorithms may need to be repeated many times in order to determine a statistical distribution of results or in order to have a high likelihood of finding the correct answer. [¶0027, Mladenov]
Regarding claim 6, Chong/Zhang/Mladenov teaches A method as claimed in claim 5, comprising: determining the likelihood or relative likelihood of each of the one or more result predictions with a classical quantum computer model (“In some cases, a classical algorithm may be used to check if the quantum computer determined the correct result.” [¶0027]); and/or
(note: The claim recites alternative language such as “and/or” thus under BRI, the examiner is only required to map to one of the recited elements)
Regarding claims 14 and 15, they are substantially similar to claims 5 and 6 respectively, and are rejected in the same manner, the same art, and reasoning applying.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL H HOANG whose telephone number is (571)272-8491. The examiner can normally be reached Mon-Fri 8:30AM-4:30PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kakali Chaki can be reached at (571) 272-3719. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL H HOANG/PRIMARY EXAMINER, Art Unit 2122