DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on July 22, 2024 and July 17, 2025 are being considered by the examiner.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
The abstract of the disclosure is objected to because it contains the form and legal phraseology often used in patent claims, such as “comprises” in line 2. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
There are two separate requirements set forth in the second paragraph of 35 U.S.C. 112:
(A) the claims must set forth the subject matter that applicants regard as their invention; and
(B) the claims must particularly point out and distinctly define the metes and bounds of the subject matter that will be protected by the patent grant.
With regard to claim 1, it is not clear if the signal in the limitation, “at least one threshold signal”, as recited in step d) is the same with or different from the signal in the limitation, “at least one threshold signal”, as recited in step b).
With regard to claim 2, it is dependent from claim 1 and recites “wherein step b) comprises: using a single threshold signal having a predefined value or a configurable value or a predefined waveform”. It is unclear to a hypothetical person possessing the ordinary level of skill in the pertinent art how the defined “a single threshold signal having a predefined value or a configurable value or a predefined waveform” relates to “at least one threshold signal having a predefined value or a configurable value or a predefined or a configurable waveform” defined in step b) of claim 1 (emphasis added). For example, if “a single threshold signal” is to be understood as the same threshold signal as defined in claim 1, it should be indicated as “the at least one threshold signal”. If, on the contrary, it is meant that “a single threshold signal” is another threshold signal, it is unclear how such a threshold signal could be considered “single” if another threshold signal is defined in claim 1. The same applies to the defined “a single time value or a single count value or a single index value” of step c) in claim 2 in respect to the “at least one time value or at least one count value or at least one index value” defined in claim 1.
With regard to claim 3, the same kind of rejection applies to this claim where it is unclear how “a first threshold signal” and “a second threshold signal” relate to the “at least one threshold signal” defined in claim 1 . The similar rejection also applies to “a first/second time value or a first/second count value or a first/second index value” in step c) with respect to “at least one time value or at least one count value or at least one index value” defined in step c) of claim 1.
With regard to claims 4, 6 and 7, the same rejection applies for the same lack of consistency in respect to claim 1. Furthermore, claim 4 recites a limitation, “using a predefined second time value or a predefined second count value or a second index value related to a second event at which a common-mode signal would pass the second threshold signal” (emphasis added), which introduces a conditional or hypothetical element that makes it unclear whether the claim applies to an actual signal, a predicted signal, or theoretical possibilities, not described in the claim, thus rendering the claim ambiguous.
With regard to claim 11, it defines a controller which is said to be “configured for performing a method according to any one of claim 1”. Thus, in the limitation “a threshold generator for generating at least one threshold signal or value”, it is unclear whether or not the feature, “at least one threshold signal or value”, is the same as that of “at least one threshold signal” of claim 1.
It should also be noted that the “or” clauses are used extensively in the claims. There is a plurality of instances of “or” throughout claims 1-15. This wording makes it impossible for a hypothetical person possessing the ordinary level of skill in the pertinent art to understand the claims globally and provides an unclear scope of protection determined by certain inconsistent combinations. For example, there might be a possible scenario that “determining a first time value” and “determining a second count value” in step c) of claim 6 are performed, then “a difference between the first and second time value” or “a difference between said first and second count value” as recited in step d) of claim 6 or in claim 7 cannot be determined. Therefore, the metes and bounds of the subject matter of claim 6 or claim 7 cannot be distinctly defined. The claims should therefore be reworded to reduce the number of "or" clauses and to make all combinations consistent with the description.
The essential purpose of patent examination is to determine whether or not the claims are precise, clear, correct, and unambiguous to ensure that the scope of the claims is clear so the public is informed of the boundaries of what constitutes infringement of the patent. Therefore, the uncertainties of claim scope should be removed as much as possible.
With regard to claims 2-15, these claims are rejected at least by virtue of their dependencies directly or indirectly from the base claim 1.
For examining purposes, the application will be examined as best understood.
Claim Interpretation
According to MPEP 2112.02: Process Claims, it is noted that “Under the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device” (emphasis added). It is also noted in that same MPEP section that “The Federal Circuit upheld the Board’s finding that "Donley inherently performs the function disclosed in the method claims on appeal when that device is used in ‘normal and usual operation’" and found that a prima facie case of anticipation was made out” (emphasis added). Id. at 138, 801 F.2d at 1326. It was up to applicant to prove that Donley's structure would not perform the claimed method when placed in ambient light.).”
With regard to claims 11-15, these claims present a circuit according to the method of claims 1-10. Therefore, the argument made against claims 1-10 also applies, mutatis mutandis, to claims 11-15. In addition, it is clearly seen that claims 1-10 are process claims which present a process of using the system as claimed in claims 11-15, respectively.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 and 8-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kobayashi (US 2009/0015240 A1).
Kobayashi teaches a detection circuit comprising:
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With regard to claims 1 and 11, a method of providing a digital value (FIG. 3, digital signal D_out) indicative of a physical quantity (force, acceleration, or temperature) to be measured by a sensor circuit or a bridge circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) that has two excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n) and at least one output node (FIG. 3, nodes connected to detection signals S_n and S_p), the method comprising the steps of: a) applying a time-varying biasing signal (FIG. 3, driving signals Drv_p and Drv_n) with a predefined or a configurable waveform (FIG. 4, waveform of driving signals Drv_p and Drv_n ) to the excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n), causing the at least one output node (FIG. 3, nodes connected to detection signals S_n and S_p) to provide at least one time-varying output signal (FIG. 3, detection signals S_n and S_p); b) using at least one threshold signal (FIG. 4, reference voltage Vcom) having a predefined value or a configurable value or a predefined or a configurable waveform; c) determining at least one time value (FIG. 4, time period T11 and time period T12) or at least one count value (FIG. 4, count value CNT) or at least one index value related to a first event (FIG. 4, event being mapped to Sout crossing either Vcom+ΔVhys or Vcom-ΔVhys) at which the at least one output signal (FIG. 3, detection signals S_n and S_p) passes at least one threshold signal (FIG. 4, reference voltage Vcom); d) determining a digital value (FIG. 3, digital signal D_out) indicative of the physical quantity (force, acceleration, or temperature) to be measured based on said at least one time value (FIG. 4, time period T11 and time period T12) or count value (FIG. 4, count value CNT) or index value (For more details, please read: Abstract; paragraphs: [0033]-[0040]; and FIGS. 3 and 5-7).
With regard to claim 11, a circuit (FIG. 3, acceleration detection circuit 40) for providing a digital value (FIG. 3, digital signal D_out) indicative of a physical quantity (force, acceleration, or temperature) to be measured by a sensor circuit or a bridge circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) that has two excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n) and at least one readout node (FIG. 3, nodes connected to detection signals S_n and S_p), the circuit (FIG. 3, acceleration detection circuit 40) comprising: a biasing circuit (FIG. 3, buffer circuit 26 and inverting buffer circuit 27); a threshold generator (FIG. 3, reference voltage source Vcom) for generating at least one threshold signal or value (FIG. 4, reference voltage Vcom); at least one of the following: a timer (FIGS. 3 and 4, clock CLK), a counter (FIGS. 3 and 4, digital circuit 42 including a counter), a lookup-table with a DAC (FIG. 4, digital circuit 42 and DAC 25); comparison means (FIG. 3, comparators 15 and 41) for comparing the at least one output signal (FIG. 3, detection signals S_n and S_p) or a signal or value derived therefrom and the at least one threshold signal or value (FIG. 4, reference voltage Vcom); a controller (FIG. 3, controller such as a microcomputer or digital circuit 42) configured for performing a method according to claim 1 (For more details, please read: Abstract; paragraphs: [0033]-[0040]; and FIGS. 3 and 5-7).
With regard to claim 2, although it is unclear what is meant by “a single threshold signal/time value/count value/index value” as discussed in the rejection under 35 U.S.C. 112 above, Kobayashi discloses in FIG. 4 such features as the threshold signal as mapped above is single (See also the alternative embodiment of FIG. 1 and the corresponding description in paragraphs [0019]-[0027]) (For more details, please read: Abstract; paragraphs: [0033]-[0040]; and FIGS. 3 and 5-7).
With regard to claim 3, Kobayashi reveals a time-varying common mode signal (FIG. 4, count value CNT). As disclosed in paragraph [0036], the time between the crossing of count value CNT with 0 (the second event of claim 3 ) and the crossing of S_out with either Vcom+ΔVhys, Vcom-ΔVhys (i.e. the first event of claim 3) is measured; Kobayashi also discloses a first and a second time value, the second time being the time at which the count value CNT signal begins to ramp, the first time value being T11.
With regard to claim 4, it is noted that a second event is defined as the time at which a common-mode signal would pass the second threshold signal. Due to lack of clarity as discussed in the rejection under 35 U.S.C. 112 above, no meaning can be ascribed to such a statement and the reasoning of the point above applies.
With regard to claim 5, the at least one threshold signal (FIG. 4, reference voltage Vcom) has a predefined voltage level or a predefined value (FIGS. 2 and 4).
With regard to claim 8, the time-varying biasing signal (FIG. 3, driving signals Drv_p and Drv_n) has a waveform with a linearly increasing/decreasing (FIG. 4).
With regard to claim 9, measuring a temperature (FIG. 5, temperature detection circuit 50); and adjusting (controlling) the at least one threshold voltage (FIG. 6, reference voltage Vcom) based on the measured temperature; or adjusting the at least one measured time value (time period) or adjusting the at least one measured count value (count value CNT) or adjusting the at least one measured index value or adjusting the difference between the first and the second time value, or adjusting the difference between the first and the second count value, or adjusting the difference between the first and the second index value, based on the measured temperature (Paragraphs: [0041]-[0047]).
With regard to claim 10, the sensor circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) comprises at least two resistors connected in series (FIG. 3, resistors R11 and R12 or R13 and R14); or wherein the bridge circuit is or comprises at least one Wheatstone bridge (FIG. 3, resistors R11 to R14) (For more details, please read: Abstract; paragraphs: [0033]-[0040]; and FIGS. 3 and 5-7).
With regard to claim 12, at least one sensor circuit or bridge circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) that has two excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n) and at least one readout node (FIG. 3, nodes connected to detection signals S_n and S_p); at least one circuit (FIG. 3, acceleration detection circuit 40) according to claim 11, operatively connected to the excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n) and to the at least one output node (FIG. 3, nodes connected to detection signals S_n and S_p) of said at least one sensor circuit or bridge circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) (For more details, please read: Abstract; paragraphs: [0033]-[0040]; and FIGS. 3 and 5-7).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi.
Kobayashi teaches all that is claimed as discussed in the rejections of claims 1-5 and 8-15 above including the sensor circuit or a bridge circuit (FIG. 3, resistors R11 to R14 constituting the piezo-resistor acceleration sensor) that has two excitation nodes (FIG. 3, nodes connected to driving signals Drv_p and Drv_n) and at least one output node (FIG. 3, nodes connected to detection signals S_n and S_p) for providing at least one output signal (FIG. 3, detection signals S_n and S_p), and determining a digital value (FIG. 3, digital signal D_out) indicative of the physical quantity (force, acceleration, or temperature) to be measured based on said at least one time value (FIG. 4, time period T11 and time period T12) or count value (FIG. 4, count value CNT. However, Kobayashi does not specifically teach “a first threshold signal” and “a second threshold signal”.
It is noted that instead of generating two threshold signals respect to Vcom, a hysteresis, ΔVhys, provided by the comparators 15 and 41 in combination with the resistors R5, R6, R22 and R21 is used to provide two signal levels, Vcom+ΔVhys, Vcom-ΔVhys, apparently used as the two threshold signals. This difference merely relates to an alternative implementation of the comparison, the skilled person would adopt two threshold signals, according to the circumstances, to implement the same circuit without recurring to any inventiveness.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the detection circuit of Kobayashi to generate two threshold signals since such an arrangement is beneficial to provide desirable and exemplary choices for a detection circuit. Such an implementation can significantly increase the effectiveness of the detection circuit with desirable levels of accuracy, resolution, stability and reliability in the measurements.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicant’s attention is invited to the followings whose inventions disclose similar devices.
Todorokihara (CN 118688479 A) teaches a sensor module.
Laplanche (TW 201321778 A) teaches an apparatus for determining changes in predetermined physical properties of a circuit.
CONTACT INFORMATION
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOAI-AN D. NGUYEN whose telephone number is (571) 272-2170. The examiner can normally be reached MON-THURS (7:00 AM - 5:00 PM).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LEE E. RODAK can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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HOAI-AN D. NGUYEN
Primary Examiner
Art Unit 2858
/HOAI-AN D. NGUYEN/ Primary Examiner, Art Unit 2858