Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because FIG. 8 is incorrect.
FIG. 8, step 826 should read “Transition to Inactive State L1” instead. If no traffic is received before the conductor completes transitioning to the Inactive State L1 (824 – NO), transition to the Inactive State L1 is justified – i.e. step 826 changed as suggested.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
For the purpose of examination, it is assumed that step 826 reads as indicated above.
Specification
The disclosure is objected to because of the following informalities:
Paragraph 0115 in the specification requires correction to match the correction for FIG. 8, as indicated above.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites “cause the signal conductor to transition from a first power state to a second power state based at least in part on the predicted amount of inactive time, the first power state to be a higher power state than the second power state” (lines 7-9).
Claim 8 recites “predict an amount of time that a signal conductor is to remain idle based, at least in part, on one or more inactive time periods; and transition the signal conductor from an active power state to an inactive power state based, at least in part, on the amount of time” (lines 3-6).
Claim 16 recites “cause the signal conductor to transition from an active power state to an inactive power state based at least in part on the predicted amount of time” (lines 7-9).
Accordingly claims 1, 8, and 16 recite the functionality for transitioning from active (first) power state to inactive (second) power state based on predicted amount of time, which predicted amount of time is based on previous/observed inactive time period(s) during which the signal conductor is predicted to remain inactive/idle.
Although the written description supports transitioning from inactive to active state (FIG(s) 6 and 8, and corresponding disclosure), the disclosure is silent of how the functionality for transitioning from active to inactive state based on the predicted inactive time period is achieved, as claimed in claims 1, 8, and 16. One of ordinary skill in the art would not know how to reverse FIG(s) 6 and/or 8 in order to implement such functionality.
Claims 2-7, 9-15, and 17-21, being dependent on respective claims 1, 8, and 16, are rejected based on the same ground of rejection.
In addition, claim 5 recites “the one or more circuits are to cause the signal conductor to transition from the second power state to a third power state after the period of time elapses”. The disclosure defines only two power states for the conductor: inactive state L1 and active state L0. The disclosure also covers transitioning from the first (active) power state to the second (inactive) power state and vice versa. However, the disclosure is silent with respect to transitioning the conductor from the second (inactive) power state to a third power state.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 8 and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cooper et al., US Patent Appl. Pub. No. 2008/0288798 in view of Verdun, US Patent Appl. Pub. No. 2007/0050653.
Regarding claim 1, Cooper discloses a processor comprising one or more circuits (FIG. 5, 510, paragraph 0044, lines 9-12, paragraph 0045, lines 6-14) to:
monitor a signal conductor to determine when the signal conductor is conveying one or more signals (FIG. 3, 305-310, paragraph 0041, lines 2-4);
determine a predicted amount of inactive time during which the signal conductor is predicted to remain inactive (anticipating inactivity period based on transaction activity – paragraph 0039, FIG. 3, 315, paragraph 0041, lines 3-8); and
cause the signal conductor to transition from a first power state (active L0 state) to a second power state (inactive L1 state) based at least in part on the predicted amount of inactive time, the first power state to be a higher power state than the second power state (paragraph 0015, lines 6-7, lines 13-14.
Regarding claim 8, Cooper discloses a processor comprising one or more processing units (FIG. 5, 510, paragraph 0045, lines 6-14) to:
detect a state of a signal conductor (FIG. 3, 305-310, paragraph 0041, lines 2-4);
predict an amount of time that a signal conductor is to remain idle (anticipating inactivity period based on transaction activity – paragraph 0039, FIG. 3, 315, paragraph 0041, lines 3-8); and
transition the signal conductor from an active power state to an inactive power state (FIG. 3, 315-No, 335, paragraph 0041, lines 4-10).
Regarding claim 16, Cooper discloses a system (FIG. 5), comprising:
a signal conductor (FIG. 5, PCIe bus 505, paragraph 0044, lines 18-19);
at least one counter to determine at least one observed idle period of time (inherently disclosed – FIG. 2, counter measuring either idle duration at step 215 and/or step 230); and
one or more processors to monitor the signal conductor (FIG. 5, 510, paragraph 0044, lines 9-12, paragraph 0045, lines 6-14) to determine when the signal conductor is conveying one or more signals (FIG. 3, 305-310, paragraph 0041, lines 2-4), determine a predicted amount of inactive time during which the signal conductor is predicted to remain inactive (anticipating inactivity period based on transaction activity – paragraph 0039, FIG. 3, 315, paragraph 0041, lines 3-8), and cause the signal conductor to transition from an active power state to an inactive power state based at least in part on the predicted amount of time (FIG. 3, 315-No, 335, paragraph 0041, lines 4-10).
With respect to claim 1, Cooper does not specifically state the inactive time based, at least in part, on one or more previous inactive time periods during which the signal conductor was not conveying any signals.
With respect to claim 8, Cooper does not specifically state the predicted amount of time based, at least in part, on one or more inactive time periods and the transition from the active to inactive state based, at least in part, on one or more inactive time periods.
With respect to claim 16, Cooper does not specifically state the predicted amount of time based, at least in part, on the at least one observed idle period of time.
Verdun teaches power management system and method for dynamically adjusting the inactivity time for a PCI Express bus (FIG. 1, 26) before initiation of a low power state by analyzing the transactions between the low power and operating states over time (i.e. one or more observed/previous inactive time periods during which the signal conductor was not conveying any signals – Abstract, lines 1-5, Fig. 1, paragraph 0016, lines 18-25, Fig. 2, 44-54, paragraph 0017, lines 10-24). Verdun further teaches based on this analysis, adjusting the timer value of the inactivity timer (Fig. 1, 30), which value is used for determining when to transition into low power state (Fig. 1, paragraph 0016, lines 22-25, FIG. 2, 56-Yes, 60, 40-Yes, paragr5aph 0018, lines 1-23, paragraph 0017, lines 5-10). Thus, adjusting the system performance to varying conditions for optimal performance with minimal power consumption (paragraph 0010).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the above-described system and functionality, as suggested by Verdun with the processor disclosed by Cooper in order to implement the inactive time based, at least in part, on one or more previous inactive time periods during which the signal conductor was not conveying any signals, the predicted amount of time based, at least in part, on one or more inactive time periods and the transition from the active to inactive state based, at least in part, on one or more inactive time periods, and the predicted amount of time based, at least in part, on the at least one observed idle period of time.
One of ordinary skill in the art would be motivated to do so in order to achieve optimal performance with minimal power consumption.
Regarding claim 2, Cooper further discloses the processor wherein the one or more circuits are to cause the signal conductor to remain in the second power state for a period of time (remaining in inactive Li state for period of time until transactions are pending – FIG. 3, FIG. 3, 315-No, 335-Yes, 350, 355-No).
Regarding claim 3, Cooper further discloses the processor, as per claim 2, wherein the period of time is the predicted amount of inactive time (FIG. 3, 315-No, 335-Yes, 350, 355-No).
Regarding claim 4, Cooper further discloses the processor, as per claim 2, wherein the one or more circuits are to cause the signal conductor to transition back to the first power state after the period of time elapses (FIG. 3, 315-No, 335-Yes, 350, 355-Yes).
Regarding claim 17, Cooper further discloses the system further comprising: one or more switches to switch the signal conductor between the active power state and the inactive power state (one or more switches are inherently disclosed in order to shutdown/poweroff the PCIe link in deep sleep state paragraph 0015, lines 14-17).
Regarding claim 18, Cooper further discloses the system, wherein the one or more processors are to cause the signal conductor to remain in the inactive power state until the predicted amount of inactive time elapses or the one or more processors transition the signal conductor to the active power state to convey one or more signals (remaining in inactive Li state for period of time until transactions are pending – FIG. 3, FIG. 3, 315-No, 335-Yes, 350, 355-No).
Allowable Subject Matter
Claims 5-7, 9-15 and 19-21 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), 1st paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEFAN STOYNOV whose telephone number is (571)272-4236. The examiner can normally be reached 8AM - 4:30PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STEFAN STOYNOV/ Primary Examiner, Art Unit 2175