Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Restriction/Election
Applicant's election with traverse of claims 1-18 in the reply filed on 4/23/2026 is acknowledged. The traversal is on the ground(s) that claims 19-20 now depend on claim 1 and should be examined with claims 1-18.
The requirement is still deemed proper and is therefore made FINAL.
Claim Objections
Claim 19 is objected to because of the following informalities:
“the least number of P/E” cycles in line 8 should be written as “a least number of P/E cycles”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “execute an erase operation” in line 10. The limitation as drafted renders the claim indefinite as it is unclear as to whether “an erase operation” refers to “execute an erase operation” of line 5 or to another erase operation. For the purposes of examination, the limitation is interpreted to mean “execute a second erase operation”.
Claim 3 recites the limitation “the executing of the erase operation” in line 2. The limitation as drafted renders the claim indefinite as it is unclear as to whether “the executing of the erase operation” refers to “execute an erase operation” of claim 1, line 5, or “execute an erase operation” of claim 1, line 10. For the purposes of examination, the limitation is interpreted to mean “the executing of the write operations” (emphasis added).
Claim 5 recites the limitation “execute a write operation” in line 4. The limitation as drafted renders the claim indefinite as it is unclear as to whether “a write operation” refers to “execute a write operation” of claim 1, line 7 or to another write operation. For the purposes of examination, the limitation is interpreted to mean “execute a second write operation”.
Claim 7 recites the limitation “a number of write operations executed on the block” in line 2. The limitation as drafted renders the claim indefinite as it is unclear as to whether “the block” refers to “a first block” of claim 1, line 4, “the second block” of claim 1, lines 7-8, or “a second spare block” of claim 5, line 4. For the purposes of examination, the limitation is interpreted to refer to “a first block” of claim 1, line 4.
Claim 12 recites the limitation “execute an update operation” in line 9. The limitation as drafted renders the claim indefinite as it is unclear as to whether “an update operation” refers to “execute an update operation” of line 7 or to another update operation. For the purposes of examination, the limitation is interpreted to mean “execute a second update operation”.
Claim 13 recites the limitation “the update operation comprises” in line 1. The limitation as drafted renders the claim indefinite as it is unclear as to whether “the update operation” refers to “an update operation” of claim 12, line 7, or “an update operation” of claim 12, line 9. For the purposes of examination, the limitation is interpreted to mean “the update operations comprise” (emphasis added).
Claim 14 recites the limitations “execute an update operation” in line 3 and “execute an update operation” in line 5. The limitations as drafted render the claim as indefinite as it is unclear as to whether the update operations refer to “an update operation” in claim 12, line 7, “an update operation” in claim 12, line 9, or to different update operations. For the purposes of examination, the limitations are interpreted to mean “execute a third update operation” and “execute a fourth update operation”, respectively.
Claim 16 recites the limitations “execute an update operation” in line 3 and “execute an update operation” in line 5. The limitations as drafted render the claim as indefinite as it is unclear as to whether the update operations refer to “an update operation” in claim 12, line 7, “an update operation” in claim 12, line 9, or to different update operations. For the purposes of examination, the limitations are interpreted to mean “execute a third update operation” and “execute a fourth update operation”, respectively.
Claim 17 recites the limitations “execute an update operation” in line 3 and “execute an update operation” in line 5. The limitations as drafted render the claim as indefinite as it is unclear as to whether the update operations refer to “an update operation” in claim 12, line 7, “an update operation” in claim 12, line 9, “an update operation” in claim 16, line 3, “an update operation” in claim 16, line 5, or to different update operations. For the purposes of examination, the limitations are interpreted to mean “execute a fifth update operation” and “execute a sixth update operation”, respectively.
Claim 18 recites the limitation “the update operation comprises” in lines 1-2. The limitation as drafted renders the claim indefinite as it is unclear as to which of the update operations that appears in claim 12, lines 7 and 9; claim 16, lines 3 and 5; and claim 17, lines 3 and 5 is the update operation that the limitation refers to. For the purposes of examination, the limitation is interpreted to mean “the update operations comprise” (emphasis added).
Claims 2, 4, 6, 8-11, and 19-20 and claim 15 are dependent upon claim 1 and claim 12, respectively, and thus inherit their respective deficiencies. Therefore, claims 2, 4, 6, 8-11, 15, and 19-20 are rejected for the same reasons as the respective parent claim stated above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3 are rejected under 35 U.S.C 103 as being unpatentable over Zhang et al. (US 20170300410 A1), hereinafter Zhang, in view of Um (US 20190318786 A1).
Regarding claim 1, Zhang teaches a data storage device, comprising: a memory device (Paragraph 49; Fig. 6, NAND flash memory 603); and
a controller coupled to the memory device (Paragraphs 48-49; Fig. 6, Lower Device Driver 620 manages requests for NAND flash memory 603), wherein the controller is configured to:
engage in a write workload on a first block of a plurality of blocks (Paragraph 40; Fig. 4, handling a write request W1 on a [first] data block among 4 data blocks);
execute an erase operation on a segment of a second block of a plurality of blocks (Paragraphs 40-41; Fig. 4, performing an erase on the pages of a [second] victim block of a plurality of victim blocks);
execute a write operation on a segment of the first block (Paragraph 40; Fig. 4, performing a write request W1 on a page of a [first] data block),
wherein the second block is the next block to engage in a write workload (Paragraph 40; Fig. 4, Partial GC Step 3, erased [second] victim block is used in the next GC process [including a page write operation]).
Zhang does not explicitly teach determine whether a first parameter has elapsed a threshold; and execute an erase operation on a segment of a first spare block of a plurality of spare blocks if the first parameter has elapsed the threshold.
However, Um teaches determine whether a first parameter has elapsed a threshold (Paragraph 48; Fig. 1, determining if the memory device 100 has reached an idle state (time without operations elapsing a threshold)); and
execute an erase operation on a segment of a first spare block of a plurality of spare blocks if the first parameter has elapsed the threshold (Paragraphs 36, 50-51; Fig. 1, in response to the memory device 100 reaching an idle state, performing an erase operation on the pages [segments] of a free [spare] block among a plurality of free blocks).
Zhang and Um are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang to further include the erase operation after elapsing a first threshold according to the teachings of Um. The motivation for doing so would have been to prevent write operations from being delayed by an erase operation (Um, Paragraph 125).
Regarding claim 3, Zhang in view of Um teaches the data storage device of claim 1, wherein the controller is further configured to interleave the executing of the erase operation with the executing of the write operation (Zhang, Paragraphs 22, 40; Fig. 4, interleaving the write requests and the erase steps).
Claim 2 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um as applied to claim 1, and further in view of Hyun et al. (US 20160210050 A1), hereinafter Hyun.
Regarding claim 2, Zhang in view of Um teaches the data storage device of claim 1, but does not explicitly teach wherein the plurality of blocks are located on a same die.
However, Hyun teaches wherein the plurality of blocks are located on a same die (Paragraph 30, erased blocks are on the same die as blocks under another operation).
Zhang, Um, and Hyun are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um to further include the performance of divided operations on blocks within the same die according to the teachings of Hyun. The motivation for doing so would have been to permit operational latency to be predictable and controllable (Hyun, Paragraph 30).
Claim 4 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um as applied to claim 1, and further in view of Lin (US 11194502 B1).
Regarding claim 4, Zhang in view of Um teaches the data storage device of claim 1 and the threshold (Um, Paragraph 48; Fig. 1, determining if the memory device 100 has reached an idle state (time without operations elapsing a threshold).
Zhang in view of Um does not explicitly teach wherein the threshold is between 100 milliseconds and 1 second.
However, Lin teaches wherein the threshold is between 100 milliseconds and 1 second (Col. 6, lines 43-52, idle state occurs after 100 milliseconds after the last command).
Zhang, Um, and Lin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um to further include the idle time threshold according to the teachings of Lin. The motivation for doing so would have been to improve time utilization by taking advantage of idle time to perform background operations (Lin, Col. 6, lines 54-62).
Claims 5-6 and 10-11 rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um as applied to claim 1, and further in view of Sinclair (US 20070033324 A1).
Regarding claim 5, Zhang in view of Um teaches the data storage device of claim 1, but does not explicitly teach wherein the controller is further configured to: determine whether a second parameter has elapsed a second threshold; and execute a write operation on a segment of a second spare block of the plurality of spare blocks if the second parameter has elapsed the second threshold.
However, Sinclair teaches wherein the controller is further configured to: determine whether a second parameter has elapsed a second threshold (Paragraph 73, determining whether a threshold time is met); and
execute a write operation on a segment of a second spare block of the plurality of spare blocks if the second parameter has elapsed the second threshold (Paragraph 73; Figs. 11A-B, after a threshold time is met, copying [including writing] data Y from page 0 of block 2 to page 3 of block 1 (blocks being selected from a list of [spare] blocks ready for consolidation)).
Zhang, Um, and Sinclair are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um to further include the second threshold time according to the teachings of Sinclair. The motivation for doing so would have been to prevent wasted space by waiting to program related data to the same block and consolidating partially written blocks if there is no new related data (Sinclair, Paragraph 72).
Regarding claim 6, Zhang in view of Um, further in view of Sinclair teaches the data storage device of claim 5, wherein the first parameter is a first time after the executing of the erase operation on the segment of the second block (Um, Paragraphs 36, 51, 94, 98; Fig. 4B, resuming an erase operation at a time t3 [first time] during an idle time after the start of an erase operation t0 on the pages of a free [second] block), and
the second parameter is a second time after the executing of the erase operation on the segment of the second block (Sinclair, Paragraph 73; Fig. 11A, determining whether blocks 1 and 2 have pages that been kept in an erased state (erased by an erase operation) for a threshold time [second time]).
Regarding claim 10, Zhang in view of Um teaches the data storage device of claim 5, the plurality of blocks (Zhang, Paragraph 40; Fig. 4, writing to data blocks), and
the plurality of spare blocks (Zhang, Paragraphs 40-41; Fig. 1, erasing victim blocks).
Zhang in view of Um does not explicitly teach wherein the controller is further configured to calculate a cycling rate of the plurality of blocks and the plurality of spare blocks, wherein the cycling rate is a frequency of write operations and subsequent erase operations of the respective blocks.
However, Sinclair teaches wherein the controller is further configured to calculate a cycling rate of the plurality of blocks and the plurality of spare blocks (Paragraph 85; Fig. 19, calculating an interleave ratio [cycle rate] for written and reclaimed blocks),
wherein the cycling rate is a frequency of write operations and subsequent erase operations of the respective blocks (Paragraph 85; Fig. 19, the interleave ratio is a ratio of a number of reclaim operations (including an erase operation) to a number of host write operations).
Zhang, Um, and Sinclair are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um to further include the cycling rate according to the teachings of Sinclair. The motivation for doing so would have been to maintain a constant write speed of host data and ensure that the memory does not run out of erase blocks prematurely (Sinclair, Paragraph 85).
Regarding claim 11, Zhang in view of Um, further in view of Sinclair teaches the data storage device of claim 10, wherein the cycling rate of the plurality of blocks and the plurality of spare blocks are equal (Zhang, Paragraph 40; Fig. 4, Partial GC Steps 1-3, in each garbage collection process, one victim block is erased and one [spare] data block is written (equal amount of blocks cycled)).
Claim 7 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um, further in view of Sinclair as applied to claim 5, and further in view of Bennett (US 20190303008 A1).
Regarding claim 7, Zhang in view of Um, further in view of Sinclair teaches the data storage device of claim 5, the first parameter (Um, Paragraphs 48, 51; Fig. 1, determining if the memory device 100 has reached an idle state to perform an erase operation), and
the second parameter (Sinclair, Paragraph 73; Figs. 11A-B, determining whether a threshold time is met to perform a consolidation operation (including an erase operation)).
Zhang in view of Um, further in view of Sinclair does not explicitly teach wherein the first and second parameters are a number of write operations executed on the block.
However, Bennett teaches wherein the first and second parameters are a number of write operations executed on the block (Paragraph 216, performing erase operations after a predetermined number of write operations on blocks).
Zhang, Um, Sinclair, and Bennett are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um, further in view of Sinclair to further include the parameters being a number of write operations according to the teachings of Bennett. The motivation for doing so would have been to improve design by maintaining the number of free blocks within a design limit (Bennett, Paragraph 216).
Claim 8 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um, further in view of Sinclair as applied to claim 5, and further in view of Ionin (US 20230162808 A1).
Regarding claim 8, Zhang in view of Um, further in view of Sinclair teaches the data storage device of claim 5, but does not explicitly teach wherein the write operations are flash-fill operations.
However, Ionin teaches wherein the write operations are flash-fill operations (Paragraph 52; Fig. 6B, step 606, flash-filling a block before erasing it).
Zhang, Um, Sinclair, and Ionin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um, further in view of Sinclair to further include the flash-fill operations according to the teachings of Ionin. The motivation for doing so would have been to prevent a program failure (Ionin, Paragraph 3).
Claim 9 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um, further in view of Sinclair as applied to claim 5, and further in view of Hyun.
Regarding claim 9, Zhang in view of Um, further in view of Sinclair teaches the data storage device of claim 5, but does not explicitly teach wherein the spare blocks are located on a same die as the first and second blocks.
However, Hyun teaches wherein the spare blocks are located on a same die as the first and second blocks (Paragraph 30, erased [spare] blocks are on the same die as [first and second] blocks under another operation).
Zhang, Um, Sinclair, and Hyun are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um, further in view of Sinclair to further include the performance of divided operations on blocks within the same die according to the teachings of Hyun. The motivation for doing so would have been to permit operational latency to be predictable and controllable (Hyun, Paragraph 30).
Claim 12 is rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Hyun.
Regarding claim 12, Zhang teaches a data storage device, comprising: a memory device (Paragraph 49; Fig. 6, NAND flash memory 603); and
a controller coupled to the memory device (Paragraphs 48-49; Fig. 6, Lower Device Driver 620 manages requests for NAND flash memory 603), wherein the controller is configured to:
split each block of a plurality of blocks into a plurality of segments (Paragraph 24; Fig. 1A, blocks 110, 120, 130 are split into a number of pages 111-118, 121-128, 131-138, respectively),
wherein the plurality of blocks comprise at least one regular block and at least one spare block (Paragraph 24; Fig. 1A, victim [regular] block 110 and free [spare] data block 120);
execute an update operation on a segment of the plurality of segments of the at least one regular block (Paragraph 40; Fig. 4, Partial GC Step 1, copying/reading [update operation] valid pages [segments] from the victim [regular] block); and
execute an update operation on a segment of the plurality of segments of the at least one spare block (Paragraph 40; Fig. 4, Partial GC Step 1, copying/writing valid pages to pages [segment] of the free [spare] data block).
Zhang does not explicitly teach a plurality of blocks on a die.
However, Hyun teaches a plurality of blocks on a die (Paragraph 30, erased blocks are on the same die as blocks under another operation).
Zhang and Hyun are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang to further include the performance of divided operations on blocks within the same die according to the teachings of Hyun. The motivation for doing so would have been to permit operational latency to be predictable and controllable (Hyun, Paragraph 30).
Claims 13-18 are rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Hyun as applied to claim 12, and further in view of Ionin.
Regarding claim 13, Zhang in view of Hyun teaches the data storage device of claim 12, and wherein the update operation comprises a write operation or erase operation (Zhang, Paragraph 24, a copy operation includes a page read and page write).
Zhang in view of Hyun does not explicitly teach wherein the write operation is a flash-fill operation.
However, Ionin teaches wherein the write operations are flash-fill operations (Paragraph 52; Fig. 6B, step 606, flash-filling a block before erasing it).
Zhang, Hyun, and Ionin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Hyun to further include the flash-fill operations according to the teachings of Ionin. The motivation for doing so would have been to prevent a program failure (Ionin, Paragraph 3).
Regarding claim 14, Zhang in view of Hyun, further in view of Ionin teaches the data storage device of claim 13, wherein the controller is further configured to: execute an update operation on a next segment of the plurality of segments of a second regular block of the plurality of blocks (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, in the next garbage collection process, copying/reading [update operation] valid pages [segments] from a next victim [second regular] block); and
execute an update operation on a next segment of the plurality of segments of a second spare block of the plurality of blocks (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, in the next garbage collection process, copying/writing valid pages to pages [segment] of a last reclaimed free [second spare] data block),
wherein rates of executing update operations on segments of regular blocks and segments of spare blocks are equal (Zhang, Paragraph 40; Fig. 4, Partial GC Steps 1-2, copying/reading [updating] an equal amount of pages from victim [regular] blocks and writing [updating] to free [spare] data blocks (copying operations, which include read and write operations, affect both regular and spare blocks equally, therefore their update rates are the same)).
Regarding claim 15, Zhang in view of Hyun, further in view of Ionin teaches the data storage device of claim 13, wherein splitting each block into the plurality of segments further comprises splitting the plurality of segments into a plurality of micro-segments (Ionin, Paragraphs 3, 30, pages of blocks comprise word lines [micro-segments], which are targets of the flash-fill operation).
Regarding claim 16, Zhang in view of Hyun teaches the data storage device of claim 15, wherein the controller is further configured to: execute an update operation on a segment of the plurality of segments of the at least one regular block (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, copying/reading [update operation] valid pages [segments] from the victim [regular] block); and
execute an update operation on a segment of the plurality of segments of the at least one spare block (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, copying/writing valid pages to pages [segment] of the free [spare] data block).
Zhang in view of Hyun does not explicitly teach to execute an update operation on a micro-segment of the plurality of micro-segments.
However, Ionin teaches to execute an update operation on a micro-segment of the plurality of micro-segments (Paragraphs 3, 52; Fig. 6B, step 606, performing a flash-fill operation on the word lines of the block).
Zhang, Hyun, and Ionin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Hyun to further include the update operation on a micro-segment according to the teachings of Ionin. The motivation for doing so would have been to prevent a program failure (Ionin, Paragraph 3).
Regarding claim 17, Zhang in view of Hyun teaches the data storage device of claim 16, wherein the controller is further configured to: execute an update operation on a next segment of the plurality of segments of a second regular block of the plurality of blocks (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, in the next garbage collection process, copying/reading [update operation] valid pages [segments] from a next victim [second regular] block); and
execute an update operation on a next segment of the plurality of segments of a second spare block of the plurality of blocks (Zhang, Paragraph 40; Fig. 4, Partial GC Step 1, in the next garbage collection process, copying/writing valid pages to pages [segment] of a last reclaimed free [second spare] data block),
wherein rates of executing update operations on segments of regular blocks and segments of spare blocks are equal (Zhang, Paragraph 40; Fig. 4, Partial GC Steps 1-2, copying/reading [updating] an equal amount of pages from victim [regular] blocks and writing [updating] to free [spare] data blocks (copying operations, which include read and write operations, affect both regular and spare blocks equally, therefore their update rates are the same)).
Zhang in view of Hyun does not explicitly teach to execute an update operation on a next micro-segment of the plurality of micro-segments.
However, Ionin teaches to execute an update operation on a next micro-segment of the plurality of micro-segments (Paragraphs 3, 52; Fig. 6B, step 606, performing a flash-fill operation on the word lines of the block).
Zhang, Hyun, and Ionin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Hyun to further include the update operation on micro-segments according to the teachings of Ionin. The motivation for doing so would have been to prevent a program failure (Ionin, Paragraph 3).
Regarding claim 18, Zhang in view of Hyun, further in view of Ionin teaches the data storage device of claim 17, wherein the update operation comprises a flash-fill operation or erase operation (Ionin, Paragraphs 3, 52; Fig. 6B, step 606, flash-filling word lines of a block before erasing it).
Claims 19-20 are rejected under 35 U.S.C 103 as being unpatentable over Zhang in view of Um as applied to claim 1, and further in view of Ionin.
Regarding claim 19, Zhang in view of Um teaches the data storage of claim 1, but does not explicitly teach wherein the controller is configured to: record a number of program/erase (P/E) cycles for each block of the plurality of blocks; determine a block with the least number of P/E cycles; and write to the block with the least number of P/E cycles.
However, Ionin teaches wherein the controller is configured to:
record a number of program/erase (P/E) cycles for each block of the plurality of blocks (Paragraphs 3, 46; Fig. 4, step 402, maintaining program erase count PEC values for each of the hybrid blocks);
determine a block with the least number of P/E cycles (Paragraph 46; Fig. 4, step 402, ordering hybrid blocks from lowest to highest PEC values); and
write to the block with the least number of P/E cycles (Paragraph 46; Fig. 4, steps 402, 404, 408, writing to a block next on the ordered list (the block next on the list having the lowest PEC value)).
Zhang, Um, and Ionin are analogous art because they are in the same field of endeavor, that being storage system management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the data storage device of Zhang in view of Um to further include the writing to the block with the least number of P/E cycles according to the teachings of Ionin. The motivation for doing so would have been to distribute and minimize the degradation of performance and endurance of the blocks (Ionin, Paragraph 3).
Regarding claim 20, Zhang in view of Um, further in view of Ionin teaches the data storage device of claim 19, wherein the controller is further configured to update the number of program/erase (P/E) cycles for each block of the plurality of blocks (Paragraphs 3, 46; Fig. 4, step 402, maintaining program erase count PEC values for each of the hybrid blocks).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hsu et al. (US 20090119448 A1) teaches methods and apparatuses for averaging the use of spare and data blocks in memory.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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