Prosecution Insights
Last updated: April 19, 2026
Application No. 18/780,367

DATA-TO-SCAN COUPLING INDUCED ERROR COMPENSATION

Final Rejection §102
Filed
Jul 22, 2024
Examiner
ELNAFIA, SAIFELDIN E
Art Unit
2625
Tech Center
2600 — Communications
Assignee
Apple Inc.
OA Round
2 (Final)
57%
Grant Probability
Moderate
3-4
OA Rounds
3y 8m
To Grant
85%
With Interview

Examiner Intelligence

Grants 57% of resolved cases
57%
Career Allow Rate
247 granted / 430 resolved
-4.6% vs TC avg
Strong +28% interview lift
Without
With
+27.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
22 currently pending
Career history
452
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
62.3%
+22.3% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
8.4%
-31.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 430 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim status Claims 1-4, 6-11 and 13-22 are pending; claims 1, 8 and 15 are independent. Claims 5 and 12 have been cancelled. Response to Arguments Applicant's arguments filed 08/06/2025 have been fully considered but they are not persuasive. In response to applicant’s argument that Nho does not disclose or teach “calculating, using a line subtractor, a data voltage transition between each line of pixel of a plurality of lines of pixels to determine a spatial interpolated voltage transition calculation”, as recited in claims 1, 8 and 15. However, the examiner respectfully disagrees, Nho clearly taught fig. 121 and Para 0476, wherein the scaling factor may be determined in a calibration of the display panel to determine an output of each channel in response to an aggressor image/injected signal to determine channel properties to determine a common-mode error between channels. In Paras 0483-0484, the scaling factor may be determined in a calibration of the display panel to determine an output of each channel in response to an aggressor image/injected signal to determine channel properties to determine a common-mode error between channels. In Para 0307, Conversion of the correction map may be undertaken via interpolation (e.g., Gaussian, linear, cubic, or the like), extrapolation (e.g., linear, polynomial, or the like), or other conversion techniques being applied to the data of the correction map. This may allow for accounting of, for example, boundary conditions of the correction map and may yield compensation driving data that may be applied to raw display content (e.g., image data) so as to generate compensated image data 352 that is transmitted to the pixels 366. For the same reasons rejection to claims 2-4, 6-7, 9-11, 13-14 and 16-22 still stands. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 6-11 and 13-22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nho (US 2018/0075798). Regarding claims 1, 8 and 15, Nho teaches an electronic apparatus (fig. 108, a display 18), a computer-implemented method of operating an electronic apparatus (figs 120, 122 and 124) and one or more non-transitory computer readable media comprising computer-executable instructions (fig. 108 and Paras 0450-0451) that, when executed by one or more processors of an electronic apparatus, cause the electronic apparatus to perform operations comprising: a memory comprising computer-executable instructions (fig. 108, a memory 1962 and Par 0451); and a display driver integrated circuit configured to access the memory and execute the computer-executable instructions to perform operations (fig. 108, a source driver 1934 and Para 0450) comprising: receiving an input signal frame comprising lines of pixels (fig. 108, a source driver 1934 and Para 0445, wherein the source driver 1934 may receive image data that indicates desired luminance of one or more display pixels 1940 for displaying the image frame); calculating, using a line subtractor, a data voltage transition between each line of pixel of a plurality of lines of pixels to determine a spatial interpolated voltage transition calculation (figs 120-121 and Para 0474-0476, wherein in a sensing channel of a display, a current is sensed through the sensing channel from a target current is driven from a current source (block 2122). The current sensed on the observation channel is scaled based on a scaling factor determined during calibration (block 2126). the calibration may be repeated prior to each sensing operation to ensure accuracy of the calculations using the scaling factor. The scaled current is then subtracted from the current found in the sensed channel to determine a compensated output (block 2128); averaging a voltage across each column within each line of pixel of the plurality of lines of pixels to determine in a group average voltage (Para 0486, wherein calibration measurements may be conducted multiple times to average the results to improve a signal-to-noise ratio of the outputs); calculating an aggressor value for a scan phase using, as inputs, the spatial interpolated voltage transition calculation and the group average voltage (fig. 121 and Para 0476, wherein the scaling factor may be determined in a calibration of the display panel to determine an output of each channel in response to an aggressor image/injected signal to determine channel properties to determine a common-mode error between channels. In Paras 0483-0484, the scaling factor may be determined in a calibration of the display panel to determine an output of each channel in response to an aggressor image/injected signal to determine channel properties to determine a common-mode error between channels. In Para 0307, Conversion of the correction map may be undertaken via interpolation (e.g., Gaussian, linear, cubic, or the like), extrapolation (e.g., linear, polynomial, or the like), or other conversion techniques being applied to the data of the correction map. This may allow for accounting of, for example, boundary conditions of the correction map and may yield compensation driving data that may be applied to raw display content (e.g., image data) so as to generate compensated image data 352 that is transmitted to the pixels 366); compensating per the scan phase by correcting using the aggressor value and an input sub-pixel value by aligning with a corresponding first-in first-out (FIFO) buffer to determine compensation correction voltage values (fig. 122, wherein the scaled current sense is subtracted from the sensed channel to determine a compensated output (block 2176). The compensated output is used to drive compensation operations of the display (block 2178, see also figs 124-125 and Paras 0483); summing the compensation correction voltage values with the input signal frame to determine a compensated output image frame (fig. 123 and Para 0481, wherein a sensed observation current 2202 is scaled at scaling circuitry 2204 and subtracted from a sensed current 2206 at summing circuitry 2208 to generate a compensated output 2210 indicative of current through the sensing channel 2186 substantially attributable to the current provided by the current source 2182); and a display panel (fig. 108, a display panel 1932) configured to display the compensated output image frame (fig. 122 and Para 0478, wherein the compensated output is used to drive compensation operations of the display (block 2178). Regarding claims 2, 9 and 16, Nho teaches the electronic apparatus of claim 1, the computer-implemented method of claim 8 and the one or more non-transitory computer readable media of claim 15, wherein the display panel is a light-emitting diode (LED) or liquid crystal display (LCD) display (fig. 1 and Para 0205, wherein the electronic display 18 is a liquid crystal display (LCD)). Regarding claims 3, 10 and 17, Nho teaches the electronic apparatus of claim 1, the computer-implemented method of claim 8 and the one or more non-transitory computer readable media of claim 15, wherein the display panel is an organic light-emitting diode (OLED) display (fig. 1 and Para 0205, wherein the electronic display 18 is an organic light emitting diodes (OLED)). Regarding claims 4, 11, Nho teaches the electronic apparatus of claim 1 and the computer-implemented method of claim 8, wherein the display panel is a computer (fig. 2, a notebook computer 10A and Para 0207). Regarding claim 18, Nho teaches the one or more non-transitory computer readable media of claim 15, wherein the display panel is a computer or tablet computer. Regarding claims 6, 13 and 19, Nho teaches the electronic apparatus of claim 1, the computer-implemented method of claim 8 and the one or more non-transitory computer readable media of claim 15, wherein the display panel is a mobile phone (fig. 3, a portable phone 10B and Para 0208). Regarding claims 7, 14 and 20, Nho teaches the electronic apparatus of claim 1, the computer-implemented method of claim 8 and the one or more non-transitory computer readable media of claim 15, wherein the display panel is a digital watch or augmented reality headset (fig. 3, Apple Watch 10E, Paras 0202 and 0212). Regarding claim 21, Nho teaches the computer-implemented method of claim 8, wherein calculating the aggressor value includes calculating the aggressor value for each line of pixel of the lines of pixels (fig. 124 and Para 0483, wherein The current may be set using an aggressor image and/or injected signal setting a value for the pixel corresponding to the channel. A first output is sensed for the channel based on the current through the channel with the inherent differential input mismatch (block 2224). Regarding claim 22, Nho teaches the computer-implemented method of claim 8, wherein calculating the aggressor value includes calculating the aggressor value prior to outputting the input signal frame for display (Para 0474, wherein the calibration may be repeated prior to each sensing operation to ensure accuracy of the calculations using the scaling factor. The scaled current is then subtracted from the current found in the sensed channel to determine a compensated output (block 2128). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yum (US 2019/0340980), relates to a display driver, a display system, and an operation method of the display driver, and more particularly, to a display driver for adjusting pixel values of an input image, a display system, and an operation method of the display driver. Park (US 2023/0386390), relate to a display device and a display driving method, which are capable of reducing a characteristic value compensation error appearing at a time when a driving frequency changes and improving image quality. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAIFELDIN E ELNAFIA whose telephone number is (571)270-5852. The examiner can normally be reached 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM BODDIE can be reached at (571) 272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.E.E/Examiner, Art Unit 2625 11/13/2025 /WILLIAM BODDIE/Supervisory Patent Examiner, Art Unit 2625
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Prosecution Timeline

Jul 22, 2024
Application Filed
May 01, 2025
Non-Final Rejection — §102
Jul 31, 2025
Applicant Interview (Telephonic)
Jul 31, 2025
Examiner Interview Summary
Aug 06, 2025
Response Filed
Nov 13, 2025
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
57%
Grant Probability
85%
With Interview (+27.8%)
3y 8m
Median Time to Grant
Moderate
PTA Risk
Based on 430 resolved cases by this examiner. Grant probability derived from career allow rate.

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