Prosecution Insights
Last updated: April 19, 2026
Application No. 18/780,494

SHUNT RESISTOR, METHOD FOR MANUFACTURING SHUNT RESISTOR, AND CURRENT DETECTION DEVICE

Non-Final OA §103
Filed
Jul 23, 2024
Examiner
NGUYEN, TUNG X
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Accuenergy (Canada) Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
91%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
627 granted / 715 resolved
+19.7% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
47 currently pending
Career history
762
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 715 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-9 are rejected under 35 U.S.C. § 103 as being unpatentable over Smith et al. (US 2023/0343495 A1, hereinafter "Smith") in view of Rippel (US 5,041,780, hereinafter "Rippel") and further in view of Choi (US 11,313,885 B2, hereinafter "Choi"). Regarding claim 1, Smith discloses a shunt resistor for current measurement (FIG. 1, element 10 as resistor; FIG. 5, element 100 as resistor), comprising: a resistance element (FIG. 1, element 13 as resistive strip); a pair of electrodes connected to opposite ends of the resistance element in a first direction (FIG. 1, elements 12 and 14 as first conductive strip and second conductive strip connected to opposite ends of element 13); wherein each electrode incorporates an L-shaped opening, the L-shaped opening comprising a first linear portion parallel to the first direction and a second linear portion parallel to the second direction (FIG. 5, elements 124 and 126 as slot in the first conductive strip and slot in the second conductive strip with a first linear portion/leg 123 as first leg parallel to the first/length direction and a second linear portion/leg 125 as second leg parallel to the second/width direction). Smith does not explicitly disclose wherein the shunt resistor further includes recessed portions formed on opposite side surfaces extending in a second direction perpendicular to the first direction. However, Rippel, in an analogous field of current sensing devices, teaches wherein the shunt resistor further includes recessed portions formed on opposite side surfaces extending in a second direction perpendicular to the first direction (FIG. 5a, elements 60 and 62 as opposing notches on side surfaces perpendicular to the current flow/first direction). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the shunt resistor of Smith to include the recessed portions taught by Rippel in order to concentrate current flow and minimize thermal stress, thereby improving measurement stability and precision in varying temperature conditions, as both references are directed to accurate shunt-based current sensing (Smith para. [0003]; Rippel FIG. 5a). Smith as modified by Rippel does not explicitly disclose each electrode having a contact surface interfacing with the resistance element and equipped with bolt holes for attachment. However, Choi, in an analogous field of shunt resistors, teaches each electrode having a contact surface interfacing with the resistance element and equipped with bolt holes for attachment (FIG. 5, screw holes H1 and H2 in terminals/electrodes 23 and 25 for bolted attachments). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the shunt resistor of Smith/Rippel to include the bolt holes taught by Choi in order to provide robust mechanical and electrical connections, as is common in industrial shunt applications for reliable current handling (Choi FIG. 5). Regarding claim 2, Smith as modified by Rippel and Choi discloses the shunt resistor according to claim 1, wherein the length of the first linear portion equal to the length of the second linear portion (Smith FIG. 5, elements 124 and 126 as slot in the first conductive strip and slot in the second conductive strip where linear portions/legs 123 and 125 as first leg and second leg are of equal length). Regarding claim 3, Smith as modified by Rippel and Choi discloses the shunt resistor according to claim 1, further comprising voltage detection portions integrated into the electrodes, the voltage detection portions being hollow cylindrical projections extending vertically from the surface of the electrodes and coaxially aligned with through holes in the electrodes (Smith FIG. 1, elements 20 and 22 as first sense terminal and second sense terminal; Choi FIG. 6, threaded holes/joint members 41 and 42 as joint members implying coaxial alignment for vertical extensions). Regarding claim 4, Smith as modified by Rippel and Choi discloses the shunt resistor according to claim 3, wherein the voltage detection portions are welded to the electrodes, providing secure and precise alignment that reduces thermal expansion-induced stress (Smith FIG. 1, elements 20 and 22 as first sense terminal and second sense terminal; Choi FIG. 6, joint members 41 and 42 as joint members). Regarding claim 5, Smith as modified by Rippel and Choi discloses the shunt resistor according to claim 1, further comprising threaded bolts positioned between the L-shaped openings and the end surfaces of the electrodes, the threaded bolts serving as connection points for input and output current signals (Choi FIG. 6, threaded bolts/joint members 41 and 42 as joint members positioned in electrodes/terminals 23 and 25). Regarding claim 6, Smith as modified by Rippel and Choi discloses the shunt resistor according to claim 5, wherein the threaded bolts are riveted to the electrodes (Choi FIG. 6, joint members 41 and 42 as joint members). Regarding claim 7, Smith discloses a method for manufacturing a shunt resistor comprising a resistance element and a pair of electrodes connected to opposite ends of the resistance element, the method comprising (FIG. 1, element 10 as resistor): preparing a long shunt resistor base material with the pair of electrodes connected to the ends of the resistance element in a first direction (FIG. 1, elements 12/14 as first conductive strip/second conductive strip connected to resistance element 13); incorporating L-shaped openings into each electrode, the L-shaped openings comprising first and second linear portions with equal lengths parallel to the first and second directions, respectively (FIG. 5, elements 124 and 126 as slot in the first conductive strip and slot in the second conductive strip with equal linear portions/legs 123 and 125 as first leg and second leg); integrating voltage detection portions into the electrodes, the voltage detection portions being hollow cylindrical projections coaxially aligned with through holes in the electrodes (FIG. 1, elements 20/22 as first sense terminal/second sense terminal; Choi below); positioning threaded bolts between the L-shaped openings and the end surfaces of the electrodes, serving as connection points for input and output current signals (Choi below). Smith does not explicitly disclose forming recessed portions on opposite side surfaces of the shunt resistor extending in a second direction perpendicular to the first direction. However, Rippel teaches forming recessed portions on opposite side surfaces of the shunt resistor extending in a second direction perpendicular to the first direction (FIG. 5a, notches 60/62 as opposing notches). It would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the recess-forming step of Rippel into Smith's method to enhance current concentration and thermal management (Rippel FIG. 5a). Smith/Rippel does not explicitly disclose the hollow cylindrical projections or threaded bolts. However, Choi teaches integrating such voltage detection portions and positioning threaded bolts (FIG. 6, joint members 41/42 as joint members). It would have been obvious to incorporate Choi's features into the method for secure connections and precise alignment (Choi FIG. 6). Regarding claim 8, Smith as modified by Rippel and Choi discloses the method according to claim 7, wherein the voltage detection portions are welded to the electrodes to ensure secure and precise alignment (Smith FIG. 1, elements 20/22 as first sense terminal/second sense terminal; Choi FIG. 6, joint members 41/42 as joint members). Regarding claim 9, Smith as modified by Rippel and Choi discloses the method according to claim 7, wherein the threaded bolts are riveted to the electrodes (Choi FIG. 6, joint members 41/42 as joint members). Allowable Subject Matter Claims 10-17 allowed. The following is a statement of reasons for the indication of allowable subject matter: As to claims 10-17, the prior art alone and/or in combination does not disclose an opening on the bottom of the current detection device to allow a bus bar carrying the output current signal to exit the device; a cable connected to voltage detection portions of the shunt resistor, with one end of the cable connected to a power meter to transfer the measured voltage to the power meter. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUNG X NGUYEN whose telephone number is (571)272-1967. The examiner can normally be reached 10:30am-6:30pm M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at 571-272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUNG X NGUYEN/Primary Examiner, Art Unit 2858 3/6/2026
Read full office action

Prosecution Timeline

Jul 23, 2024
Application Filed
Mar 06, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
91%
With Interview (+3.2%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 715 resolved cases by this examiner. Grant probability derived from career allow rate.

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