DETAILED ACTION
The current Office Action is in response to the papers submitted 12/02/2025. Claims 1 – 3, 5 – 18, and 20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 16 – 18, and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 16 recites the limitation "the first set of block data" in lines 17 - 18. There is no previous mention of a first set of block data in the claim. There is insufficient antecedent basis for this limitation in the claim. For examination the first set of block data will be interpreted as referring to the first set of block status data disclosed earlier in the claim.
All remaining claims are rejected for being dependent on a rejected base claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 3, and 5 - 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage.
Regarding claim 1, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10] by:
storing a first set of block status data that indicates a status of each block of the plurality of blocks [G/B BITMAP, Fig 9] in the first memory device [6100, Fig 10], wherein the first set of block status data indicates whether the plurality of blocks are bad blocks [G/B BITMAP, Fig 9];
in response to a controller [6120, Fig 10] tagging one of the plurality of blocks as a bad block, analyzing the first block status data to determine if a block is bad or not [Fig 8; G/B BITMAP, Fig 9; Paragraphs 0105 – 0124; The bad block metadata is used to manage data in the memory].
However, Oh may not specifically disclose the limitations of storing, in a memory location external to the first memory device, a second set of block status data that indicates a status of each block of the plurality of blocks in a memory location, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, in response to a controller tagging one of the plurality of blocks as a bad block, determine whether the first set of block status data has been corrupted by comparing the first set of block status data to the second set of block status data, and in response to determining that the first set of status data has been corrupted, overwriting the first set of block status data with the second set of block status data.
Nipunage teaches storing, in a memory location external to the first memory device, a second set of block status data that indicates a status of each block of the plurality of blocks in a memory location, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, in response to a controller tagging one of the plurality of blocks as a bad block, determine whether the first set of block status data has been corrupted by comparing the first set of block status data to the second set of block status data, and in response to determining that the first set of status data has been corrupted, overwriting the first set of block status data with the second set of block status data [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. The metadata being compared shows the metadata was created before the comparison and the comparison is in response to the creation of the metadata. Either copy of the metadata can be considered corrupted or invalid as a result of the comparison and then the valid metadata is used to replace the invalid metadata].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Nipunage in Oh, because it provides for redundancy by creating a backup of data and also verifying the backup.
Regarding claim 3, Nipunage teaches the memory location is within a controller and the controller is configured to store the second set of block status data in a register of the controller [222A or 222M, Fig 2; Column 8, Lines 47 – 61; The controller receives the second set of block status metadata and stores the data in a memory register allowing the controller to then write the second set of block status metadata to the external memory location].
Regarding claim 5, Oh teaches tagging the one of the plurality of blocks as the bad block comprises changing its status from a good block to a bad block [Paragraphs 0012, 0063, 0101, 0105, Fig 9; Blocks are determined to be good or bad. When a block is determined to be bad the bitmap is changed for the block to indicate it is no longer good and is bad by switching from 0 to 1].
Regarding claim 6, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad].
Nipunage discloses in response to the first set of block status data matching the second set of block status data, preventing the first set of block status data from being overwritten [418, Fig 4; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. The Yes outcome in step 418 prevents data from being overwritten for the time being not overwriting any data].
Regarding claim 7, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses in response to the first set of block status data being different than the second set of block status data, writing over the first set of block status data with the second set of block status data [Column 2, Lines 51 – 64; Column 8, Lines 32 – 46; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16; Column 13, Lines 64 – 67; Column 14, Lines 1 – 20; Column 14, Lines 55 – 67; Column 15, Lines 1 – 5; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. When the two versions of metadata do not match one version is used to overwrite the other version of metadata. The UUID is another version of metadata and when metadata of different data does not match one version of UUID metadata is replaced with another version of the UUID metadata].
Claim(s) 16 - 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Ayyapureddi et al. (Pub. No.: US 2023/0229348) referred to as Ayyapureddi.
Regarding claim 16, Oh teaches a non-volatile memory device [6110, Fig 10] comprising a plurality of blocks of memory [Fig 9; Each chip is comprised of planes divided into blocks of memory]; and
a controller [6120, Fig 10] coupled to the non-volatile memory device [6110, Fig 10] and configured to:
load the first set of clock status data into the non-volatile memory device [G/B BITMAP, Fig 9; The bitmap information is created and loaded in the memory device];
read a first set of block status data from the non-volatile memory device, wherein the first set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the first set of block status data indicates a status of each block of the plurality of blocks in the non-volatile memory device [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad].
However, Oh may not specifically disclose the limitations of loading a first set of block status data into latches of memory, reading a second set of block status data from a memory, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the second set of block status data indicates the status of each block of the plurality of blocks of memory, compare the first set of block status data to the second set of block status data, and in response to determining that the first set of block status data does not match the second set of block status data, reloading the first set of block status data by overwriting the first set of block data stored in the latches of the non-volatile memory device with block status data stored in an additional memory device.
Nipunage discloses reading a second set of block status data from a memory, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the second set of block status data indicates the status of each block of the plurality of blocks of memory, compare the first set of block status data to the second set of block status data, and in response to determining that the first set of block status data does not match the second set of block status data, reloading the first set of block status data by overwriting the first set of block data stored in the non-volatile memory device with block status data stored in an additional memory device [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; Column 2, Lines 51 – 64; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16; Column 8, Lines 32 – 46; Column 13, Lines 64 – 67; Column 14, Lines 1 – 20; Column 14, Lines 55 – 67; Column 15, Lines 1 – 5; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. The UUID is another version of metadata. When the metadata does not match one of the metadata is used to overwrite the other metadata].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Nipunage in Oh, because it provides for redundancy by creating a backup of data and also verifying the backup.
However, Oh in view of Nipunage may not specifically disclose the limitation of storing block status data in latches.
Ayyapureddi discloses storing block status data in latches [Paragraph 0042; Metadata is stored in latches in memory].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Ayyapureddi in Oh in view of Nipunage, because latches are a fundamental storage mechanism in the art that one of ordinary skill in the art would understand and have a high level of predictability to store data.
Regarding claim 17, Oh teaches the controller [6120, Fig 10] is configured to prevent access to any block of memory that is determined to be a bad block based on the block status data [Paragraph 0063, 0101, and 0129; Bad blocks are not used and replaced with good normal blocks].
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage as applied to claim 1 above, and further in view of Twocentpdx (Programmable ROM) referred to Twocentpdx.
Regarding claim 2, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device that is non-volatile
[6100, Fig 10] wherein the first set of block status data indicates whether the plurality of blocks are bad blocks [G/B BITMAP, Fig 9].
Nipunage discloses storing the second set of block status data in a memory location external to the first memory device is carried out by a controller [210, fig 2] to which the first memory device [260, Fig 2] is coupled, during operation of the controller [210, Fig 2; The controller controls the operations of storing data and associated metadata to the storage devices].
However, Oh in view of Nipunage may not specifically disclose the limitation of
the memory location is within a one-time programmable (OTP) memory.
Twocentpdx discloses the memory location is within a one-time programmable (OTP) memory [One time programmable memory, Page 2].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Twocentpdx in Oh in view of Nipunage because it allows the identification of bad blocks of memory after manufacture when the memory is first used which can identify blocks that went bad during manufacture and after manufacture and then stored in memory allowing the system to access an immutable list of bad blocks from when the memory was first used.
Claim(s) 8 – 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage as applied to claims 1 above, and further in view of Lopes et al. (Pub. No.: US 2019/0181864) referred to as Lopes.
Regarding claim 8, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses comparing metadata about data to determine when an error occurred regarding the data [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices].
However, Oh in view of Nipunage may not specifically disclose the limitations of
determining that a latch upset event has occurred in response to the first set data not matching the second set of data.
Lopes discloses determining that a latch upset event has occurred in response to the first set data not matching the second set of data [Paragraph 0021, 0051 - 0052, Figs 4 - 7; The error is based on the comparison of data not resulting in a match between the data which is an indication of a single event upset which is considered the latch upset event].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Lopes in Oh in view of Nipunage, because it allows the system to be tolerant to errors from radiation [Paragraphs 0006 and 0010].
Regarding claim 9, Lopes discloses in response to determining that the latch upset event has occurred, setting a flag [Paragraph 0021, 0051 - 0052, Figs 4 – 7; The Error signal(s) are the flags indicating the single even upset (latch upset event) has occurred].
Regarding claim 10, Oh teaches tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses determining that an error event on a first set of status data has occurred [Column 2, Lines 51 – 64; Column 8, Lines 32 – 46; Column 13, Lines 64 – 67; Column 14, Lines 1 – 20; Column 14, Lines 55 – 67; Column 15, Lines 1 – 5; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. The status data that is not the majority is where the error is determined to occur].
Lopes discloses the error is a latch upset event [Paragraph 0021, 0051 - 0052, Figs 4 - 7; The error is based on the comparison of data not resulting in a match between the data which is an indication of a single event upset which is considered the latch upset event].
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage as applied to claim 1 above, and further in view of Marcu et al. (Pub. No.: US 2022/0405601) referred to as Marcus.
Regarding claim 11, Oh teaches storing and tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
However, Oh in view of Nipunage may not specifically disclose the limitation of storing data within complementary metal-oxide semiconductor (CMOS) latches of the first memory device.
Marcu discloses storing data within complementary metal-oxide semiconductor (CMOS) latches of the first memory device [200, Fig 2; 304, Fig 3; 406 and 410, Fig 4; Paragraph 0032; The latches are part of a CMOS chip making the CMOS latches store data of the memory. The CMOS latches are in a CMOS Chip that is part of a memory device such as 200 or 304].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Marcu in Oh in view of Nipunage, because CMOS latches allow for low power consumption and high integration density in memory.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Twocentpdx (Programmable ROM) referred to Twocentpdx.
Regarding claim 12, Oh teaches a non-volatile memory device [6110, Fig 10] comprising a plurality of blocks of memory [Fig 9; Each chip is comprised of planes divided into blocks of memory]; and
a controller [6120, Fig 10] coupled to the non-volatile memory device [6110, Fig 10] and configured to:
write a first set of block status data [G/B BITMAP, Fig 9] to the non-volatile memory device [6110, Fig 10];
read the first set of block status data from the non-volatile memory device, wherein the first set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the first set of block status data indicates a status of each block of the plurality of blocks in the non-volatile memory device [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad], and
in response to the controller [6120, Fig 10] tagging one of the plurality of blocks as a bad block, analyzing the first block status data to determine if a block is bad or not [Fig 8; G/B BITMAP, Fig 9; Paragraphs 0105 – 0124; The bad block metadata is used to manage data in the memory].
However, Oh may not specifically disclose the limitation of reading a second set of block status data from a one-time programmable (OTP) memory, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the second set of block status data indicates the status of each block of the plurality of blocks of memory, in response to tagging one of the blocks as a bad block, determining whether the first set of block status data has been corrupted by comparing the first set of block status data to the second set of block status data, and in response to the first set of block status data being different than the second set of block status data, write the second set of block status data over the first set of block status data in the non-volatile memory device.
Nipunage discloses reading a second set of block status data from a memory, wherein the second set of block status data indicates whether the plurality of blocks are bad blocks, and wherein the second set of block status data indicates the status of each block of the plurality of blocks of memory, compare the first set of block status data to the second set of block status data, in response to tagging one of the blocks as a bad block, determining whether the first set of block status data has been corrupted by comparing the first set of block status data to the second set of block status data, and in response to the first set of block status data being different than the second set of block status data, write the second set of block status data over the first set of block status data in the non-volatile memory device [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; Column 2, Lines 51 – 64; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16 and 32 – 46; Column 13, Lines 64 – 67; Column 14, Lines 1 – 20; Column 14, Lines 55 – 67; Column 15, Lines 1 – 5; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices. The metadata being compared shows the metadata was created before the comparison and the comparison is in response to the creation of the metadata. Either copy of the metadata can be considered corrupted or invalid as a result of the comparison and then the valid metadata is used to replace the invalid metadata].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Nipunage in Oh, because it provides for redundancy by creating a backup of data and also verifying the backup.
However, Oh in view of Nipunage may not specifically disclose the limitation of reading data from a one-time programmable (OTP) memory.
Twocentpdx reading data from a one-time programmable (OTP) memory [One time programmable memory, Page 2].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Twocentpdx in Oh in view of Nipunage because it allows the identification of bad blocks of memory after manufacture when the memory is first used which can identify blocks that went bad during manufacture and after manufacture and then stored in memory allowing the system to access an immutable list of bad blocks from when the memory was first used.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Twocentpdx (Programmable ROM) referred to Twocentpdx as applied to claim 12 above, and further in view of Marcu et al. (Pub. No.: US 2022/0405601) referred to as Marcus.
Regarding claim 13, Oh teaches storing and tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
However, Oh in view of Nipunage in view of Twocentpdx may not specifically disclose the limitation of storing data within complementary metal-oxide semiconductor (CMOS) latches of the first memory device.
Marcu discloses storing data within complementary metal-oxide semiconductor (CMOS) latches of the first memory device [200, Fig 2; 304, Fig 3; 406 and 410, Fig 4; Paragraph 0032; The latches are part of a CMOS chip making the CMOS latches store data of the memory. The CMOS latches are in a CMOS Chip that is part of a memory device such as 200 or 304].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Marcu in Oh in view of Nipunage in view of Twocentpdx, because CMOS latches allow for low power consumption and high integration density in memory.
Claim(s) 14 - 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Twocentpdx (Programmable ROM) referred to Twocentpdx as applied to claim 12 above, and further in view of Lopes et al. (Pub. No.: US 2019/0181864) referred to as Lopes.
Regarding claim 14, Oh teaches the controller [6120, Fig 10] tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses comparing metadata about data to determine when an error occurred regarding the data [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices].
However, Oh in view of Nipunage in view of Twocentpdx may not specifically disclose the limitation of setting a flag indicating occurrence of a latch upset event in response to the first set of block status data being different than the second set of block status data.
Lopes discloses setting a flag indicating occurrence of a latch upset event in response to the first set of block data being different than the second set of block data [Paragraph 0021, 0051 - 0052, Figs 4 - 7; The error is based on the comparison of data not resulting in a match between the data which is an indication of a single event upset which is considered the latch upset event. The Error signal(s) are the flags indicating the single even upset (latch upset event) has occurred].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Lopes in Oh in view of Nipunage in view of Twocentpdx, because it allows the system to be tolerant to errors from radiation [Paragraphs 0006 and 0010].
Regarding claim 15, Oh teaches the controller [6120, Fig 10] tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses comparing metadata about data to determine when an error occurred regarding the data [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices].
However, Oh in view of Nipunage in view of Twocentpdx may not specifically disclose the limitation of in response to the first set of block status data matching the second set of block status data, determining an absence of a latch upset event on the non-volatile memory device.
Lopes discloses in response to the first set of block status data matching the second set of block status data, determining an absence of a latch upset event on the non-volatile memory device [Paragraph 0021, 0051 - 0052, Figs 4 – 7; When the two sets of data match an error is not detected which indicates there is no single even upset which is considered the latch upset event].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Lopes in Oh in view of Nipunage in view of Twocentpdx, because it allows the system to be tolerant to errors from radiation [Paragraphs 0006 and 0010].
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Ayyapureddi et al. (Pub. No.: US 2023/0229348) referred to as Ayyapureddi as applied to claim 16 above, and further in view of Twocentpdx (Programmable ROM) referred to Twocentpdx.
Regarding claim 18, Nipunage discloses the additional memory device [Column 2, Lines 51 – 64; Column 7, Lines 58 – 67; Column 8, Lines 1 – 16 and 32 – 46; Column 13, Lines 64 – 67; Column 14, Lines 1 – 20; Column 14, Lines 55 – 67; Column 15, Lines 1 – 5; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices].
However, Oh in view of Nipunage in view of Ayyapureddi may not specifically disclose the limitation of storing data in and accessing the data from a one-time programmable (OTB) memory.
Twocentpdx discloses storing data in and accessing the data from a one-time programmable (OTB) memory [One time programmable memory, Page 2].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Twocentpdx in Oh in view of Nipunage in view of Ayyapureddi because it allows the identification of bad blocks of memory after manufacture when the memory is first used which can identify blocks that went bad during manufacture and after manufacture and then stored in memory allowing the system to access an immutable list of bad blocks from when the memory was first used.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (Pub. No.: US 2019/0310774) referred to as Oh in view of Nipunage et al. (Pat 11,467,736) referred to as Nipunage in view of Ayyapureddi et al. (Pub. No.: US 2023/0229348) referred to as Ayyapureddi as applied to claims 16 above, and further in view of Lopes et al. (Pub. No.: US 2019/0181864) referred to as Lopes.
Regarding claim 20, Oh teaches the controller [6120, Fig 10] tracking a block status of each of a plurality of blocks [G/B BITMAP, Fig 9; Each bit in the bitmap indicates if a block of memory is good or bad] of a first memory device [6100, Fig 10].
Nipunage discloses comparing metadata about data to determine when an error occurred regarding the data [270M, 272M, 260, 262, 270A, and 272A, Fig 2; 402, 404, 406, and 416, Fig 4; 502, 504, and 506, Fig 5; 602, 604, 606, 608, 610, and 614, Fig 6A; The bad block bitmap information in Oh is metadata. Nipunage discloses storing copies of metadata in difference storage devices and then comparing the versions of the metadata from the different storage devices].
However, Oh in view of Nipunage in view of Ayyapureddi may not specifically disclose the limitations of the controller inferring that a latch upset event has occurred in response to the first set of block data being different than the second set of block data. Lopes discloses the controller inferring that a latch upset event has occurred in response to the first set of block data being different than the second set of block data. [Paragraph 0021, 0051 - 0052, Figs 4 - 7; The error is based on the comparison of data not resulting in a match between the data which is an indication of a single event upset which is considered the latch upset event].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Lopes in Oh in view of Nipunage in view of Ayyapureddi, because it allows the system to be tolerant to errors from radiation [Paragraphs 0006 and 0010].
Response to Arguments
Applicant's arguments filed 11/17/2025 have been fully considered but they are not persuasive.
The applicant argues on page 8 that Nipunage fails to teach in response to tagging a block as bad determining if a block status has been corrupted by comparing two different versions of the block status data. After careful consideration of the applicant’s arguments the examiner respectfully disagrees.
First, Oh is used to teach the use of metadata that is used to indicate if a block is bad or not. Nipunage is used to disclose comparing two versions of metadata. A comparison of two versions of metadata requires the two versions of metadata to be created beforehand. This shows the comparison in Nipunage is in response to the metadata being created at some time before the comparison is performed.
The applicant argues on pages 9 – 10 that Nipunage fails to teach reloading the first set of block status data by overwriting the first set of block status data in the latches of the non-volatile memory device based on a single sentence in the paragraph that spans columns 7 and 8. After careful consideration of the applicant’s arguments the examiner respectfully disagrees.
The applicant has not taken the entire paragraph that spans columns 7 – 8 into account. Lines 1 – 16 in column 8 disclose how the comparison of the metadata results in one of the metadata being overwritten with the other metadata when the two metadata do not match. This reads on the argued limitation, not including the latch limitation. The latch limitation is a new limitation in the claims and is addressed in the rejections above.
The applicant argues on pages 10 – 11 that there is no motivation to combine Oh and Nipunage since the claims require a memory location that is not regularly changed to provide a reliable reference to solve a neutron upset problem. After careful consideration of the applicant’s arguments the examiner respectfully disagrees.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., there is no mention in the claim of a neutron upset problem or that any memory location is required to not regularly change to provide a reliable reference as argued) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
The applicant argues on pages 12 – 15 that the additional prior art fails to overcome the argued deficiencies above making the claims in condition for allowance. After careful consideration of the applicant’s arguments the examiner respectfully disagrees.
The examiner has responded to the arguments above showing how the prior art teaches the argued limitation or the rejections introduce new prior art to teach newly added limitation to the claims. The remaining claims are rejected based on the responses to the arguments and the new grounds of rejections due to the amendments to the claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER D BIRKHIMER whose telephone number is (571)270-1178. The examiner can normally be reached 8-5 Hoteling.
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/Christopher D Birkhimer/Primary Examiner, Art Unit 2136