Prosecution Insights
Last updated: August 17, 2026
Application No. 18/781,941

POWER MANAGEMENT FOR SIGNAL SCANNING

Non-Final OA §103
Filed
Jul 23, 2024
Priority
Sep 04, 2020 — provisional 63/074,855 +1 more
Examiner
JAIN, RAJ K
Art Unit
Tech Center
Assignee
Apple Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
728 granted / 830 resolved
+27.7% vs TC avg
Moderate +8% lift
Without
With
+7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
23 currently pending
Career history
869
Total Applications
across all art units

Statute-Specific Performance

§101
5.7%
-34.3% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
19.9%
-20.1% vs TC avg
§112
15.4%
-24.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 830 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3,6-7,10,13-14,18, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al (US 20110134330 A1) hereinafter as Yu in view of Calder et al (US 20200293466 A1) hereinafter as Calder. Regarding claim(s) 1,13,18, Yu discloses an electronic device (See Fig(s). 1), comprising: a receiving core; a main core; and processing circuitry coupled to the receiving core and the main core, the processing circuitry configured to (See ¶ 9-10, The HDCP engine coupled to the selected input port receives HDCP encryption status signaling from the main receiver core. HDCP engines coupled to the background, or non-selected, ports receive HDCP encryption status signaling from the roving receiver core.): communicate via a first channel using the main core (See ¶ 10, The HDCP engine coupled to the selected input port receives HDCP encryption status signaling from the main receiver core.). Yu fails to disclose determine whether the first channel comprises interference; and communicate via a second channel having less congestion than the first channel based on the first channel comprising the interference. Calder discloses determine whether the first channel comprises interference; and communicate via a second channel having less congestion than the first channel based on the first channel comprising the interference . (See Fig(s). 9, See ¶ 24, 87, each timeslot is dedicated to transfer data to one of the plurality of memory devices such that data transfers to different memory devices are performed without interference from each other.). Channel blocking and congestion is alleviated by switching to a reduced interfering channel so as to maintain data throughput. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to incorporate the teachings of Calder within Yu, so as to maintain data throughput within a device. Further with regards to claim 13, Yu discloses a computer readable media (See Fig(s). 1-2). Regarding claim(s) 2,14, Calder discloses wherein the processing circuitry is configured to determine a first degree of congestion for the first channel and a second degree of congestion for the second channel (See ¶ 92). Reasons for combining same as claim 1. Regarding claim(s) 3, Calder discloses wherein the processing circuitry is configured to determine the first degree of congestion for the first channel and the second degree of congestion for the second channel while communicating via the first channel using the main core (See ¶ 92, timeslots can be allocated for destination dynamically according to an agreed timeslot allocation scheme (e.g., FCFS, a prioritized scheme, or a fair share scheme or a trade based scheme). With this configuration, the potential for latencies introduced for access to the TDM bus can be reduced, while still being capable of insulating (to varying degrees, depending on the access scheme) activity to particular devices from the activity to other devices.). Reasons for combining same as claim 1. Regarding claim(s) 6, Yu discloses wherein the first channel, the second channel, or both are associated with an augmented reality (AR) application or a virtual reality (VR) application (See ¶ 5). Regarding claim(s) 7, Yu discloses wherein the processing circuitry is configured to communicate with the AR application or the VR application via the first channel (See ¶ 5, A multimedia interface system transports multimedia signals from a multimedia source to a multimedia sink. Examples of a multimedia source include a computer, a DVD player, a set-top box, a game consoles or another device producing multimedia output. Examples of a multimedia sink include a monitor, a television, an audio/visual (A/V) receiver or other device which receives and presents video and/or audio.) or the second channel using a Carrier Sense Multiple Access (CSMA) protocol, a Collision Avoidance (CA) protocol, or both. Regarding claim(s) 10, Yu discloses wherein the first channel is associated with a first frequency band and the second channel is associated with a second frequency band . Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al (US 20110134330 A1) hereinafter as Yu in view of Calder et al (US 20200293466 A1) hereinafter as Calder further in view of Hall et al (US 10405317 B2) hereinafter as Hall Regarding claim(s) 8, Hall discloses wherein the processing circuitry is configured to communicate with the AR application or the VR application via the first channel or the second channel on a wireless local area network (WLAN) (See Fig(s). 1-2, with hub, See ¶ 2). A concept called the “Internet of Things” imagines home-related electronic devices that can be reached through the Internet, by which an environment can be controlled as needed. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to incorporate the teachings of Hall within Yu, so as to enhance a home network performance. Regarding claim(s) 9, Hall discloses wherein the WLAN comprises a Wi-Fi network (See ¶ 2). Reasons for combining same as claim 8. Allowable Subject Matter Claim(s) 4-5,11-12,15-17, 19-20, are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Raj Jain whose telephone number is (571) 272-3145. The examiner can normally be reached on M-Th ~8 ~6. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Derrick Ferris can be reached on 571-272-3123. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center for authorized users only. Should you have questions about access to Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. /RAJ JAIN/ Primary Examiner, Art Unit 2411
Read full office action

Prosecution Timeline

Jul 23, 2024
Application Filed
Feb 12, 2025
Response after Non-Final Action
Jul 23, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
95%
With Interview (+7.6%)
2y 10m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 830 resolved cases by this examiner. Grant probability derived from career allowance rate.

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