DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The Examiner notes that the present application is a divisional application of Application No. 17/560,424 (U.S. Patent No. 12,126,456). A restriction requirement was made in the ‘424 application between claims directed to the power source equipment (PSE) and powered devices (PD) [Fig. 1A: PSE 10 and PDs 12]. The claims directed to the PSE were elected for further prosecution while claims directed to the PD were withdrawn. Based on the claim language of the present application reciting features of the PD and its status as a divisional application of the ’424 application, claims 1-13 of the present application are interpreted as being directed to the non-elected PD of the parent application. Claims 14-20 recite a system comprising a PSE and a PD, and are therefore interpreted as being directed to the combination.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites an apparatus comprising an input cable interface, an isolation switch, and an interface. In addition to these components, claim 1 recites a number of associated functional limitations that are not disclosed in the specification as being performed by the components. For example, claim 1 recites that the input cable interface receives “multiple phase DC (Direct Current) pulse power and data from power sourcing equipment over a combined power and data cable, wherein each phase of the multiple phase DC pulse power comprises voltage pulses with high voltage power delivered during a pulse on-time and the voltage pulses are shifted in phased among multiple phases to provide continuous power”. The specification teaches that the characteristics of the signals received by the input cable interface are determined by the power sourcing equipment (PSE) rather than the powered device (PD).
[0049] The pulse power module control system 17 may provide, for example, timing and sequencing, line detection and characterization, voltage and current sensing, mid-point high resistance grounding, fault sensing, communications to PSUs, and data link/control to remote nodes. As described below, the control system 17 may verify cable operation (e.g., verify cable operational integrity) during the off-time of pulses in the DC pulse power. The pulse power module 16 may include a pulse power modulator, safety circuits, initialization circuits, PMBus, PMBus I2C (I.sup.2C (Inter-Integrated Circuit)), logic, FPGA (Field-Programmable Gate Array), DSP (Digital Signal Processor), or any combination of these or other components configured to perform the functions described herein.
[0050] As shown in the example of FIG. 1A, the PSUs 15 receive AC power on cables 19 and deliver pulse power on cable 21. In one or more embodiments, the pulse power tap/receiver 12 may combine the phases and deliver high voltage (HV) DC power to the node/endpoint 14 on cable 22. In another embodiment, the pulse power tap/receiver 12 may deliver pulse power to the endpoint 14 on the cable 22. In one or more embodiments, the pulse power cable 21 includes two or more optical fibers for delivering data in the combined power and data cable, as described below. In one example, there may be a dedicated fiber (or fibers) per branch.
[0066] FIG. 3 shows an example of a 2-phase 2-pair cable. The simplified circuit shown in FIG. 3 comprises two modulator switches (MS1 (Q1), and MS2 (Q3)) and two isolation switches (IS1 (Q2) and IS2 (Q4)). As described below with respect to FIG. 10, the modulation switches are located at the PSE along with the voltage input (Vin), and the isolation switches are at the PD. In this example, the cable includes two wire pairs (Pair 1, Pair 2), with each pair having resistance (R.sub.C1A, R.sub.C1B at Pair 1, R.sub.C2A, R.sub.C2B at Pair 2). R.sub.L represents the load at the PD. The switches Q1, Q2, Q3, and Q4 may comprise any suitable actively controlled switching device capable of operating at the desired switching frequency, such as a Metal Oxide semiconductor Field Effect Transistor (MOSFET), a Bipolar Junction Transistor (BJT), a Gallium Nitride Field Effect Transistor (GaNFET), or a solid state relay (SSR). Closing and opening of the switch may be managed by control logic coupled to the switch (not shown). The control logic may be part of a processor or a separate integrated circuit.
The specification therefore fails to provide adequate support for the characteristics of the received signals as limiting features of the PD components. Since these characteristics are determined by the PSE which is not recited as part of the presently claimed invention, they are interpreted as statements of intended use and therefore non-limiting. Based on this interpretation, the broadest reasonable interpretation (BRI) of an “input cable interface” includes any and all prior art input cable interfaces and are not limited to only those receiving signals as described in the claim language. This reasoning may also be applied to the verification operations recited in line 13 because the specification teaches that the verification steps are performed by the PSE [para. 0046: “The PSE network device 10 comprises… a power control system 17 for… verifying cable operation within off-time of pulses in the DC pulse power…”].
Similar reasoning may be applied to the isolation switch. Claim 1 recites an isolation switch “for fault isolation”. The specification teaches that fault determination and control is performed by the PSE [para. 0047: “The tap/receivers 12 may be sized to support individual node power and may implement disconnect for fault isolation… based on data link communications…”; para. 0049: “The pulse power module control system 17 may provide… fault sensing… and data link/control to remote nodes…”; para. 0052: “The data link over the pulse power wires allows for implementation of the smart branch taps 12 for each node 14 and independent control (disconnect) of each branch for fault isolation or node management…”]. While it is evident that the isolation switch performs an isolation function, the relation of the isolation function to fault isolation can only be achieved based on the sensing and control functions performed by the PSE. The specification therefore fails to provide adequate support for fault isolation as a limiting feature of the isolation switch. Language directed to fault isolation is interpreted as a statement of intended use and therefore non-limiting. The BRI of “isolation switch” includes any and all prior art isolation switches and is not limited to only those isolation switches that perform fault isolation.
With respect to the interface “for transmitting power to an endpoint node”, the endpoint node is not recited as being part of the apparatus, nor does the claim establish any connectivity between the interface and the endpoint node. It is therefore also interpreted as an intended use for the interface and is therefore non-limiting. The BRI includes any and all interfaces and is not limited to only those interfaces that transmit power to an endpoint node.
Claims 8 and 14 are rejected on the same basis. Additionally, while claim 14 also recites a power sourcing equipment that provides multiple phase DC pulse power, it fails to relate the functional language recited with the PD components as being executed by the PSE. The fault isolation functions and verification functions are not explicitly recited as being performed by the PSE, and are interpreted as an intended use (and therefore non-limiting).
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim 1 recites an isolation switch “to synchronize with the power sourcing equipment prior to receiving the multiple phase DC pulse power”. The specification mentions synchronization in only two instances.
[0027] In one or more embodiments, the data is transmitted over pulse power wires and provides synchronization with the powered devices.
[0074] FIG. 9 illustrates a simplified example of a data and power delivery system comprising a PSE 90 in communication with PD 92 providing power to a load 93, over a combined power and data cable (e.g., Power over Fiber (PoF) cable) 94. In this example, the cable 94 includes two optical fibers 95 (e.g., 2-fiber single mode) and two twisted pairs 96 (e.g., copper wires). Control data shown at 97 may be delivered over the optical fibers 95 or copper wires (twisted pairs) 96, or a separate transmission line. The control data may comprise, for example, isolation switch synchronization control data, bidirectional control data, or other PD synchronization data. Bidirectional communications data may also be transmitted over the optical fibers 95 or wires 96. In one example, 10 MB communications are provided over a copper pair during high voltage on pulse (e.g., on high voltage data link). Input power (e.g., AC, HVAC, HVDC, line card 48-56 VDC) may be provided at the PSE 90. As described below, the system may also be configured with one or more safety features including shock protection. In one example, the system may be configured to provide 2000 W power on copper pairs 96 over 1 km with 550 VDC pulse power. The cable may comprise any number of optical fibers and wires or wire pairs and may deliver other power levels over different lengths of cable.
As can be observed, the specification merely mentions synchronization in a cursory manner, and fails to provide any description of its implementation with the claimed isolation switch. The specification does not describe what aspect of the PSE or PD is synchronized, nor does it describe what synchronization accomplishes. The specification is silent with respect to specific details of the isolation switch synchronization control data and how it used by the switch to perform synchronization. Isolation switch synchronization is also not a well-known function in the art. Given the lack of guidance from the specification, it would have required undue experimentation from a person having ordinary skill the art (PHOSITA) to make or use an isolation switch to synchronize with the PSE as claimed. It would have required PHOSITA to determine a need for synchronization, define parameters for synchronization, and specify control data that accomplishes the synchronization using the isolation switches. Because the specification fails to provide a foundational definition of synchronization, and because the claimed synchronization is not well-known in the art, all of these steps would have required undue experimentation from PHOSITA.
Claims 8 and 14 are rejected on the same basis.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 8, 9, 14, and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Godfrey et al., U.S. Patent Application Publication No. 2018/0180658. Godfrey was cited by the Applicant in the IDS filed on 24 July 2024.
Regarding claim 1, Godfrey discloses an apparatus comprising:
an input cable interface [Fig. 2: circuit breaker 205 coupled to power cable 100] for receiving multiple phase DC (Direct Current) pulse power and data from power sourcing equipment over a combined power and data cable, wherein each phase of the multiple phase DC pulse power comprises voltage pulses with high voltage power delivered during a pulse on-time and the voltage pulses are shifted in phase among multiple phases to provide continuous power;
an isolation switch [para. 0013: “FIG. 2 illustrates a cable insulation failure and catastrophic fault at location 204. This will generally result in power transmission through the cable having to be stopped until the cable can be repaired, for instance by opening one or more high voltage circuit breakers 205.”] for fault isolation of the apparatus and to synchronize with the power sourcing equipment prior to receiving the multiple phase DC pulse power; and
an interface for transmitting power to an endpoint node [Fig. 2: power station 203], wherein the multiple phase DC pulse power comprises at least two phases to provide continuous DC voltage to the endpoint node and wherein off-time of pulses of the multiple phase DC pulse power is used to verify operation of the combined power and data cable.
Regarding claim 2, Godfrey teaches the apparatus is configured to enable line sensing by the power sourcing equipment [para. 0017: “…performing distributed fibre optic sensing on a sensing optical fibre to provide a measurement signal from each of a plurality of longitudinal sensing portions of the sensing optical fibre, the sensing optical fibre being coupled to the power cable…”].
Claims 8, 9, and 15 are rejected on the same basis as claims 1 and 2.
Regarding claim 14, Godfrey discloses a power receiver device as shown in the rejection of claim 1. Godfrey additionally discloses:
power sourcing equipment [Fig. 2: power station 201] that provides multiple phase DC (Direct Current) pulse power over a combined power and data cable [Fig. 1 and 2: power cable 100], wherein each phase of the multiple phase DC pulse power comprises voltage pulses with high voltage power delivered during a pulse on-time and the voltage pulses are shifted in phase among multiple phases to provide continuous power [Fig. 5].
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 3-8, 10-14, and 16-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 25-31 of U.S. Patent No. 11,456,883. Although the claims at issue are not identical, they are not patentably distinct from each other because the application claims are anticipated by, or obvious variants of, the patent claims.
Application claim 1 and patent claim 25 may be compared in the following manner:
Application Claim 1
Patent Claim 1
An apparatus comprising:
an input cable interface for receiving multiple phase DC (Direct Current) pulse power and data from power sourcing equipment over a combined power and data cable, wherein each phase of the multiple phase DC pulse power comprises voltage pulses with high voltage power delivered during a pulse on-time and the voltage pulses are shifted in phase among multiple phases to provide continuous power;
an isolation switch for fault isolation of the apparatus and to synchronize with the power sourcing equipment prior to receiving the multiple phase DC pulse power; and
an interface for transmitting power to an endpoint node,
wherein the multiple phase DC pulse power comprises at least two phases to provide continuous DC voltage to the endpoint node and wherein off-time of pulses of the multiple phase DC pulse power is used to verify operation of the combined power and data cable.
An apparatus comprising:
an input cable interface for receiving multiple phase DC (Direct Current) pulse power and data from power sourcing equipment over a combined power and data cable;
an isolation switch for fault isolation of the apparatus; and
an interface for transmitting power to an endpoint node;
wherein the multiple phase DC pulse power comprises at least two phases to provide continuous DC voltage at the endpoint node and wherein off-time of pulses in the multiple phase DC pulse power is used to verify cable operation;
wherein each phase of the multiple phase DC pulse power comprises voltage pulses with high voltage power delivered during a pulse on-time and low voltage power delivered during the pulse off-time with auto-negotiation with the power sourcing equipment, the voltage pulses offset between multiple phases to provide continuous power; and
wherein power is received at the apparatus and fault isolation is performed at the apparatus and the isolation switch is synchronized with the power sourcing equipment before receiving the multiple phase DC pulse power.
Applicant claim 1 represents a broadened version of patent claim 1 because it excludes certain features (e.g., patent claim 1 recites auto-negotiation). However, the limitations of application claim 1 are also recited in patent claim 1, as can be readily observed in the comparison of the highlighted claim language, with minor variation in language. Similar reasoning may be applied to application claim 8.
Dependent application claims 3-7, 10-13, and 16-20 are anticipated by patent claims 26-29.
Application claim 14 represents a combination of patent claims 1 and 25 and is therefore an obvious variant of the patent claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
O’Brien et al., U.S. Patent No. 12,126,456, is the patent that issued from parent application no. 17/560,424.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JI H BAE whose telephone number is (571)272-7181. The examiner can normally be reached Tuesday to Friday and every other Monday, 9 am to 6 pm.
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/JI H BAE/Primary Examiner, Art Unit 2176 U.S. Patent and Trademark Office
Phone: 571-272-7181
Fax: 571-273-7181
ji.bae@uspto.gov