Prosecution Insights
Last updated: April 19, 2026
Application No. 18/782,481

MAGNETORESISTIVE SENSORS AND ASSOCIATED PRODUCTION METHOD

Non-Final OA §103
Filed
Jul 24, 2024
Examiner
NGUYEN, TUNG X
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
91%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
627 granted / 715 resolved
+19.7% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
47 currently pending
Career history
762
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 715 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s)1-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Paul et al. (US20170322052A1 hereinafter Paul), in view of Lassalle-Balier (US20190235032A1 hereinafter Lassalle-Balier) As to claim 1, Paul discloses in Figs. 1 and 2, a magnetoresistive sensor, comprising: a bridge circuit (Wheatstone bridge as shown in Fig. 1) having at least one magnetoresistive resistor (resistor arrangements R1, R2, R3, R4 as shown in Fig. 1), wherein the bridge circuit is designed to provide a first differential analog output voltage (“measuring potential Vout” as shown in Fig. 1); wherein the second differential analog output voltage has a value of zero at a specified magnetic field strength not equal to zero (“Very fine adjustment may thus be achieved for precise trimming of a measuring bridge” and “a defined setting of the overall preferred direction” as shown in Fig. 1); and wherein a common-mode voltage associated with the second differential analog output voltage corresponds to a specified percentage of a supply voltage of the bridge circuit (“two bridge branches connected in parallel between a supply potential Vb” as shown in Fig. 1). Paul does not disclose an amplifier circuit connected downstream of the bridge circuit, wherein the amplifier circuit is designed to provide a second differential analog output voltage based on the first differential analog output voltage provided by the bridge circuit. However, Lassalle-Balier discloses in Fig. 1A an amplifier circuit (differential amplifier circuit 130 as shown in Fig. 1A) connected downstream of the bridge circuit (bridge circuit 110 as shown in Fig. 1A), wherein the amplifier circuit is designed to provide a second differential analog output voltage based on the first differential analog output voltage provided by the bridge circuit (“node 124 of the bridge circuit 110 is connected to a differential amplifier circuit 130. Node 126 is also connected to the differential amplifier circuit 130” as shown in Fig. 1A). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the magnetoresistive sensor of Paul by adding the amplifier circuit (differential amplifier circuit 130 as shown in Fig. 1A) connected downstream of the bridge circuit, as taught by Lassalle-Balier for processing the first differential analog output voltage (“measuring potential Vout” as shown in Fig. 1 of Paul et al.) into a second differential analog output voltage while reducing stray field sensitivity. As to claim 2, Paul discloses in Fig. 1 that the bridge circuit comprises four magnetoresistive resistors (resistor arrangements R1, R2, R3, R4 as shown in Fig. 1). As to claim 3, Paul discloses in Fig. 1 that the at least one magnetoresistive resistor of the bridge circuit is a TMR resistor (resistor arrangements R1, R2, R3, R4 as shown in Fig. 1 are TMR-based). As to claim 4, Paul discloses in Fig. 1 that the four magnetoresistive resistors of the bridge circuit are of identical construction (“The four magnetoresistive bridge resistors have an identical nominal resistance magnitude” as shown in Fig. 1). As to claim 5, the combination of Paul et al. and Lassalle-Balier discloses the amplifier circuit comprises: at least one differential amplifier (differential amplifier circuit 130 as shown in Fig. 1A of Lassalle-Balier), which is designed to provide a differential analog output voltage, which has a value of zero at the specified magnetic field strength, based on a differential analog voltage not equal to zero provided to the at least one differential amplifier; and at least one summing amplifier (output module 140 as shown in Fig. 1A of Lassalle-Balier), which is designed to provide a differential analog output voltage, the associated common-mode voltage of which corresponds to the specified percentage of the supply voltage, based on a differential analog voltage provided to the at least one summing amplifier. As to claim 6, Lassalle-Balier discloses in Fig. 1A that the at least one summing amplifier (output module 140 as shown in Fig. 1A) is connected downstream of the at least one differential amplifier (differential amplifier circuit 130 as shown in Fig. 1A). As to claim 7, the combination of Paul et al. and Lassalle-Balier discloses the amplifier circuit comprises: a first differential amplifier and a first summing amplifier (differential amplifier circuit 130 and output module 140 as shown in Fig. 1A of Lassalle-Balier), which are connected in series and are designed to output a first processed voltage signal based on a first voltage signal output from the bridge circuit (bridge circuit 110 as shown in Fig. 1A), and a second differential amplifier and a second summing amplifier (mirrored channel using the same structure differential amplifier circuit 130 and output module 140 as shown in Fig. 1A of Lassalle-Balier), which are connected in series and are designed to output a second processed voltage signal based on a second voltage signal output from the bridge circuit. As to claim 8, Paul discloses in Fig. 1 and Fig. 2 that the specified magnetic field strength is approximately 47 mT as an obvious design choice via trimming (“Very fine adjustment may thus be achieved for precise trimming of a measuring bridge” as shown in Fig. 1) for any desired operating point. As to claim 9, Lassalle-Balier discloses in Fig. 1A that the specified percentage is approximately 70% as an obvious optimization of the ratiometric common-mode level set relative to the bridge supply Vb (“Vcc can be used to compensate for gain changes” as shown in Fig. 1A of Lassalle-Balier combined with Vb of Paul et al.). As to claim 10, Paul discloses in Fig. 1 that an entire portion of the supply voltage drops across the bridge circuit (“two bridge branches connected in parallel between a supply potential Vb” as shown in Fig. 1). As to claim 11, the combination of Paul et al. and Lassalle-Balier renders obvious monolithic integration with overlap (bridge circuit 110 arranged with the differential amplifier circuit 130 on the same semiconductor structure as shown in Fig. 1A of Lassalle-Balier combined with the integrated Wheatstone bridge as shown in Fig. 1 of Paul et al.). As to claim 12, Paul discloses in Fig. 1 and the temperature discussion that a compensation circuit connected downstream of the bridge circuit (Wheatstone bridge as shown in Fig. 1) is designed to compensate for an influence of a temperature and/or a mechanical stress on the first differential analog output voltage or the second differential analog output voltage (“Vcc can be used to compensate for gain changes of the GMR elements over process and temperature” as shown in Fig. 1A of Lassalle-Balier). As to claim 13, Paul discloses in Fig. 1 and Fig. 2 that the magnetoresistive sensor is a linear in-plane sensor (Wheatstone bridge as shown in Fig. 1 configured for linear in-plane magnetic field sensing). As to claim 14, the combination of Paul et al. and Lassalle-Balier discloses that the magnetoresistive sensor is designed to be integrated into a camera module of a smartphone (trimmed MR bridge with downstream amplifier for precise position sensing in OIS/AF/zoom applications as an obvious use of the structure shown in Fig. 1 of Paul et al. and Fig. 1A of Lassalle-Balier). As to claim 15, Paul discloses in Figs. 1 and 2, a method for producing a magnetoresistive sensor, wherein the method comprises: creating a bridge circuit having at least one magnetoresistive resistor (resistor arrangements R1, R2, R3, R4 as shown in Fig. 1), wherein the bridge circuit is designed to provide a first differential analog output voltage (“measuring potential Vout” as shown in Fig. 1); wherein the second differential analog output voltage has a value of zero at a specified magnetic field strength not equal to zero (“Very fine adjustment may thus be achieved for precise trimming of a measuring bridge” and “a defined setting of the overall preferred direction” as shown in Fig. 1); and wherein a common-mode voltage associated with the second differential analog output voltage corresponds to a specified percentage of a supply voltage of the bridge circuit (“two bridge branches connected in parallel between a supply potential Vb” as shown in Fig. 1). Paul et al. does not disclose creating an amplifier circuit connected downstream of the bridge circuit, wherein the amplifier circuit is designed to provide a second differential analog output voltage based on the first differential analog output voltage provided by the bridge circuit. However, Lassalle-Balier discloses in Fig. 1A creating an amplifier circuit (differential amplifier circuit 130 as shown in Fig. 1A) connected downstream of the bridge circuit (bridge circuit 110 as shown in Fig. 1A), wherein the amplifier circuit is designed to provide a second differential analog output voltage based on the first differential analog output voltage provided by the bridge circuit (“node 124 of the bridge circuit 110 is connected to a differential amplifier circuit 130. Node 126 is also connected to the differential amplifier circuit 130” as shown in Fig. 1A). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the method of producing the magnetoresistive sensor of Paul et al. by adding the step of creating the amplifier circuit (differential amplifier circuit 130 as shown in Fig. 1A) connected downstream of the bridge circuit, as taught by Lassalle-Balier for processing the first differential analog output voltage (“measuring potential Vout” as shown in Fig. 1 of Paul et al.) into a second differential analog output voltage while reducing stray field sensitivity. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUNG X NGUYEN whose telephone number is (571)272-1967. The examiner can normally be reached 10:30am-6:30pm M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at 571-272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUNG X NGUYEN/Primary Examiner, Art Unit 2858 3/20/2026
Read full office action

Prosecution Timeline

Jul 24, 2024
Application Filed
Mar 20, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
91%
With Interview (+3.2%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 715 resolved cases by this examiner. Grant probability derived from career allow rate.

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