DETAILED ACTION
This action is responsive to the Applicant's amendments filed on 02/25/26. Claims 1-24 remain pending in the application. No claims have been amended. Any examiner's note, objection, and rejection not repeated is withdrawn due to Applicant's amendment.
Response to Arguments
Applicant's arguments filed 02/25/26 have been fully considered but they are not persuasive.
The Applicant contends that Sharma does not teach or suggest: perform a second read operation as part of the read error handling procedure based at least in part on performing the first read operation, wherein the second read operation is initiated before the error correction operation is complete.
Examiner respectfully disagrees and asserts that Sharma in paragraph [0087] teaches that during a first reading phase, the LP of the memory location 315 is read. If a read operation error occurred corresponding to the LP of the memory location 315, a read error handling operation is performed. Upon completion of a successful read error handling operation corresponding to the LP of the memory location 315, data of the LP of the memory location 315 is written, along with padding data, to a WL or a memory location 335 of the destination memory block 310. Further Sharma in paragraph [0088] describes during a second reading phase, a MP of the memory location 315 is read. If a read operation error did not occur while reading data of the MP, the data of the MP, and data written in the memory location 335, along with the padding data, is written to a WL or a memory location 340 of the destination memory block 310. If a read operation error did occur, a read error correction operation is performed on the data of the MP. Additionally, the data of the MP, and data written in the memory location 335, along with padding data, is written in the memory location 340 of the destination memory block 310. Further, the Examiner respectfully disagrees and the concepts are taught in Sharma’s reference to the extent required by the actual claim language. Further, the interpretation of the claim language must be as broad as possible for the given art. If the Applicant needs a specific interpretation of the claim language, these details must be imported into the claims. These details cannot be read into the claim language when the claim language is so broad as to encompass other valid interpretations. Applicants are advised to review Sharma reference in its entirety for a complete and better understanding of the prior art applied. This may enhance the Applicants ability to formulate claim language that includes novelty of the application. It is the Examiner's conclusion that the claims of the present application, as presented, are not patentably distinct or novel over the prior arts of record. Applicants are encouraged to formulate claim language that clearly differentiates the claims from the prior art of record. Furthermore, besides to the above explanation, the practice is also known and common or normal and a standard practice in modern computing, data storage, for example., RAM memory utilize Error-Correcting Code (ECC) memory to detect and fix data corruption silently while reading data, and communication systems such as Networking & Data Transmission Systems use forward error correction (FEC) to mathematically detect and fix corrupted data packets in transit without needing to request a retransmission and in addition to that it allows systems like SSDs, hard drives, and enterprise RAID arrays to fix data corruption the moment it is detected during a standard read. Therefore, the applicants’ argument although acknowledged, has not been found to be convincing and in light of the above, the final rejection holds strong in view of the recited reference (Sharma).
As for dependent claims 4-9, contrary to Applicant's arguments, because the dependent claims depend from an unpatentable claim and does not add limitations that overcome the rejection, it likewise remains rejected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claims 1 and 4-9 are rejected under 35 U.S.C. 103 as being unpatentable over Sharma et al. "hereinafter Sharma" (US 2024/0386984) in view of Koshiyama et al. "herein Koshiyama" (U.S. PN: 8,438,457).
As per claim 1:
Sharma substantially teaches or discloses a memory system comprising: at least one non-
volatile memory array; and at least one controller coupled with the at least one non-volatile
memory array and configured to cause the memory system to configure "a system including a
controller and a memory communicatively coupled to the controller. The memory stores
instructions that, when executed by the controller, causes the controller to perform a read
operation on a set of pages stored at a memory location of a source memory block" (see
paragraph [0008]); perform a first read operation as part of a read error handling procedure of the
memory system; perform an error correction operation on data associated with the first read
operation based at least in part on performing the first read operation; perform a second read
operation as part of the read error handling procedure based at least in part on performing the
first read operation, wherein the second read operation is initiated before the error correction
operation is complete "the instructions may also cause the controller to determine whether a read
operation error has occurred on the set of pages the instructions may also cause the controller
to perform an error correction operation on data associated with each page of the first subset of
pages to generate corrected data for each page of the first subset of pages for which a read
operation error has occurred" (see paragraphs [0008], [0027] - [0030], [0038] - [0040], [0083]
and [0086]-[0088]) and terminate the read error handling procedure based at least in part on identifying that the error correction operation successfully corrected one or more errors in the data after initiating the performance of the second read operation.
However, Sharma does not explicitly teach terminating the read error handling procedure
based at least in part on identifying that the error correction operation successfully corrected one
or more errors in the data after initiating the performance of the second read operation.
Koshiyama, in an analogous art, teaches terminating the read error handling procedure
based at least in part on identifying that the error correction operation successfully corrected one
or more errors in the data after initiating the performance of the second read operation (see col.
13, lines 56-62).
Therefore, it would have been obvious to one of ordinary skill in the art before the
effective filing date of the invention to modify Sharma with the teachings of Koshiyama by
terminating the read error handling procedure based at least in part on identifying that the error
correction operation successfully corrected one or more errors in the data after initiating the
performance of the second read operation
This modification would have been obvious to one of ordinary skill in the art, before the
effective filing date of the invention because one of ordinary skill in the art would have
recognized that by terminating the read error handling procedure based at least in part
on identifying that the error correction operation successfully corrected would have heighten the
decoding efficiency and increased the flexibility of configuration.
As per claim 4:
The combination of Sharma and Koshiyama in the above rejection teach wherein
terminating the read error handling procedure is configured to cause the memory system to cease
to perform the second read operation before completing the second read operation (see col. 13,
lines 56-62 in Koshiyama).
As per claim 5:
The combination of Sharma and Koshiyama in the above rejection teach wherein the at
least one controller is further configured to cause the memory system to receive a command to
terminate the read error handling procedure based at least in part on identifying that the error
correction operation successfully corrected the one or more errors in the data, wherein ceasing to
perform the second read operation is based at least in part on receiving the command (see col. 13, lines 56-62 in Koshiyama).
As per claim 6:
The combination of Sharma and Koshiyama in the above rejection teach wherein the at
least one controller is further configured to cause the memory system to: transfer the data from
the at least one non-volatile memory array to the at least one controller based at least in part on
performing the first read operation, wherein the error correction operation is performed at the at
least one controller based at least in part on transferring the data (see paragraphs [0083] and
[0088] in Sharma).
As per claim 7:
The combination of Sharma and Koshiyama in the above rejection teach wherein the
second read operation is performed after the first read operation based at least in part on the first
read operation being associated with lower latency or more simplicity than the second read
operation (see paragraphs [0087] and [0093] in Sharma).
As per claim 8:
The combination of Sharma and Koshiyama in the above rejection teach wherein
performing the first read operation is configured to cause the memory system to: read one or
more first pages of the at least one non-volatile memory array, and performing the second read
operation comprises reading one or more second pages at a different level of the at least one non-
volatile memory array (see paragraphs [0034] and [0058] - [0059] in Sharma).
As per claim 9:
The combination of Sharma and Koshiyama in the above rejection teach wherein
the one or more first pages and the one or more second pages are associated with single-level
cells, multi-level cells, triple-level cells, quad-level cells, or penta-level cells (see paragraphs
[0034] and [0058] - [0059] in Sharma).
Allowable subject matter
Claims 2-3 and 10-12, are objected to as being dependent upon a rejected base claim
but would be allowable if rewritten independent from including all of the limitation of the
base claim and any intervening claims.
Claims 13-24 are previously allowed.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Esaw T. Abraham whose telephone number is (571) 272-3812. The examiner can normally be reached on M-F 8am-4PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner'ssupervisor, Albert DeCady can be reached on (571) 272-3819. The fax phone number for the organization where this application or proceeding is assigned is (703) 872-9306.
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/ESAW T ABRAHAM/Primary Examiner,
Art Unit 2112
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