Prosecution Insights
Last updated: April 19, 2026
Application No. 18/783,327

OPTIMIZING DATA PLACEMENT FOR INCREASED STORAGE SYSTEM BANDWIDTH

Final Rejection §103§112
Filed
Jul 24, 2024
Examiner
LOONAN, ERIC T
Art Unit
2137
Tech Center
2100 — Computer Architecture & Software
Assignee
Pure Storage Inc.
OA Round
2 (Final)
64%
Grant Probability
Moderate
3-4
OA Rounds
4y 0m
To Grant
91%
With Interview

Examiner Intelligence

Grants 64% of resolved cases
64%
Career Allow Rate
271 granted / 423 resolved
+9.1% vs TC avg
Strong +27% interview lift
Without
With
+27.0%
Interview Lift
resolved cases with interview
Typical timeline
4y 0m
Avg Prosecution
29 currently pending
Career history
452
Total Applications
across all art units

Statute-Specific Performance

§101
8.1%
-31.9% vs TC avg
§103
45.7%
+5.7% vs TC avg
§102
20.1%
-19.9% vs TC avg
§112
19.7%
-20.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 423 resolved cases

Office Action

§103 §112
DETAILED ACTION This Office Action, based on application 18/783,327 filed 24 July 2024, is filed in response to applicant’s amendment and remarks filed 23 December 2025. Claims 1-20, as amended on 23 December 2025, are currently pending and have been fully considered below. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s remarks, submitted 23 December 2025 in response to the Office Action mailed 1 October 2025, have been fully considered below. Claim Rejections under 35 U.S.C. § 112 The applicant traverses the indefiniteness rejection alleging “the read frequencies for the data and the read frequency for the dies are clear”. The Office maintains the record is still not clear for reasons cited in the rejection and corresponding objections to the claims. The Office notes the claims, as presented, fail to link any relationship between the determining of read frequencies of data to the identification of a first and second die each having a read frequency. Claim Rejections under 35 U.S.C. § 103 The applicant traverses the prior art rejection to the claims alleging one skilled in the art would not combine the references as suggested by the rejection of record. In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, a motivation for doing so would have been to utilize a higher performance storage device with characteristics including faster read and write times opposed to hard disk drives. Applicant’s remarks including (a) “The access times for flash memory does not differ as does the access time for hard disk drives” and (b) “sequential access for data on a flash die does not have an associated penalty/delay as sequential accesses on hard disk drives” are noted; however, the Office finds the remarks unpersuasive as the remarks amount to mere allegations. With respect to (b), while YAMAMOTO may consider a sequential access ratio for determining a destination for reallocation, YAMAMOTO will not consider a disk device’s sequential performance when sequential access is irrelevant (e.g. Fig 10, Step 1001 => NO). As such, the remarks of (b) are moot. However, even if (b) was relevant, the Office submits the attached NPL article by RANA (“Sequential vs Random Read/Write Performance in Storage”) discusses why both SSD’s and hard disk drives both suffer access performance when processing random versus sequential data. With respect to (a), applicant’s remarks suggest all flash memory or SSD’s have the same access times which simply is not true; the Office submits one flash memory versus another flash memory may have different access times for a variety of reasons including environmental factors (e.g. temperature), the silicon process used to build the SSD, the size of the SSD, etc. Claim Objections The following claims are objected to due to informalities: Claim 8: The claim was amended to recite “wherein the relocation causes the first die to have subsequent corresponding read frequencies below the first threshold”. The claim was further amended to recite that ‘a first die’ has ‘a read frequency’. The Office notes the claim is subject to an indefiniteness rejection as the Office is unsure of the claim interpretation. While the Office understands how a set of dies may have corresponding read frequencies, the Office is unsure how one die would have a plurality of read frequencies. The Office notes Claim 1 was amended to recite “wherein the relocation causes the first die to have a subsequent corresponding read frequency below the first threshold”. Claim 11: Lack of antecedent basis of the term “the second set of dies”. Claim 11 should be amended similarly to the amendment of Claim 4. Claim 15: The Office objects to the limitation “relocating, by a processing device of a storage controller, first data from the first die, wherein the relocation causes the first die to have subsequent corresponding read frequencies below the first threshold” for several reasons. (1) Claim 15 suffers from the same interpretation issue as noted in the objection to Claim 8 regarding a single die having multiple read frequencies. (2) The claim is directed to a medium storing instructions that cause “a processing device to:” perform the ‘relocating’. However, the ‘relocating’ is states as being performed by “a processing device of a storage controller”. Are the processing devices of Line 2 and Line 8 the same? (3) The Office notes the limitation is substantially different from the original presentation of the limitation and is not marked properly. Claim 18: Lack of antecedent basis of the term “the second set of dies”. Claim 18 should be amended similarly to the amendment of Claim 4. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Exemplary Claim 1 is limited to (1) “determine corresponding read frequencies of data stored at the plurality of dies” and (2) “identify a first die of the plurality of dies having a read frequency …”. The read frequencies of (1) appear to correspond to data, while the read frequencies of (2) appear to correspond to dies. The Office is unclear as to whether the read frequencies of (1) are the same read frequencies of (2). Put another way, is a read frequency a frequency of reads to particular data, or a frequency of reads to a particular die or {physical} storage device? Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 4-8, 11-15, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over YAMAMOTO et al (US Patent 5,956,750) in further view of KOSEKI (US PGPub 2011/0283046) and INGLIS et al (US PGPub 2023/0068214). With respect to Claim 1, YAMAMOTO discloses a storage system comprising: a plurality of physical storage devices (Fig 1, Physical Disk Device 105); and a storage controller comprising a processing device, operatively coupled to the plurality of physical storage devices (Fig 1, Storage Controller 104 comprise Director 106), configured to: determine corresponding access frequencies of data stored at the plurality of physical storage devices (Fig 10, Step 1000; Col 8, Lines 48-56 – “In step 1000, referring to the access frequency information 501 of access information 500, a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed. If there exists such a logical disk device 200, control is passed to step 1001; otherwise, control is transferred to step 1005”); identify a first device of the plurality of physical storage devices having an access frequency above a first threshold (Col 8, Lines 48-56 – “a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed.”) and a second device of the plurality of physical storage devices having an access frequency below a second threshold (Fig 10, Step 1002; Col 8, Line 66 through Col 9, Line 3) – “a check is conducted to determine whether or not there exists a logical disk device 200 (to be referred to as a second candidate logical disk device) of which the access frequency is equal to or less than the predetermined value”); and relocate first data from the first device, wherein the relocation causes the first device to have a subsequent corresponding access frequency below the first threshold (Fig 10, Step 1003; Col 9, Lines 6-10 – “In step 1003, it is decided that the process of reallocation (630) is required to be conducted between the first and second candidate logical disk devices 200 and the indication of reallocation 620 is issued. The processing is then terminated.”; Col 2, Lines 43-45 – “The first and second logical disk devices are allocated to the second and first physical disk devices, respectively”). YAMAMOTO may not explicitly disclose wherein the plurality of physical disk devices including the first device and the second device are a plurality of solid-state storage devices comprising a plurality of dies; wherein access frequencies are read frequencies. However, KOSEKI discloses wherein the plurality of physical disk devices including the first device and the second device are a plurality of solid-state storage devices (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). YAMAMOTO and KOSEKI are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO and KOSEKI before him or her, to modify the physical disk device of YAMOMOTO to include flash memory chips as taught by KOSEKI. A motivation for doing so would have been to utilize a higher performance storage device with characteristics including faster read and write times opposed to hard disk drives (¶[0005]). Therefore, it would have been obvious to combine YAMAMOTO and KOSEKI to obtain the invention as specified in the instant claims. YAMAMOTO and KOSEKI may not explicitly disclose wherein access frequencies are read frequencies. However, INGLIS discloses wherein access frequencies are read frequencies (¶[0301] – “If a single storage device, or a single part of a storage device, is being used disproportionately, this can lead to early failure compared to other comparable storage devices. Consequently, the system may move data so that all storage devices are read from or written to a relatively similar frequency. Other types of storage devices may benefit from consistent read rates, consistent write rates, consistent power usage, scheduled down time, or other device specific characteristics.”). YAMAMOTO, KOSEKI, and INGLIS are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO, KOSEKI, and INGLIS before him or her, to modify the metric to be used to decide on migration of the combination of YAMOMOTO and KOSEKI to include read rates as taught by INGLIS. A motivation for doing so would have been to maximize the lifecycle of the storage devices due to device wear out when read too frequently (¶[0301]). Therefore, it would have been obvious to combine YAMAMOTO, KOSEKI, and INGLIS to obtain the invention as specified in the instant claims. With respect to Claim 8, YAMAMOTO discloses a method comprising: determining corresponding access frequencies of data stored at a plurality of physical disk devices of a storage system (Fig 10, Step 1000; Col 8, Lines 48-56 – “In step 1000, referring to the access frequency information 501 of access information 500, a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed. If there exists such a logical disk device 200, control is passed to step 1001; otherwise, control is transferred to step 1005”); identifying a first device of the plurality of physical disk devices having an access frequency above a first threshold (Col 8, Lines 48-56 – “a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed.”) and a second device of the plurality of physical disk devices having an access frequency below a second threshold (Fig 10, Step 1002; Col 8, Line 66 through Col 9, Line 3) – “a check is conducted to determine whether or not there exists a logical disk device 200 (to be referred to as a second candidate logical disk device) of which the access frequency is equal to or less than the predetermined value”); and relocating, by a processing device of a storage controller, first data from the first device, wherein the relocation causes the first device to have subsequent corresponding access frequencies below the first threshold (Fig 10, Step 1003; Col 9, Lines 6-10 – “In step 1003, it is decided that the process of reallocation (630) is required to be conducted between the first and second candidate logical disk devices 200 and the indication of reallocation 620 is issued. The processing is then terminated.”; Col 2, Lines 43-45 – “The first and second logical disk devices are allocated to the second and first physical disk devices, respectively”). YAMAMOTO may not explicitly disclose wherein the plurality of physical disk devices including the first device and the second device are a plurality of solid-state storage devices comprising a plurality of dies; wherein access frequencies are read frequencies. However, KOSEKI discloses wherein the plurality of physical disk devices including the first device and the second device are a plurality of solid-state storage devices (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). YAMAMOTO and KOSEKI are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO and KOSEKI before him or her, to modify the physical disk device of YAMOMOTO to include flash memory chips as taught by KOSEKI. A motivation for doing so would have been to utilize a higher performance storage device with characteristics including faster read and write times opposed to hard disk drives (¶[0005]). Therefore, it would have been obvious to combine YAMAMOTO and KOSEKI to obtain the invention as specified in the instant claims. YAMAMOTO and KOSEKI may not explicitly disclose wherein access frequencies are read frequencies. However, INGLIS discloses wherein access frequencies are read frequencies (¶[0301] – “If a single storage device, or a single part of a storage device, is being used disproportionately, this can lead to early failure compared to other comparable storage devices. Consequently, the system may move data so that all storage devices are read from or written to a relatively similar frequency. Other types of storage devices may benefit from consistent read rates, consistent write rates, consistent power usage, scheduled down time, or other device specific characteristics.”). YAMAMOTO, KOSEKI, and INGLIS are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO, KOSEKI, and INGLIS before him or her, to modify the metric to be used to decide on migration of the combination of YAMOMOTO and KOSEKI to include read rates as taught by INGLIS. A motivation for doing so would have been to maximize the lifecycle of the storage devices due to device wear out when read too frequently (¶[0301]). Therefore, it would have been obvious to combine YAMAMOTO, KOSEKI, and INGLIS to obtain the invention as specified in the instant claims. With respect to Claim 15, YAMAMOTO discloses a non-transitory computer readable storage medium storing instructions which, when executed, cause a processing device to: determine corresponding access frequencies of data stored at a plurality of physical disk devices of a storage system (Fig 10, Step 1000; Col 8, Lines 48-56 – “In step 1000, referring to the access frequency information 501 of access information 500, a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed. If there exists such a logical disk device 200, control is passed to step 1001; otherwise, control is transferred to step 1005”); identify a first device of the plurality of physical disk devices having an access frequency above a first threshold (Col 8, Lines 48-56 – “a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed.”) and a second device of the plurality of physical disk devices having an access frequency below a second threshold (Fig 10, Step 1002; Col 8, Line 66 through Col 9, Line 3) – “a check is conducted to determine whether or not there exists a logical disk device 200 (to be referred to as a second candidate logical disk device) of which the access frequency is equal to or less than the predetermined value”); and relocating, by a processing device of a storage controller, first data from the first device, wherein the relocation causes the first device to have subsequent corresponding access frequencies below the first threshold (Fig 10, Step 1003; Col 9, Lines 6-10 – “In step 1003, it is decided that the process of reallocation (630) is required to be conducted between the first and second candidate logical disk devices 200 and the indication of reallocation 620 is issued. The processing is then terminated.”; Col 2, Lines 43-45 – “The first and second logical disk devices are allocated to the second and first physical disk devices, respectively”). YAMAMOTO may not explicitly disclose wherein the plurality of physical disk devices are a plurality of solid-state storage devices comprising a plurality of dies; wherein access frequencies are read frequencies. However, KOSEKI discloses wherein the plurality of physical disk devices are a plurality of solid-state storage devices (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). YAMAMOTO and KOSEKI are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO and KOSEKI before him or her, to modify the physical disk device of YAMOMOTO to include flash memory chips as taught by KOSEKI. A motivation for doing so would have been to utilize a higher performance storage device with characteristics including faster read and write times opposed to hard disk drives (¶[0005]). Therefore, it would have been obvious to combine YAMAMOTO and KOSEKI to obtain the invention as specified in the instant claims. YAMAMOTO and KOSEKI may not explicitly disclose wherein access frequencies are read frequencies. However, INGLIS discloses wherein access frequencies are read frequencies (¶[0301] – “If a single storage device, or a single part of a storage device, is being used disproportionately, this can lead to early failure compared to other comparable storage devices. Consequently, the system may move data so that all storage devices are read from or written to a relatively similar frequency. Other types of storage devices may benefit from consistent read rates, consistent write rates, consistent power usage, scheduled down time, or other device specific characteristics.”). YAMAMOTO, KOSEKI, and INGLIS are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO, KOSEKI, and INGLIS before him or her, to modify the metric to be used to decide on migration of the combination of YAMOMOTO and KOSEKI to include read rates as taught by INGLIS. A motivation for doing so would have been to maximize the lifecycle of the storage devices due to device wear out when read too frequently (¶[0301]). Therefore, it would have been obvious to combine YAMAMOTO, KOSEKI, and INGLIS to obtain the invention as specified in the instant claims. With respect to Claims 4, 11, and 18, the combination of YAMAMOTO, KOSEKI, and INGLIS disclose the system/method/medium of each respective parent claim. YAMAMOTO further discloses wherein the relocation causes the second device to have a subsequent corresponding access frequency above the second threshold (Fig 10, Step 1003; Col 9, Lines 6-10 – “In step 1003, it is decided that the process of reallocation (630) is required to be conducted between the first and second candidate logical disk devices 200 and the indication of reallocation 620 is issued. The processing is then terminated.”; Col 2, Lines 43-45 – “The first and second logical disk devices are allocated to the second and first physical disk devices, respectively”). KOSEKI further discloses wherein the second device is a solid-state storage device comprising a second die (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). INGLIS further discloses wherein the access frequency is a read frequency (¶[0301] – “If a single storage device, or a single part of a storage device, is being used disproportionately, this can lead to early failure compared to other comparable storage devices. Consequently, the system may move data so that all storage devices are read from or written to a relatively similar frequency. Other types of storage devices may benefit from consistent read rates, consistent write rates, consistent power usage, scheduled down time, or other device specific characteristics.”). With respect to Claims 5, 12, and 19, the combination of YAMAMOTO, KOSEKI, and INGLIS disclose the system/method/medium of each respective parent claim. YAMAMOTO further discloses wherein the first device and the second device are located on differing physical storage devices (Fig 1 illustrates multiple distinct Physical Disk Device 105). KOSEKI further discloses wherein the plurality of physical disk devices are a plurality of solid-state storage devices (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). With respect to Claims 6 and 13, the combination of YAMAMOTO, KOSEKI, and INGLIS disclose the system/method of each respective parent claim. YAMAMOTO further discloses wherein the first threshold is greater than the second threshold (Col 8, Lines 48-56 – “a check is made to decide whether or not there exists any logical disk device 200 (to be referred to as a first candidate logical disk device herebelow) for which the access frequency exceeds a predetermined value and which is allocated to a physical disk device 105 having a relatively low speed.”; Fig 10, Step 1002; Col 8, Line 66 through Col 9, Line 3) – “a check is conducted to determine whether or not there exists a logical disk device 200 (to be referred to as a second candidate logical disk device) of which the access frequency is equal to or less than the predetermined value”). With respect to Claims 7, 14, and 20, the combination of YAMAMOTO, KOSEKI, and INGLIS disclose the system/method of each respective parent claim. YAMAMOTO discloses wherein the plurality of physical storage devices are managed by a controller external to the plurality of physical storage devices (Fig 1 illustrates Storage Controller 104 distinct from Physical Disk Device 105). KOSEKI further discloses wherein the plurality of physical storage devices comprises a plurality of solid-state storage devices comprising a plurality of managed flash storage devices (Fig 2, Flash Box 210 comprise Flash Memory Chips 231). Claim(s) 2, 3, 9, 10, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over YAMAMOTO in further view of KOSEKI, INGLIS, and CHEN (US PGPub 2024/0103759). With respect to Claims 2, 9, and 16, the combination of YAMAMOTO, KOSEKI, and INGLIS disclose the system/method/medium of each respective parent claim. YAMAMOTO, KOSEKI, and INGLIS may not explicitly disclose wherein the first data and the second data are relocated as part of a refresh operation to refresh the data stored at the storage system. However, CHEN discloses wherein the first data and the second data are relocated as part of a refresh operation to refresh the data stored at the storage system (¶[0060] - the data rearrangement procedure may also be combined in other data moving procedure, such as … a read refresh procedure for moving the data having a read count greater than a predetermined read count threshold to a new memory block”). YAMAMOTO, KOSEKI, INGLIS, AND CHEN are analogous art because they are from the same field of endeavor of optimizing data placement among storage devices. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of YAMAMOTO, KOSEKI, INGLIS, AND CHEN before him or her, to modify the basis for migration of YAMOMOTO, KOSEKI, and INGLIS to include refresh procedures as taught by CHEN. A motivation for doing so would have been to avoid errors in the data stored in non-volatile memory due to reading interference. Therefore, it would have been obvious to combine YAMAMOTO, KOSEKI, INGLIS, AND CHEN to obtain the invention as specified in the instant claims. With respect to Claims 3, 10, and 17, the combination of YAMAMOTO, KOSEKI, INGLIS, and CHEN disclose the system/method/medium of each respective parent claim. CHEN further discloses wherein a frequency that the refresh operation is performed is based on at least one of a performance parameter or an endurance of the plurality of dies (¶[0060 – read count). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T LOONAN whose telephone number is (571)272-6994. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla can be reached at 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC T LOONAN/Examiner, Art Unit 2137
Read full office action

Prosecution Timeline

Jul 24, 2024
Application Filed
Sep 29, 2025
Non-Final Rejection — §103, §112
Dec 23, 2025
Response Filed
Feb 03, 2026
Final Rejection — §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
64%
Grant Probability
91%
With Interview (+27.0%)
4y 0m
Median Time to Grant
Moderate
PTA Risk
Based on 423 resolved cases by this examiner. Grant probability derived from career allow rate.

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