CTNF 18/783,606 CTNF 83140 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority 02-26 AIA Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 07/25/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Objections 07-29-01 AIA Claim 11 is objected to because of the following informalities: Claim 11 recites a “systhesis” process and processing module. It appears from the context of the claimed subject matter that the applicant intended for a “synthesis” process and module . Appropriate correction is required. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1, 2 and 11-13 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Krzysztof Adam Koziarz et al (US 20180181846 A1) . Regarding claim 1, Koziarz et al discloses an image processing apparatus that generates image data by using a plurality of processing modules to process input data (¶ [38]), comprising: a classification unit that classifies the plurality of processing modules into a plurality of classes based on memory usage characteristics (¶ [154] and ¶ [156]; memory arenas (classes) share common purpose and common lifetime); and an applying unit that applies a common memory allocator to processing modules classified as the same class by the classification unit, the common memory allocator having a design parameter that is set based on the memory usage characteristics corresponding to the class (¶ [156] memory allocations grouped by purpose). Regarding claim 2, Koziarz et al discloses the image processing apparatus according to claim 1 (see rejection of claim 1), wherein the memory usage characteristics includes at least one of a required memory amount in one allocation, allocation frequency for each required memory amount, and time from allocation to release (¶ [156] common lifetime (time from allocation to release)). Regarding claim 11, Koziarz et al discloses the image processing apparatus according to claim 1, wherein the plurality of processing modules include an edge processing module that extracts edge information of a graphic included in the input data, a systhesis processing module that systhesizes the extracted edge information of each graphic, and an image generation module that generates data obtained by the systhesis processing as intermediate data in the form of a tile and generates image data from the intermediate data (¶ [91], ¶ [108] and ¶ [119]). Regarding claim 12, Koziarz et al discloses an image processing method to generate image data by using a plurality of processing modules to process input data (see rejection of claim 1), comprising: classifying the plurality of processing modules into a plurality of classes based on memory usage characteristics (see rejection of claim 1); and applying a common memory allocator to processing modules classified as the same class by the classifying, the common memory allocator having a design parameter that is set based on the memory usage characteristics corresponding to the class (see rejection of claim 1). Regarding claim 13, Koziarz et al discloses a non-transitory computer readable storage medium storing a program causing a computer to execute an image processing method (¶ [98]) to generate image data by using a plurality of processing modules to process input data (see rejection of claim 1), comprising: classifying the plurality of processing modules into a plurality of classes based on memory usage characteristics (see rejection of claim 1); and applying a common memory allocator to processing modules classified as the same class by the classifying, the common memory allocator having a design parameter that is set based on the memory usage characteristics corresponding to the class (see rejection of claim 1) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Krzysztof Adam Koziarz et al (US 20180181846 A1) in view of Takeshi Ogawa (US 20020194423 A1) . Regarding claim 3, Koziarz et al discloses the image processing apparatus according to claim 2 (see rejection of claim 2). Koziarz et al fails to explicitly disclose the design parameter includes a block size of the memory allocator, memory alignment, and a parameter indicating whether to control exclusively. Ogawa, in the same field of endeavor of memory management for allocating memory space (¶ [53]), teaches the design parameter includes a block size of the memory allocator (¶ [54]), memory alignment (¶ [54]), and a parameter indicating whether to control exclusively (¶ [54]). It would have been obvious to one of ordinary skill in the art before the invention was effectively filed for the image processing apparatus as disclosed by Koziarz et al comprising a classification unit which classifies the plurality of processing modules based on the memory usage to utilize the teachings of Ogawa which teaches the design parameter includes a block size of the memory allocator, memory alignment, and a parameter indicating whether to control exclusively to utilize parameters which ensure quick allocation and durability for sequential operations . 07-21-aia AIA Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Koziarz et al in view of Bruce L. Worthington et al (US 20110271070 A1) . Regarding claim 8, Koziarz et al discloses the image processing apparatus according to claim 1 (see rejection of claim 1), further comprising: the classification unit classifies the plurality of processing modules based on the memory usage characteristics (see rejection of claim 1). Koziarz et al fails to explicitly disclose a measurement unit that measures the memory usage characteristics of each of the plurality of processing modules, wherein the classification is based on the memory usage characteristics measured by the measurement unit. Worthington et al, in the same field of endeavor of determining memory usage information (Abstract), teaches a measurement unit that measures the memory usage characteristics of each of the plurality of processing modules (¶ [51]), wherein the classification is based on the memory usage characteristics measured by the measurement unit (¶ [28]). It would have been obvious to one of ordinary skill in the art before the invention was effectively filed for the image processing apparatus as disclosed by Koziarz et al comprising a classification unit which classifies the plurality of processing modules based on the memory usage to utilize the teachings of Worthington et al which teaches a measurement unit that measures the memory usage characteristics of each of the plurality of processing modules, wherein the classification is based on the memory usage characteristics measured by the measurement unit to optimize performance or power consumption of memory . 07-21-aia AIA Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Koziarz et al in view of Yuqian Xiong et al (US 2013061018 A1) . Regarding claim 9, Koziarz et al discloses the image processing apparatus according to claim 1 (see rejection of claim 1). Koziarz fails to explicitly disclose in a case where an error occurs due to a lack of a memory in a case of applying a memory allocator for a multithread mode to the plurality of processing modules, the applying unit applies again a memory allocator for a single thread mode to the plurality of processing modules. Xiong et al, in the same field of endeavor of memory allocation management (¶ [34]), teaches in a case where an error occurs due to a lack of a memory in a case of applying a memory allocator for a multithread mode to the plurality of processing modules, the applying unit applies again a memory allocator for a single thread mode to the plurality of processing modules (¶ [9]). It would have been obvious to one of ordinary skill in the art before the invention was effectively filed for the image processing apparatus as disclosed by Koziarz et al comprising a classification unit which classifies the plurality of processing modules based on the memory usage to utilize the teachings of Xiong et al which teaches in a case where an error occurs due to a lack of a memory in a case of applying a memory allocator for a multithread mode to the plurality of processing modules, the applying unit applies again a memory allocator for a single thread mode to the plurality of processing modules to provide sufficient resources to shorten or eliminate waiting time to access memory . 07-21-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Koziarz et al in view of Takahashi Kentaro (JP 2021060636 A) . Regarding claim 10, Koziarz et al discloses the image processing apparatus according to claim 1 (see rejection of claim 1). Koziarz et al fails to explicitly disclose in a case where a free capacity of the memory is equal to or greater than a predetermined threshold, the applying unit applies a memory allocator for a multithread mode to the plurality of processing modules, and in a case where the free capacity of the memory is smaller than the predetermined threshold, the applying unit applies a memory allocator for a single thread mode to the plurality of processing modules. Kentaro, in the same field of endeavor of memory allocation methods (¶ [1]), teaches in a case where a free capacity of the memory is equal to or greater than a predetermined threshold, the applying unit applies a memory allocator for a multithread mode to the plurality of processing modules (¶ [33-34]), and in a case where the free capacity of the memory is smaller than the predetermined threshold, the applying unit applies a memory allocator for a single thread mode to the plurality of processing modules (¶ [33-34]). It would have been obvious to one of ordinary skill in the art before the invention was effectively filed for the image processing apparatus as disclosed by Koziarz et al comprising a classification unit which classifies the plurality of processing modules based on the memory usage to utilize the teachings of Kentaro which teaches in a case where a free capacity of the memory is equal to or greater than a predetermined threshold, the applying unit applies a memory allocator for a multithread mode to the plurality of processing modules, and in a case where the free capacity of the memory is smaller than the predetermined threshold, the applying unit applies a memory allocator for a single thread mode to the plurality of processing modules so that utilization efficiency of the entire memory space is improved . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 4-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMARES Q WASHINGTON whose telephone number is (571) 270-1585. The examiner can normally be reached Mon-Fri 8:30am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Akwasi M. Sarpong can be reached at (571) 270-3438. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMARES Q WASHINGTON/Primary Examiner, Art Unit 2681 May 26, 2026 Application/Control Number: 18/783,606 Page 2 Art Unit: 2681 Application/Control Number: 18/783,606 Page 3 Art Unit: 2681 Application/Control Number: 18/783,606 Page 4 Art Unit: 2681 Application/Control Number: 18/783,606 Page 5 Art Unit: 2681 Application/Control Number: 18/783,606 Page 6 Art Unit: 2681 Application/Control Number: 18/783,606 Page 7 Art Unit: 2681
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