Prosecution Insights
Last updated: July 17, 2026
Application No. 18/783,607

MEASUREMENT DEVICE AND PTP TIME ERROR INSERTION METHOD THEREOF

Non-Final OA §103
Filed
Jul 25, 2024
Priority
Aug 02, 2023 — JP 2023-126253
Examiner
FOLAYAN, TEMITOPE OLUWASEUN
Art Unit
2414
Tech Center
2400 — Computer Networks
Assignee
Anritsu Corporation
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-58.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
2 currently pending
Career history
1
Total Applications
across all art units

Statute-Specific Performance

§103
100.0%
+60.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-6 are pending in the instant application. Priority Receipt is acknowledged of certified copies of foreign priority document JP 2023-126253, however a translation of said application has not been made of record in accordance with 37 CFR 1.55. Should applicant desire to obtain the benefit of foreign priority under 35 U.S.C. 119(a)-(d), a certified English translation of the foreign application must be submitted in reply to this action. 37 CFR 41.154(b) and 41.202(e). When an English language translation of a non-English language foreign application is required, the translation must be that of the certified copy (of the foreign application as filed) submitted together with a statement that the translation of the certified copy is accurate. See MPEP §§ 215 and 216. Information Disclosure Statement The information disclosure statement (IDS) submitted on 07/25/2024 was filed before the mailing of a First Office Action on the Merits. The information disclosure statement is being considered by the examiner. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f), is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f): (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f), because the claim limitations use generic placeholders that are coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “an Ethernet unit that performs transmission and reception […]; a time generation unit that generates a base time […]; a transmission time error insertion unit that inserts an error […]; and a reception time error insertion unit that inserts [...] an error […]” in claim 1. Because these claim limitations are being interpreted under 35 U.S.C. 112(f), they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f), applicant may: (1) amend the claim limitation(s) to avoid them being interpreted under 35 U.S.C. 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Hiratsuka et al., US 2022/0408390 A1 (hereinafter referred as Hiratsuka) in view of Hoptroff US 2022/0006547 A1, and in further view of Hishi et al., US 2024/0306017 A1 (hereinafter referred as Hishi). Regarding claim 1, Hiratsuka teaches a measurement device that simulates an O-RAN Distributed Unit (O-DU) of an Open-Radio Access Network (O-RAN), the measurement device (¶ 0034, O-RAN distributed unit (O-DU) 110 and an O-RAN radio unit (O-RU) 120) comprising: an Ethernet unit that performs transmission and reception of a packet with an O-RAN Radio Unit (O-RU) via a network conforming to a standard of Ethernet (¶ 0088, the O-RU 120 transmits the FH signal during the transmission window. ¶ 0146, ethernet-based (wired network communication) packet transmission and reception with an O-RU); a time generation unit that generates a base time of the measurement device (¶ 0094, parameters that represent both ends of the transmission window and the reception window are defined. See fig. 8, relationship between delay-related parameters defined in the O-RAN FH specifications and the transmission window and the reception window. Teaching time generation and time management associated with packet transmission and reception). Hiratsuka does not explicitly disclose a transmission time error insertion unit that inserts an error in a time generated by the time generation unit, and notifies the Ethernet unit of the time in which the error is inserted; and a reception time error insertion unit that inserts, in a case where the Ethernet unit receives the packet from the O-RU, an error in a time which is notified by the Ethernet unit and at which the packet is received, wherein the transmission time error insertion unit and the reception time error insertion unit add an error amount while gradually increasing the error amount to a predetermined offset value in a case where an error addition test is performed by setting an offset value, and perform the error addition test in a case where the error amount reaches the predetermined offset value. However, in the same field of endeavor as the claimed invention, Hoptroff teaches a transmission time error insertion unit that inserts an error in a time generated by the time generation unit (¶ 0054, time signal may be sent from the time source node A to the time receiver node B via the direct transmission pathway with one-way transmission error E.sub.AB. ¶ 0058, clock offset can be measured using the PTP or NTP protocol.), and notifies the Ethernet unit of the time in which the error is inserted (¶ 0004, Time information can be disseminated or distributed to computers over the Ethernet using standard protocols. ¶ 0037, With PTP, which provides for... timestamping); and a reception time error insertion unit that inserts, in a case where the Ethernet unit receives the packet from the O-RU (¶ 0058, clock offset can be measured using the PTP or NTP protocol as described in FIG. 1 such as by exchanging timestamps. ¶ 0060, e.g., calculating a clock offset between the arrival time. ¶), an error in a time which is notified by the Ethernet unit and at which the packet is received ((¶ 0004, time information can be disseminated or distributed to computers over the Ethernet using standard protocols. ¶ 0034, packet is received at time receiver B 101, it is timestamped 108 (T.sub.4) as the arrival time. Time server A conveys to the time receiver B the timestamps T.sub.2, T.sub.3 by embedding it in the packet. ¶ 0048, time signal or data packet may be relayed by node C using any suitable network protocols or relayed using multi-hopping techniques … node C may be a device configured or added to the network for estimating the transmission delay in the transmission pathway). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use these above-mentioned features disclosed by Hoptroff with the system disclosed by Hiratsuka, since doing so would have achieved the desirable result of testing/measuring communication time and behavior after timing offsets are applied without causing disruptions to the network. Hiratsuka in view of Hoptroff do not explicitly disclose wherein the transmission time error insertion unit and the reception time error insertion unit add an error amount while gradually increasing the error amount to a predetermined offset value in a case where an error addition test is performed by setting an offset value, and perform the error addition test in a case where the error amount reaches the predetermined offset value. However, in the same field of endeavor as the claimed invention, Hishi teaches wherein the transmission time error insertion unit and the reception time error insertion unit add an error amount while gradually increasing the error amount to a predetermined offset value in a case where an error addition test is performed by setting an offset value (¶ 0027, The transmission unit 12 transmits an alarm signal to the DU apparatus 20… when statistical information regarding the received packet satisfies a predetermined criterion. [Examiner interprets, statistical information to include added error amount which eventually satisfies a predetermined threshold value] ¶ 0028, The statistical information regarding the received packet may be, for example… the number of packets including errors received. ¶ 0030 The RU (reception time error insertion unit included within) apparatus 10 may receive at least one of information indicating a predetermined criterion and information indicating a predetermined threshold value (predetermined offset value) from the DU apparatus), and perform the error addition test in a case where the error amount reaches the predetermined offset value (Id., See ¶ 0083, statistical information … RX_CORRUPT, RX_DUPL, RX_SEQID_ERR, RX_SEQID_ERR_C, or RX_ERR_DROP is used … measuring the number of packets. RX_CORRUPT, RX_DUPL, RX_SEQID_ERR, RX_SEQID_ERR_C, or RX_ERR_DROP is a definition of counters defined in the O-RAN Alliance. ¶ 0089, an abnormality detection method when RX_CORRUPT, RX_DUPL, RX_SEQID_ERR, RX_SEQID_ERR_C, or RX_ERR_DROP is used as the statistical data. In this case, the abnormality detection method may be, for example, to transmit an alarm when a ratio of the number of RX_CORRUPT, RX_DUPL, RX_SEQID_ERR, RX_SEQID_ERR_C, or RX_ERR_DROP to the number of RX_TOTAL exceeds a threshold value. ¶ 0047, O-DU entity 40 executes, for example, processing related to a Radio Link Control (RLC) layer, a Medium Access Control (MAC) layer, and a High-PHY layer. The High-PHY layer is, for example, a layer on which processing related to Forward Error Correction (FEC) encoding, FEC decoding, scrambling, modulating, and demodulating is executed. The processing executed in the O-RU entity 30 and the O-DU entity 40; [Examiner's Note: Error addition tests, for example, diagnose whether networks or specific hardware devices encounter corrupted data packets. Additionally, they use abnormality detection methods that signal when an error ratio exceeds a threshold. These tests assess how equipment detects, logs, or corrects faults, including the use of Forward Error Correction (FEC) algorithms to verify that corrupted packets are successfully corrected, dropped, or ignored]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use these above-mentioned features disclosed by Hishi with the systems disclosed by Hiratsuka and Hoptroff, since doing so would have achieved the desirable result of seamlessly detecting and handling abnormal communications or faults [Hishi: ¶ 0006]. Regarding claim 2, modified Hiratsuka teaches the measurement device according to Claim 1, wherein the transmission time error insertion unit and the reception time error insertion unit increase a predetermined error amount for each predetermined period, and increase the error amount to the offset value (Hoptroff: ¶ 0005, generating an estimated error of time accuracy due to propagation delay in a network… the estimated error of time accuracy may be used as a threshold. ¶ 0070, the time distribution testing can be performed without interrupting the network traffic or service. The time distribution may be tested dynamically without causing service disruption. In some cases, the testing of time distribution over a network may be performed automatically according to a scheduled testing plan. The testing plan may comprise … an action to be performed upon detecting a time error beyond a threshold… the estimated error of time accuracy may be used as the threshold to determine whether time has been distributed correctly, i.e., validating the timing system can successfully tolerate errors and stay synchronized within acceptable limits/boundaries of the clock and validates that failovers trigger correctly). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use these above-mentioned features disclosed by Hoptroff with the system disclosed by Hiratsuka, since doing so would have achieved the desirable result of allowing communication systems and network devices to safely test and calibrate their synchronization limits without causing catastrophic network crashes. Regarding claim 3, modified Hiratsuka teaches the measurement device according to Claim 1, wherein the transmission time error insertion unit and the reception time error insertion unit gradually reduce the error amount from the offset value after the error addition test is terminated (Hishi: ¶ 0061, RX_TOTAL may be indices by which the O-RU entity 30 or the O-DU entity 40 counts the number of packets. The O-RU entity 30 or the O-DU entity 40 may count RX_ON_TIME, RX_ON_TIME_C, RX_EARLY, RX_EARLY_C, RX_LATE, RX_LATE_C, and RX_TOTAL for packets arriving during a predetermined monitoring period. The monitoring period may be a period measured by C/U-plane monitoring period or C/U-plane Monitoring Timer. Furthermore, the monitoring period may be a configured-cu-monitoring-interval. ¶ 0062, packet having a sequence number error or a packet having an error such as a corrupted (corruption) packet. See Fig. 4, packet transmission (i.e., error monitoring period) from t2 to t4, progressive reduction; [Examiner Note: Once the error addition test concludes, both the transmission and reception units progressively decrease their errors from elevated offset values. This gradual reduction continues until normal operating conditions are fully restored (completed)].). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use these above-mentioned features disclosed by Hishi with the system disclosed by Hiratsuka, since doing so would have achieved the desirable result of seamlessly resynchronize clocks and/or timing parameters without abruptly triggering failure alarms, false network disconnections or system resets. Features of claims 4-6 correspond to features of claims 1-3, respectively, and are therefore rejected using the same rationale(s) and same prior art(s) applied to claims 1-3, above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TEMITOPE OLUWASEUN FOLAYAN whose telephone number is (571)270-0630. The examiner can normally be reached Monday - Friday 8 a.m - 5 p.m. ET.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Edan Orgad can be reached at 571-272-7884. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /T.O.F./Examiner, Art Unit 2414 /EDAN ORGAD/Supervisory Patent Examiner, Art Unit 2414
Read full office action

Prosecution Timeline

Jul 25, 2024
Application Filed
Jun 15, 2026
Non-Final Rejection mailed — §103 (current)

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month