Prosecution Insights
Last updated: April 19, 2026
Application No. 18/784,185

SYSTEMS AND METHODS FOR MANAGING POWER CONSUMPTION OF DEVICE SUBSYSTEMS

Non-Final OA §102§103§112§DP
Filed
Jul 25, 2024
Examiner
STOYNOV, STEFAN
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
Meta Platforms Technologies, LLC
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
751 granted / 840 resolved
+34.4% vs TC avg
Moderate +13% lift
Without
With
+13.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
11 currently pending
Career history
851
Total Applications
across all art units

Statute-Specific Performance

§101
7.6%
-32.4% vs TC avg
§103
32.8%
-7.2% vs TC avg
§102
27.7%
-12.3% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 840 resolved cases

Office Action

§102 §103 §112 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-2, 5-12, and 14-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4-7, 9-10, 12-15 and 17-18 of U.S. Patent No. 12,066,882 in view of Yang et al., US Patent Appl. Pub. No. 2017/0300108. Claims 1 and 10 of U.S. Patent No. 12,066,882 disclose all claim limitations of respective claims 1 and 11 in the current Application except the first constraint metric table associated with an application type of a plurality of applications including the first application. Claim 18 of U.S. Patent No. 12,066,882 discloses all claim limitations of claim 20 in the current Application except a plurality of constraint metric tables, the first constraint metric table associated with an application type of a plurality of applications including the first application. Yang teaches plurality of low-power methodologies (plurality of constrained metric tables) associated with plurality of applications APP1-3, each different APP has its corresponding type, wherein any of the applications APP1-3 can be interpreted being the first application (FIG. 2, 20). In Yang, changing to low-power state of individual subsystem according to the software application(s) executed prevents excessive battery drain and increase on the hardware temperature (paragraphs 0003, paragraph 0016, lines 1-8, lines 22-29). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the above described system and functionality, as suggested by Yang with respective claims 1, 10, and 18 of U.S. Patent No. 12,066,882 in order to implement a plurality of constraint metric tables, the first constraint metric table associated with an application type of a plurality of applications including the first application. One of ordinary skill in the art would be motivated to do so in order to prevent excessive battery drain and increase on the hardware temperature. In addition, claim 2 in the current Application is disclosed in claim 1 of U.S. Patent No. 12,066,882, claim 5 is disclosed in claim 4, claim 6 is disclosed in claim 5, claims 7 plus 8 are disclosed in claim 6, claim 9 is disclosed in claim 9, claim 10 is disclosed in claim 7, claim 12 is disclosed in claim 10, claim 14 is disclosed in claim 12, claim 15 is disclosed in claim 13, claims 16 plus 17 are disclosed in claim 14, claim 18 is disclosed in claim 17, and claim 19 is disclosed in claim 15. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 11-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 11 recites the limitation "a plurality of subsystems" in line 10, whereas “a plurality of subsystems” was previously defined in line 2 of the claim. There is insufficient antecedent basis for this limitation in the claim. Claims 12-19, being dependent on claim 11, are rejected based on the same ground of rejection. For the purpose of examination, it is assumed that the above indicated claim element in line 10 reads “the plurality of subsystems”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 3, 5, 7-11, 13-14, and 16-19 is/are rejected under 35 U.S.C. 1029(a)(1) as being anticipated by Yang et al., US Patent Appl. Pub. No. 2017/0300108 (reference submitted by applicant in Information Disclosure Statement [IDS] filed 07/25/2024). Regarding claim 1, Yang discloses a method (FIG(s) 1-2) comprising: detecting, by a device (FIG. 1, 100), an operational parameter of the device (paragraph 0016, lines 1-8); determining, by the device, to operate the device at a reduced power level for a first application (determination to select and apply the respective low-power methodology for the identified high-power consumption subsystem(s) for any of the currently running applications – FIG. 3, paragraph 0020, lines 38-47, FIG. 4A, S402-S414, paragraph 0021, lines 11-14, lines 27-29), based on the operational parameter of the device satisfying a threshold criteria when the device operates at a full power level (during normal operation [full power level], high-power consumption subsystems corresponding to each of the applications currently running are identified based on such subsystem(s) exceeding power consumption threshold – paragraph 0005, lines 1-8, paragraph 0006, lines 1-10, lines 13-16, paragraph 0016, lines 1-3, lines 22-29, lines 33-38, FIG. 4A, S406-S412, paragraph 0021, lines 14-27, paragraph 0022, lines 1-4); and applying, by the device (FIG. 1, 100), a constraint metric responsive to determining to operate at the reduced power level, to cause a subset of a plurality of subsystems of the device to adjust a power consumption level, according to a first constraint metric table (FIG. 2, applying selected low-power methodology for any of the application APP1-3) of a plurality of constraint metric tables (FIG. 1, 126, paragraph 0016, lines 22-29, paragraph 0017, FIG. 2, paragraph 0020), the first constraint metric table associated with an application type of a plurality of applications including the first application (FIG. 2, plurality of applications APP1-3, each different APP having its corresponding type, wherein any of applications APP1-3 can be interpreted being the first application – paragraph 0020). Regarding claim 11, Yang discloses a device (FIG. 1) comprising: a plurality of subsystems (FIG. 1, 108, 110, 114, 116); one or more processors communicably coupled to the plurality of subsystems (FIG, 1, CPU 114, paragraph 0016, lines 22-29), the one or more processors configured to: detect an operational parameter of the device (paragraph 0016, lines 1-8); determine to operate the device at a reduced power level for a first application (determination to select and apply the respective low-power methodology for the identified high-power consumption subsystem(s) for any of the currently running applications – FIG. 3, paragraph 0020, lines 38-47, FIG. 4A, S402-S414, paragraph 0021, lines 11-14, lines 27-29), based on the operational parameter of the device satisfying a threshold criterion when the device operates at a full power level (during normal operation [full power level], high-power consumption subsystems corresponding to each of the applications currently running are identified based on such subsystem(s) exceeding power consumption threshold – paragraph 0005, lines 1-8, paragraph 0006, lines 1-10, lines 13-16, paragraph 0016, lines 1-3, lines 22-29, lines 33-38, FIG. 4A, S406-S412, paragraph 0021, lines 14-27, paragraph 0022, lines 1-4); and apply a constraint metric responsive to determining to operate at the reduced power level, to cause a subset of a plurality of subsystems of the device to adjust a power consumption level, according to a first constraint metric table (FIG. 2, applying selected low-power methodology for any of the application APP1-3) of a plurality of constraint metric tables (FIG. 1, 126, paragraph 0016, lines 22-29, paragraph 0017, FIG. 2, paragraph 0020), the first constraint metric table associated with an application type of a plurality of applications including the first application (FIG. 2, plurality of applications APP1-3, each different APP having its corresponding type, wherein any of applications APP1-3 can be interpreted being the first application – paragraph 0020). Regarding claim 3, Yang further discloses the method, further comprising maintaining, by the device, the plurality of constraint metric tables for applications executable on the device, the plurality of constraint metric tables including the first constraint metric table (FIG. 2, paragraph 0020). Regarding claim 13, Yang further discloses the device, further comprising: memory (FIG. 1, 120) configured to maintain the plurality of constraint metric tables for applications executable on the device, the plurality of constraint metric tables including the first constraint metric table (paragraph 0016, lines 29-35, FIG. 2, paragraph 0020). Regarding claims 5 and 14, Yang further discloses the method and device, further comprising: identifying, by a first subsystem (FIG. 1, CPU 114, paragraph 0015, line 15), the first constraint metric table of the one or more constraint metric tables according to at least one of: the first application or the applied constraint metric (paragraph 0016, lines 22-29); and modifying, by the first subsystem (paragraph 0015, lines 22-29), a power consumption level of the first subsystem, according to a power level specified in the first constraint metric table for the first subsystem (paragraph 0017, lines 1-11, paragraph 0020). Regarding claims 7 and 16, Yang further discloses the method and device, wherein the plurality of constraint metric tables includes the first constraint metric table for applications having a first application type and a second constraint metric table for applications having a second application type (FIG. 2, paragraph 0020). Regarding claims 8 and 17, Yang further discloses the method and device as pre claims 7 and 16, respectively, wherein the first constraint metric table specifies a first subsystem power level for a first subsystem, and the second constraint metric table specifies a second power level for the first subsystem different from the first power level (FIG. 2, paragraph 0020). Regarding claims 9 and 18, Yang further discloses the method and device, wherein the plurality of subsystems comprises at least one of: an audio subsystem, a camera subsystem, a sensor subsystem, a communication subsystem, a display unit subsystem, a central processing unit (CPU) subsystem, or a graphics processing unit (GPU) subsystem (FIG. 1, paragraph 0015, lines 9-18). Regarding claims 10 and 19, Yang further discloses the method and device, wherein the constraint metric causes a first subsystem to adjust a power consumption level of the first subsystem by a first degree, and causes a second subsystem to either bypass adjustment of a power consumption level of the second subsystem or adjust the power consumption level of the second subsystem by a second degree different than the first degree (different current adjustment or no adjustment for respective CPU and CPU subsystems based on each power methodology – FIG. 2, paragraph 0020). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al., US Patent Appl. Pub. No. 2017/0300108. Regarding claim 20, Yang discloses a non-transitory computer readable medium storing instructions that, when executed by one or more processors of a device (FIG. 1, 114, paragraph 0016, lines 22-29), cause the one or more processors to: detect an operational parameter of the device (paragraph 0016, lines 1-8); determine to operate the device at a reduced power level for a first application (determination to select and apply the respective low-power methodology for the identified high-power consumption subsystem(s) for any of the currently running applications – FIG. 3, paragraph 0020, lines 38-47, FIG. 4A, S402-S414, paragraph 0021, lines 11-14, lines 27-29), based on the operational parameter of the device satisfying a threshold criterion when the device operates at a full power level (during normal operation [full power level], high-power consumption subsystems corresponding to each of the applications currently running are identified based on such subsystem(s) exceeding power consumption threshold – paragraph 0005, lines 1-8, paragraph 0006, lines 1-10, lines 13-16, paragraph 0016, lines 1-3, lines 22-29, lines 33-38, FIG. 4A, S406-S412, paragraph 0021, lines 14-27, paragraph 0022, lines 1-4); and apply a constraint metric responsive to determining to operate at the reduced power level, to cause a subset of a plurality of subsystems of the device to adjust a power consumption level, according to a first constraint metric table (FIG. 2, applying selected low-power methodology for any of the application APP1-3) of a plurality of constraint metric tables (FIG. 1, 126, paragraph 0016, lines 22-29, paragraph 0017, FIG. 2, paragraph 0020), the first constraint metric table associated with an application type of a plurality of applications including the first application (FIG. 2, plurality of applications APP1-3, each different APP having its corresponding type, wherein any of applications APP1-3 can be interpreted being the first application – paragraph 0020). Regarding claim 4, Yang discloses the method as per claim 1, wherein applying the constraint metric comprises transmitting, the constraint metric to each of the subsystems of the device (paragraph 0016, lines 22-35).. Yang further discloses the apparatus/device being a computing device (i.e. including an operating system – FIG. 1, paragraph 0014, lines 14-19). With respect to claim 4, Yang does not specifically state transmitting the constraint metric by an operating system. With respect to claim 20, Yang does not specifically state the processor executing an operating system of the device to perform the recited steps for adjusting the power consumption level addressed above. The examiner takes Official notice that implementing power consumption management functionality for computing devices with the operating system is well known in the art. Such functionality provides configuration for computer hardware components to perform power management and status monitoring on the operating system level, thus, simplifying the power management. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implementing the functionality of transmitting the constraint metric by an operating system and the processor executing an operating system of the device to perform the recited steps for adjusting the power consumption level. One of ordinary skill in the art would be motivated to do so in order to simplify the power management. Claim(s) 2 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al., US Patent Appl. Pub. No. 2017/0300108 in view of Ikedea, US Patent No. 5,664,201 (reference submitted by applicant in IDS filed 07/25/2024). Regarding claims 2 and 12 Yang discloses the method and device as per claims 1 and 11, respectively. Yang further discloses wherein the operational parameter comprises at least one of a thermal condition or a power condition of the device (power condition set by respective power thresholds– paragraph 0020). With respect to claims 2 and 12, Yang does not specifically state the operational parameter is determined based on data from one or more sensors of the device. Ikedea teaches a computer system (FIG. 1), wherein the power consumption of the microprocessor (CPU 2) is lowered in response to the signal generated by temperature sensor 10 being higher than predetermined temperature criteria (Abstract, lines 9-11, column 8, lines 33-63). Thus, preventing overheating of the processor (column 8, line 64 – column 9, line 1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the above-described system and functionality, as suggested by Ikedea with the device disclosed by Young in order to implement the operational parameter is determined based on data from one or more sensors of the device. One of ordinary skill in the art would be motivated to do so in order to prevent overheating of the device. Allowable Subject Matter Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and the double patenting rejection, set forth in this Office action is overcome. Claim 15 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, the double patenting rejection set forth in this Office action is overcome, and to include all of the limitations of the base claim and any intervening claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEFAN STOYNOV whose telephone number is (571)272-4236. The examiner can normally be reached 8AM - 4:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEFAN STOYNOV/Primary Examiner, Art Unit 2175
Read full office action

Prosecution Timeline

Jul 25, 2024
Application Filed
Mar 12, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+13.0%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 840 resolved cases by this examiner. Grant probability derived from career allow rate.

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