Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/22/2026 has been entered.
Response to Amendment
The applicant has amended their application as follows:
Amended: 1, 9 and 17
Cancelled: 4, 11 and 13
Added: 22 and 23
Therefore, claims 1-3, 5-10, 12 and 14-23 are currently pending in the instant application.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 7-9, 12, 14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2021/0201793 A1, hereinafter “Lin”) in view of Spence et al. (US 11,568,588 B2, hereinafter “Spence”) and Chang (US 10,964,259 B1: hereinafter “Chang”).
As to claim 1, Lin (Fig. 1) discloses an electronic display (1), comprising:
an electronic display panel (5) comprising a plurality of display pixels (51) configured to display an image frame (Para. 0021); and
display driver circuitry (2) configured to:
program the plurality of display pixels to display the image frame over a series of subframes (Fig. 3) having time quanta finer than a maximum frame rate of the electronic display, wherein the series of subframes comprises:
a programming subframe (Programming part) comprising a first plurality of emission pulses (EM); and
a plurality of non-programming subframes (PWM part with one EM pulse is interpreted to read on each subframe), wherein each non-programming subframe of the plurality of non-programming subframes comprises a second plurality of emission pulses fewer than the first plurality of emission pulses (programming part has two EM pulses; Fig. 5A), and wherein the first plurality of emission pulses and the second plurality of emission pulses vary based on the time quanta.
Lin does not expressly disclose an image frame associated with an arbitrary frame rate that is an integer divisor of a maximum frame rate based on an arbitrary presentation time (APT) scheme;
program the plurality of display pixels to display the image frame over a series of subframes having time quanta finer than the maximum frame rate of the electronic display, wherein the time quanta is based on the arbitrary frame rate.
However, Spence (Fig. 4) teaches an image frame (411, 412, 414) associated with an arbitrary frame rate that is an integer divisor of a maximum frame rate based on an arbitrary presentation time (APT) scheme (Col. 12 lines 23-62; Col. 14 lines 2-12);
program the plurality of display pixels to display the image frame over a series of subframes having time quanta finer than the maximum frame rate of the electronic display, wherein the time quanta is based on the arbitrary frame rate (Fig. 6; Col. 15 lines 1-12, 22-44).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Spence to use a variable frame rate in the device disclosed by Lin. The motivation would have been to reduce the amount of power consumption (Spence; Col. 15 lines 40-44).
And, Chang (Fig. 3) teaches wherein the first plurality of emission pulses and the second plurality of emission pulses vary based on the time quanta (Col. 4 lines 1-29).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Chang to vary number of emission pulse based on the frame rate in the device disclosed by Lin/Spence. The motivation would have been to shift frame rate without changing or causing variation in brightness (Chang; Col. 5 lines 1-2).
As to claim 2, Lin discloses the electronic display of claim 1, wherein every other pulse of the first plurality of emission pulses comprises a reduced emission off pulse (Fig. 3 element EM; first EM off pulse).
As to claim 3, Lin discloses the electronic display of claim 1, wherein every third pulse of the first plurality of emission pulses comprises a reduced emission off pulse (Fig. 3 element EM, EM off pulse during first half of PWM part; first half of PWM part is interpreted to be part of first pulses).
As to claim 7, Lin in view of Shitani disclose the electronic display of claim 1. Furthermore, Shitani teaches wherein the time quanta are equal to a divisor of the maximum frame rate (Para. 0028, 0031, when the frame rate is equal to the maximum frame rate of the display device).
As to claim 8, Li in view of Shitani disclose the electronic display of claim 1. Furthermore, Shitani wherein the time quanta are equal to a multiple of the maximum frame rate (Para. 0029, 0031, when the frame rate of image is 240Hz and the frame rate of the display panel is 60 Hz).
As to claim 9, Lin (Fig. 1) discloses an electronic display (1), comprising:
an electronic display panel (5) comprising a plurality of display pixels (51) configured to display an image frame (Para. 0021); and
display driver circuitry (2) configured to:
program the plurality of display pixels to display the image frame over a series of subframes (Fig. 3) having time quanta higher than a maximum frame rate of the electronic display (Para. , wherein the series of subframes comprises:
a programming subframe (Programming part); and
a plurality of non-programming subframes (PWM part with one EM pulse is interpreted to be a non-programming subframe), wherein each non-programming subframe of the plurality of non-programming subframes (each of EM pulse in PWM part) utilizes fewer anode reset toggles than the programming subframe (one EM toggle for each programming subframe).
Lin does not expressly disclose program the plurality of display pixels to display the image frame over a series of subframes having time quanta based on a maximum frame rate of the electronic display.
However, Spence teaches program the plurality of display pixels to display the image frame over a series of subframes having time quanta based on a maximum frame rate of the electronic display (Fig. 4; Col. 12 lines 23-62).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Spence to use a variable frame rate in the device disclosed by Lin. The motivation would have been to reduce the amount of power consumption (Spence; Col. 15 lines 40-44).
And, Chang (Fig. 4) teaches wherein the anode reset toggles vary based on the time quanta (Emission pulse; (Col. 4 lines 1-29).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Chang to vary number of emission pulse based on the frame rate in the device disclosed by Lin/Spence. The motivation would have been to shift frame rate without changing or causing variation in brightness (Chang; Col. 5 lines 1-2).
As to claim 12, Lin (Fig. 3) discloses the electronic device of claim 9, wherein each of the non-programming subframes is configured to utilize one-half of the anode reset toggles (programming part has two EM toggles and each subframe in PWM part has one EM toggle).
As to claim 14, Lin in view of Spence and Chang disclose the electronic device of claim 9. Furthermore, Spence teaches wherein the display driver circuitry is configured to program the plurality of display pixels to display the image frame over the series of subframes having the time quanta, the time quanta comprising a rate four times finer than the maximum frame rate (Fig. 5 element Frame; Col. 14 lines 25-35, 60hz frame).
As to claim 16, Lin in view of Spence and Chang disclose the electronic device of claim 9. Furthermore, Spence teaches wherein the display driver circuitry is configured to program the plurality of display pixels to display the image frame over the series of subframes having the time quanta finer than the maximum frame rate, the maximum frame rate comprising 240 Hz (Col. 12 lines 31-35).
Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lin, Spence and Chang as applied to claim 1 above, and further in view of Oh et al. (US 2020/0082768 A1, hereinafter “Oh”).
As to claim 5, Lin in view of Spence and Chang does not disclose the electronic display of claim 1, wherein a plurality of randomly selected pulses of the first plurality of emission pulses comprises a reduced emission off pulse.
However, Oh teaches wherein a plurality of randomly selected pulses of the first plurality of emission pulses comprises a reduced emission off pulse (Para. 0108).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Oh to randomly vary the pulses in the device disclosed by Lin/Spence/Chang. The motivation would have been to reduce the flickering (Oh; Para. 0110).
Claim(s) 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lin, Spence, Chang and Oh as applied to claim 5 above, and further in view of Shimazaki (US Patent No. 5,530,561; hereinafter “Shimazaki”).
As to claim 6, Lin in view of Spence, Chang and Oh disclose the electronic display of claim 5. Oh does not disclose wherein the plurality of randomly selected pulses is selected via a weighted random selection.
However, Shimazaki teaches wherein the plurality of randomly selected pulses is selected via a weighted random selection (Col. 2 lines 54-64).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Shimazaki to use random weighted selection in the device disclosed by Lin/Spence/Chang/Oh. The motivation would have been to improve the image quality (Shimazaki; Col. 3 lines 39-42).
Claim(s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lin, Spence and Chang as applied to claim 9 above, and further in view of Sang et al. (US 2024/0161705 A1, hereinafter “Sang”).
As to claim 10, Lin in view of Spence and Chang does not disclose the electronic device of claim 9, wherein each of the non-programming subframes is configured to utilize fewer emission toggles than the programming subframe.
However, Sang (Fig. 8) teaches wherein each of the non-programming subframes is configured to utilize fewer emission toggles (EM in section 2) than the programming subframe. (EM pulses in section 1; Para. 0102).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Sang to adjust emission pulses/anode reset pulses in the device disclosed by Lin/Spence/Chang. The motivation would have been to minimize the flickering (Sang; Para. 0104).
Claim(s) 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lin, Spence and Chang as applied to claim 9 above, and further in view of Kim et al. (US 2012/0249604 A1, hereinafter “Kim”).
As to claim 15, Lin in view of Spence does not disclose the electronic device of claim 9, wherein the display driver circuitry is configured to program the plurality of display pixels to display the image frame over the series of subframes having the time quanta, the time quanta comprising a rate of 960 Hertz.
However, Kim teaches wherein the display driver circuitry is configured to program the plurality of display pixels to display the image frame over the series of subframes having the time quanta, the time quanta comprising a rate of 960 Hertz (Para. 0051).
It would have been obvious to one of ordinary skill in the art to combine the teaching of Kim to display image at higher frame rate in the device disclosed by Lin/Spence/Chang. The motivation would have been to display high resolution image.
Allowable Subject Matter
Claims 17-21 are allowed.
Claims 22-23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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BIPIN GYAWALI
Primary Examiner
Art Unit 2625
/BIPIN GYAWALI/Primary Examiner, Art Unit 2625
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