DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 9, 11, 13, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication No. 20110320858 (“Koktan”) in view of US Patent Application Publication No. 20190196816 (“Bajaj”) and US Patent Application Publication No. 20200133761 (“Paruthi”).
Regarding claim 1, Koktan teaches
A processor configured to: ([0002], [0031], [0032]: software executed by a parallel processor)
initiate a status check of wavefronts being executed by a plurality of compute units…of an accelerated processing unit; and (Fig. 2, [0002], [0003], [0027]: check the microcode program counter of a timed-out thread of multiple threads executing on a parallel processor)
responsive to the status check indicating a hang,…selectively extract data…of one or more compute units of the plurality of compute units based on the one or more compute units being associated with the hang. (Fig. 2, [0028], [0029]: if the microcode program counter indicates the timed-out thread is locked up, dump crash debug information for the timed-out thread)
Koktan does not teach the remaining limitations.
Bajaj teaches
a plurality of compute units in a processing pipeline ([0036]: stalled thread of multiple threads in a processing pipeline)
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine Bajaj’s processing pipeline with Koktan’s processor.
One of ordinary skill in the art prior to the effective filing date would have been motivated to make the combination to improving processing performance (Bajaj, [0004], [0005]).
Koktan in view of Bajaj does not teach the remaining limitations.
Paruthi teaches
responsive to…a [crash], employ a machine learning algorithm to selectively extract data from one or more registers of one or more compute units of the plurality of compute units based on the one or more compute units being associated with the hang ([0002], [0019], [0023], [0034], [0035], [0051]: after a processor error that causes a crash of a multi-processor system, use machine learning to determine which core registers to collect dumps)
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine Paruthi’s dump collection with Koktan in view of Bajaj’s dump collection.
One of ordinary skill in the art prior to the effective filing date would have been motivated to make the combination to reduce the amount of data collected during a dump operation and reduce the amount of time that it takes to perform a dump operation (Paruthi, [0020]).
Regarding claim 2, Koktan in view of Bajaj and Paruthi further teaches
wherein the one or more registers are local to the one or more compute units. (Paruthi, [0002], [0019], [0023]: collect dumps from registers of cores)
Regarding claim 3, Koktan in view of Bajaj and Paruthi further teaches
export the data from the accelerated processing unit prior to a reset of the accelerated processing unit being triggered. (Koktan, Fig. 2, [0029]: dump crash debug information for the timed-out thread prior to reset of the parallel processor)
Regarding claim 9, Koktan in view of Bajaj and Paruthi further teaches
the status check comprises sampling an output of the accelerated processing unit over a period of time (Koktan, Fig. 2, [0027]: sample the microcode program counter over a period of time)
Regarding claim 11, Koktan in view of Bajaj and Paruthi teaches
A processing system comprising: (Koktan, [0002], [0031], [0032]: software executed by a parallel processor)
a driver; (Koktan, [0002], [0031], [0032]: software executed by a parallel processor)
and an accelerated processing unit comprising a processor configured to: (Koktan, [0002], [0031], [0032]: parallel processor)
initiate a status check of wavefronts being executed by a plurality of compute units in a processing pipeline of the accelerated processing unit responsive to receiving a status inquiry from the driver; (Koktan, Fig. 2, [0002], [0003], [0027]: check the microcode program counter of a timed-out thread of multiple threads executing on a parallel processor; Bajaj, [0036]: stalled thread of multiple threads in a processing pipeline)
responsive to the status check indicating a hang, employ a machine learning algorithm to selectively extract data from one or more registers of one or more compute units of the plurality of compute units based on the one or more compute units being associated with the hang; and (Koktan, Fig. 2, [0028], [0029]: if the microcode program counter indicates the timed-out thread is locked up, dump crash debug information for the timed-out thread. Paruthi, [0002], [0019], [0023], [0034], [0035], [0051]: after a processor error that causes a crash of a multi-processor system, use machine learning to determine which core registers to collect dumps)
export the data from the accelerated processing unit. (Koktan, Fig. 2, [0029]: dump crash debug information for the timed-out thread)
Regarding claim 13, Koktan in view of Bajaj and Paruthi teaches
the accelerated processing unit configured to export the data from the accelerated processing unit to the driver prior to the driver initiating a reset of the accelerated processing unit. (Koktan, Fig. 2, [0002], [0029], [0031], [0032]: software causes a dump of crash debug information for the timed-out thread prior to reset of the parallel processor)
Claim(s) 19, the method(s) implemented by the processor(s) of claim(s) 1, respectively, is/are rejected on the same grounds as claim(s) 1, respectively.
Claim(s) 10, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication No. 20110320858 (“Koktan”) in view of US Patent Application Publication No. 20190196816 (“Bajaj”), US Patent Application Publication No. 20200133761 (“Paruthi”) and US Patent Application Publication No. 20160378587 (“Zhang”).
Regarding claim 10, Koktan in view of Bajaj and Paruthi further teaches
initiate the status check responsive to receiving a status inquiry from a driver associated with the accelerated processing unit in response to a timer expiring (Koktan, Fig. 2, [0002], [0025], [0027], [0031], [0032]:, software checks the microcode program counter when the thread times out)
Koktan in view of Bajaj and Paruthi does not further teach the remaining limitations.
Zhang teaches
the timer triggered based on a last receipt of data by the driver from the…processing unit. ([0018], [0041]: software hang detector resets a hang timer based on a heartbeat from a thread)
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine Zhang’s hang detection with Koktan in view of Bajaj and Paruthi’s hang detection.
One of ordinary skill in the art prior to the effective filing date would have been motivated to make the combination to enhance scalability and reliability of unresponsiveness detection (Zhang, [0031]).
Regarding claim 12, Koktan in view of Bajaj, Paruthi and Jeong further teaches
initiate a timer based on a last receipt of data from the accelerated processing unit; and (Zhang, [0018], [0041]: software hang detector resets a hang timer based on a heartbeat from a thread. Koktan, [0002]: parallel processor)
send the status inquiry to the accelerated processing unit responsive to the timer expiring. (Koktan, Fig. 2, [0002], [0025], [0027], [0031], [0032]:, software checks the microcode program counter when the thread times out)
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication No. 20110320858 (“Koktan”) in view of US Patent Application Publication No. 20190196816 (“Bajaj”), US Patent Application Publication No. 20200133761 (“Paruthi”) and US Patent Application Publication No. 20060075276 (“Kataria”).
Regarding claim 18, Koktan in view of Bajaj and Paruthi does not further teach the remaining limitations.
Kataria teaches
the driver configured to be updated based on the data exported from the accelerated processing unit. (Fig. 1, [0016], [0056], [0058], [0065]: Firmware portion 120 of firmware 110 determines that firmware portion 130 of firmware 110 is corrupted and caused a hang. Firmware portion 120 sends a message containing parameters identifying corrupted portions of firmware portion 130, and firmware portions 120 and 130 are updated)
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine Kataria’s hang remediation with Koktan in view of Bajaj and Paruthi’s hang detection.
One of ordinary skill in the art prior to the effective filing date would have been motivated to make the combination to ensure proper configuration of software that interacts with hardware (Kataria, [0004], [0005]).
Allowable Subject Matter
Claim(s) 4-8, 14-17, 20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
None of the prior art of record, either alone or when combined, teaches or suggests wherein selectively extracting the data from the one or more registers comprises: identifying the one or more compute units of the plurality of compute units in the processing pipeline of the accelerated processing unit responsible for the hang; and extracting data the one or more registers of the one or more compute units from as recited in claim(s) 4, 14, 20.
Response to Arguments
Applicant's arguments, see pg. 6, with respect to the allowable subject matter of claim(s) 4-8, 14-17, 20 have been fully considered but they are not persuasive.
On pg. 6, Applicant argues:
“The Applicant notes with appreciation the indication at page 7 of the Office Action that claims 4-8, 14-17, and 20 would be allowable if rewritten in independent form. Without acquiescing to the propriety of the rejection and in the interest of advancing prosecution, the Applicant has amended independent claims 1, 11, and 19 to include subject matter taken from claims 4, 14, and 20, respectively. Accordingly, the claims are thought to be in condition for allowance. In the interest of completeness, the following remarks are submitted herewith.”
The Examiner respectfully disagrees. Independent claims 1, 11, and 19 do not include all allowable subject matter from previously presented claims 4, 14, and 20, which disclosed wherein selectively extracting the data from the one or more registers comprises: identifying one or more compute units in a processing pipeline of the accelerated processing unit responsible for the hang and extracting data from at least one register of the one or more compute units [identified as responsible for the hang] in the processing pipeline of the accelerated processing unit. Independent claims 1, 11, and 19 only discloses selectively extracting data from one or more registers of one or more compute units of the plurality of compute units based on the one or more compute units being associated with the hang. One or more compute units being associated with the hang is not limited to identifying one or more compute units responsible for the hang.
Applicant’s arguments, see 6-8, filed 12/30/2025, with respect to the prior art rejection(s) of claim(s) 1-3, 9-13, 18-19 have been fully considered and are persuasive because the amendments have altered the scope of the claims. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of previously cited prior art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/A.L./Examiner, Art Unit 2113
/MARC DUNCAN/Primary Examiner, Art Unit 2113