Prosecution Insights
Last updated: October 02, 2026
Application No. 18/785,253

MANAGING LEVELS OF TRUST FOR COMPONENTS OF DATA PROCESSING SYSTEMS

Final Rejection §102
Filed
Jul 26, 2024
Examiner
LOPEZ, MIGUEL ALEXANDER
Art Unit
2496
Tech Center
2400 — Computer Networks
Assignee
Dell Products L.P.
OA Round
2 (Final)
6%
Grant Probability
At Risk
3-4
OA Rounds
1y 0m
Est. Remaining
16%
With Interview

Examiner Intelligence

Grants only 6% of cases
6%
Career Allowance Rate
2 granted / 33 resolved
-51.9% vs TC avg
Moderate +10% lift
Without
With
+10.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
22 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
35.3%
-4.7% vs TC avg
§102
23.2%
-16.8% vs TC avg
§112
33.3%
-6.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 33 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see page 11, filed 07/14/2026, with respect to the objection to the abstract have been fully considered. The objection to the abstract has been withdrawn in response to Applicant’s filed substitute abstract. Applicant’s arguments, see page 11, filed 07/14/2026, with respect to the rejection of claims 4-8, 13-15, and 19-20 under 35 U.S.C. § 112(b) have been fully considered. The rejection of claims 4, 13, and 19 has been withdrawn in light of Applicant adopting the Examiner’s suggestion to correct the antecedent basis issue. The previous rejection of claims 5-8, 14-15, and 20 have been withdrawn in response to Applicant’s amendment. Applicant's arguments, see pages 12-13, filed 07/14/2026, with respect to the previous rejection of claims 1-20 under 35 U.S.C. § 102(a)(1) have been fully considered but they are not persuasive. Applicant first argues that the previously alleged Shroff reference is allegedly “silent with regard to the trust anchor 110 being a separate and independently operating computing device that is physically installed within the system 100” and “Rather, the disclosure of Shroff appears to suggest that the trust anchor 11 is merely software (e.g., a software agent, or the like). See Shroff at para. FIG. 4 and para. [0057] (which explicitly discloses that "any of product 105, trust anchor 110, ASIC 120, entity 140, or components of any of the preceding, may be implemented using a computer system 400 or one or more components of computer system 40" (emphasis added))”. The Examiner respectfully disagrees. The Examiner respectfully submits that the Shroff reference is not particularly limited to the singular embodiment of software as disclosed, the relied upon paragraph does not limit the entire disclosure of Shroff reference to merely software, and there is no suggestion to be found in the reference meant to limit the entire disclosure to comprise merely software as Applicant alleges. See paragraphs [0058-0059] of Shroff “This disclosure contemplates any suitable number of computer systems 400. This disclosure contemplates computer system 400 taking any suitable physical form. As example and not by way of limitation, computer system 400 may be an embedded computer system, a system-on-chip (SOC), a single-board computer system (SBC) (such as, for example, a computer-on-module (COM) or system-on-module (SOM)), a desktop computer system, a laptop or notebook computer system, an interactive kiosk, a mainframe, a mesh of computer systems, a mobile telephone, a personal digital assistant (PDA), a server, a tablet computer system, an augmented/virtual reality device, or a combination of two or more of these. Where appropriate, computer system 400 may include one or more computer systems 400; be unitary or distributed; span multiple locations; span multiple machines; span multiple data centers; or reside in a cloud, which may include one or more cloud components in one or more networks. Where appropriate, one or more computer systems 400 may perform without substantial spatial or temporal limitation one or more steps of one or more methods described or illustrated herein... In particular embodiments, computer system 400 includes processing circuitry (e.g., processor 402), memory 404, storage 406, an input/output (I/O) interface 408, a communication interface 410, and a bus 412. Although this disclosure describes and illustrates a particular computer system having a particular number of particular components in a particular arrangement, this disclosure contemplates any suitable computer system having any suitable number of any suitable components in any suitable arrangement”. Applicant lastly argues that new claim 21 contains limitations that are neither disclosed nor suggested by Shroff. The Examiner respectfully disagrees. Since applicant does not give any further explanation as to how the previously cited art differentiates from the claimed invention, the examiner defers to the rejection below as a response to this argument. Therefore, the rejection of the claims under 35 U.S.C. § 102(a)(1) will be maintained. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-19 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shroff et. al. (US Publication No. US 2022/0382866 A1) hereinafter Shroff. Regarding Claims 1, 10, and 16: Claim 10. Shroff discloses a non-transitory machine-readable medium having instructions stored therein, which when executed by a first processor, cause the first processor to perform operations for managing operation of a data processing system, the operations comprising (Shroff [0011], [0068]): by a management controller of the data processing system that is physically installed within the data processing system (product 105) as a separate and independently operating computing device from the data processing system (Shroff Figure 1 Trust anchor 110 manages and is separate from hardware resources (ASICs); [0025-0026]; [0057], any of product 105, trust anchor 110, ASIC 120, entity 140, or components of any of the preceding, may be implemented using a computer system 400 or one or more components of computer system 400. [0058-0060] “This disclosure contemplates computer system 400 taking any suitable physical form”; claim 1 one or more processors anticipated): making an identification that a channel card of the data processing system has attempted an interaction with a hardware component of hardware resources of the data processing system (Shroff [0043] trigger posture assessment), the hardware resources comprising a second processor of the data processing system that hosts an operating system of the data processing system, the management controller comprises the first processor, and the first processor being separate and independently operating from the second processor (Shroff Figure 1 Trust anchor manages and is separate from hardware resources (ASICs); [0025-0026]; [0043] “Method 200 may proceed to step 204 with determining to perform a posture assessment (at trust anchor 110) in order to determine whether the hardware component is authorized to run on product 105. For example, trust anchor 110 determines to perform the posture assessment in response to booting of product 105, receiving a demand from an operating system of product 105, or receiving a demand from a cloud-based HSM associated with the manufacturer of product 105. In this manner, the posture assessment may be repeated between trust anchor 110 and the hardware component (e.g., each boot time or whenever OS or the HSM determines to demand a posture assessment). Thus, aftermarket changes to hardware components running on product 105 can be detected, which may increase security of product 105 compared to other solutions that only verify hardware components when first provisioning a product”; [0058-0060] “This disclosure contemplates computer system 400 taking any suitable physical form”; claim 1 one or more processors anticipated); in response to the identification: obtaining, using a channel card trust table, a level of trust for the channel card (Shroff [0047] “In certain embodiments, the content of the response comprises information associated with the hardware component, such a serial number or ECID of the hardware component and/or a product identifier of a product 105 for which the hardware component has been provisioned. A serial number (or ECID) received in the response can be verified by comparing it to a list of serial numbers (or ECIDs) authorized for product 105 to determine if there is a match. A product identifier received in the response can be verified by comparing it to the product ID of product 105 (the product that the hardware component is currently configured on) to determine if there is a match.”), the level of trust being based on a type of the channel card and is assigned by the management controller of the data processing system (Shroff [0039-0041] manufacturer may configure the HSM with information about ASICs that are authorized to run “if a customer adds a daughter card to product 105 that was legitimately acquired from the manufacturer, when product 105 boots with the daughter card, trust anchor 110 would detect that the daughter card was not part of the previous inventory of product 105. Trust anchor 110 may then communicate with HSM to confirm that the manufacturer has authorized the daughter card for product 105 and to obtain the LTKs necessary to perform a posture assessment of ASICs 120 running on the daughter card”; [0070-0071] schema may be used); making a determination, based on the level of trust, regarding whether the channel card is authorized to interact with the hardware component (Shroff [0043] determines whether the hardware component is authorized to run); in a first instance of the determination in which the channel card is authorized to interact with the hardware component: allowing the attempted interaction to occur, wherein the interaction facilitates provisioning of a computer implemented service (Shroff [0046] authorized to run, [0048]); and in a second instance of the determination in which the channel card is not authorized to interact with the hardware component: denying the attempted interaction (Shroff [0045] not authorized to run, [0049]). Independent claims 1 and 16 recite substantially the same content and are therefore rejected by the same rationales. Shroff further discloses a method for managing operation of a data processing system (Shroff [0010] method disclosed) and A data processing system, comprising: a first processor that hosts an operating system of the data processing system; and a memory coupled to the first processor; a management controller comprising a second processor coupled to second memory, the second memory storing instructions, which when executed by the processor, cause the processor to perform operations, the operations comprising (Shroff [0011-0012], [0058-0060] “This disclosure contemplates computer system 400 taking any suitable physical form”; claim 1 one or more processors anticipated). Regarding Claims 2, 11, and 17: Claim 11. Shroff further discloses the non-transitory machine-readable medium of claim 10, wherein the operations further comprise (Shroff [0011], [0068]): prior to making the identification: typifying, by the management controller of the data processing system, the channel card to obtain the type of the channel card (Shroff [0023], [0037] trust anchor may analyze a subset “that the manufacturer considers important to verify based on vulnerability of ASIC 120 to gray market modifications”; [0040] manufacturer-approved modification is plugged in, and trust anchor sees it at boot time; [0089]); assigning, by the management controller and based on the type of the channel card and a schema for assigning levels of trust, the level of trust for the channel card (Shroff [0070-0071] schema may be used); populating, by the management controller and using the level of trust, the channel card trust table, the channel card trust table indicating levels of trust for each channel card of the data processing system (Shroff [0051] may inventory the trust of the ASICs); providing, by the management controller, the channel card trust table to a basic input/output system (BIOS) of the data processing system (Shroff [0029-0036] trust assessments available at boot time); and publishing, by the BIOS, the channel card trust table during a startup procedure for the data processing system so that the channel card trust table is usable by the operating system of the data processing system during operation of the data processing system (Shroff [0029-0036] trust assessments available at boot time, [0043]). Dependent claims 2 and 17 recite substantially the same content and are therefore rejected by the same rationales. Regarding Claims 3, 12, and 18: Claim 12. Shroff further discloses the non-transitory machine-readable medium of claim 10 (Shroff [0011], [0068]), wherein the type of the channel card comprises one selected from a list consisting of: a first type of channel card that is constructed by a manufacturer of the data processing system (Shroff [0089] “In certain embodiments, the manufacturer may be an entity that handles the physical manufacture of product 105.”); a second type of channel card that authorized by the manufacturer but is not constructed by the manufacturer (Shroff [0040] manufacturer-approved modifications; [0089] “In certain embodiments, the manufacturer may be a developer/owner of a product line that grants another entity permission to handle the physical manufacture of product 105”); and a third type of channel card that is not authorized by the manufacturer (Shroff [0023] gray market and unauthorized third party ASICs contemplated; [0083] “Trust anchor 110 determines that the hardware component is not authorized to run on product 105 based at least in part on the identifier received in step 608 failing to match one of the authorized identifiers”). Dependent claims 3 and 18 recite substantially the same content and are therefore rejected by the same rationales. Regarding Claims 4, 13, and 19: Claim 13. Shroff further discloses the non-transitory machine-readable medium of claim 12 (Shroff [0011], [0068]), wherein the channel card trust table comprises a list of channel cards of the data processing system and levels of trust for each channel card of the list of the channel cards (Shroff [0051] may inventory the trust of the ASICs), the levels of trust indicating different degrees of authorization for accessing the hardware resources, and the channel card being one channel card of the list of channel cards (Shroff [0051] may inventory the trust of the ASICs; [0015] schema may indicate the functionality that the hardware component is authorized to enable; [0069-0070] schema may be used to indicate the amount of functionality allowed). Dependent claims 4 and 19 recite substantially the same content and are therefore rejected by the same rationales. Regarding Claims 5 and 14: Claim 14. Shroff further discloses the non-transitory machine-readable medium of claim 13 (Shroff [0011], [0068]), wherein the levels of trust for each channel card of the list of channel cards are based on associations between different types of channel cards and different levels of trust (Shroff [0051] may inventory the trust of the ASICs; [0015] schema may indicate the functionality that the hardware component is authorized to enable; [0069-0071] schema may be used to indicate the amount of functionality allowed; [0075]). Dependent claim 5 recites substantially the same content and is therefore rejected by the same rationales. Regarding Claims 6 and 15: Claim 15. Shroff further discloses the non-transitory machine-readable medium of claim 13 (Shroff [0011], [0068]), wherein the first type of channel card has a higher degree of authorization for accessing the hardware resources than the second type of the channel card (Shroff [0069-0071] schema may be used to indicate the amount of functionality allowed). Dependent claims 6 recites substantially the same content and is therefore rejected by the same rationales. Regarding Claim 7: Shroff further discloses the method of claim 6 (Shroff [0010] method), wherein the first type of channel card has a first degree of authorization for accessing the hardware resources that allows activation of all functions of the hardware resources (Shroff [0046] authorized to run, [0048]; [0069-0071] schema may be used to indicate the amount of functionality allowed), the second type of channel card has a second degree of authorization for accessing the hardware resources that allows activation of a portion of functions of a portion of the hardware resources (Shroff [0046] authorized to run, [0048]; [0069-0071] schema may be used to indicate the amount of functionality allowed), and the third type of channel card has a third degree of authorization for accessing the hardware resources that allows no activation of functions of the hardware resources (Shroff [0045] not authorized to run, [0049]; [0069-0071] schema may be used to indicate the amount of functionality allowed). Regarding Claim 8: Shroff further discloses the method of claim 4 (Shroff [0010] method), wherein the levels of trust are provided by the management controller to a basic input/output system (BIOS) of the data processing system prior to a startup procedure for the data processing system (Shroff [0029-0036] trust assessments available at boot time, [0071] “Prior to receiving the schema, functionality of the hardware component is disabled”). Regarding Claim 9: Shroff further discloses the method of claim 2 (Shroff [0010] method), wherein the management controller is a system on a chip that is tasked with managing operation of the hardware resources and the channel cards (Shroff Figure 1 Trust anchor manages and is separate from hardware resources (ASICs); [0025-0026]; [0058] system0on-chip explicitly anticipated). Regarding Claim 21: Shroff discloses the method of claim 1 (Shroff [0010] method disclosed), wherein the data processing system further comprises a network module adapted to separately advertise network endpoints for the management controller and the hardware resources (Shroff [0026] “In certain embodiments, system 100 further comprises network 130 and entity 140. Network 130 generally represents any suitable network that facilitates communication between components of system 100, such as communication between product 105 and entity 140. Entity 140 may be external to product 105”, [0065] network interface controller or network adapter explicitly disclosed), the network endpoints being usable by systems remote to the data processing system to address network communications to the hardware resources and the management controller (Shroff [0026] “In certain embodiments, system 100 further comprises network 130 and entity 140. Network 130 generally represents any suitable network that facilitates communication between components of system 100, such as communication between product 105 and entity 140. Entity 140 may be external to product 105”, [0065] “In particular embodiments, communication interface 410 includes hardware, software, or both providing one or more interfaces for communication (such as, for example, packet-based communication) between computer system 400 and one or more other computer systems 400 or one or more networks”). Conclusion The prior art made of record in the submitted PTO-892 Notice of References Cited and not relied upon is considered pertinent to applicant’s disclosure. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MIGUEL A LOPEZ whose telephone number is (703)756-1241. The examiner can normally be reached 8:00AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jorge Ortiz-Criado can be reached on 5712727624. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /M.A.L./ Examiner, Art Unit 2496 /JORGE L ORTIZ CRIADO/ Supervisory Patent Examiner, Art Unit 2496
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Prosecution Timeline

Jul 26, 2024
Application Filed
Apr 24, 2026
Non-Final Rejection mailed — §102
Jul 14, 2026
Response Filed
Sep 24, 2026
Final Rejection mailed — §102 (current)

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Prosecution Projections

3-4
Expected OA Rounds
6%
Grant Probability
16%
With Interview (+10.0%)
3y 3m (~1y 0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 33 resolved cases by this examiner. Grant probability derived from career allowance rate.

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