DETAILED ACTION
Preliminary Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). The certified copy has been filed in the pending application.
Specification
The title of the invention is not descriptive as it solely indicates a very generic, “Data Processing Systems.” A new title is required that is clearly indicative of the invention to which the claims are directed.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: #200 of Figure 4. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10, 13, 16-18 and 21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In reference to claims 1 and 21, these claims comprise the limitation of, “allocating different regions of the render output to different ones of the rendering processors…” (see for example lines 5-6 of claim 1) of which the Examiner deems is indefinite for failing to particularly point out and distinctly claim that which Applicant regards as the invention. In particular, the Examiner questions the phrase “different ones of the rendering processors” and states that this is in effect a relative term as here is no “measure” or “indication” as to compare a “processor” of “processors” such that it can be equivalent to a “different one.” In other words, the term “different ones” in the context of the “processors” is deemed indefinite as it fails to particularly point out and distinctly establish that which Applicant regards as the invention. Note, claims 2-10 depend upon claim 1 and are therefore at least inherently included in this rejection however, claims 3 and 6 also explicitly comprise such language. Lastly, the Examiner notes that without proper clarity in the claim language in view of the above a proper prior art search cannot be fully realized. The Examiner will do his best to conduct a prior art search taking the claim language in its current form.
In reference to claim 13, these claims comprise the limitation of, “initially allocate tiles of the render output to different ones of the rendering processors …” (see for example lines 3-4 of claim 13) of which the Examiner deems is indefinite for failing to particularly point out and distinctly claim that which Applicant regards as the invention. In particular, the Examiner questions the phrase “different ones of the rendering processors” and states that this is in effect a relative term as here is no “measure” or “indication” as to compare a “processor” of “processors” such that it can be equivalent to a “different one.” In other words, the term “different ones” in the context of the “processors” is deemed indefinite as it fails to particularly point out and distinctly establish that which Applicant regards as the invention.
In reference to claim 16, these claims comprise the limitation of, “allocate different regions of the render output to different ones of the rendering processors…” (see for example lines 8-10 of claim 16) of which the Examiner deems is indefinite for failing to particularly point out and distinctly claim that which Applicant regards as the invention. In particular, the Examiner questions the phrase “different ones of the rendering processors” and states that this is in effect a relative term as here is no “measure” or “indication” as to compare a “processor” of “processors” such that it can be equivalent to a “different one.” In other words, the term “different ones” in the context of the “processors” is deemed indefinite as it fails to particularly point out and distinctly establish that which Applicant regards as the invention. Note, claims 17-18 depend upon claim 16 and are therefore at least inherently included in this rejection.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 9-12, 14 and 19-21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Broadhurst et al. (U.S. Patent 10,387,990).
In reference to claim 1, Broadhurst et al. discloses a method of operating a tile-based graphics processor that comprises plural rendering processors each operable to render rendering tiles that a render output is divided into for rendering purposes (see column 3, lines 34-60 and Figures 3-4 and 9 wherein Broadhurst et al. discloses a graphics processing unit and method for processing graphics data using a rendering space which is sub-divided into a plurality of tiles, the processing unit comprising one or more processing cores to process the graphics data while further configured to obtain a cost indication for each of a plurality of sets of one or more tiles and depending upon such cost, subdividing at least the one or more tiles to form a plurality of subtills to assign to such cores for rendering.), the method comprising:
when rendering a render output: allocating different regions of the render output to different ones of the rendering processors for processing; and each rendering processor processing the region or regions allocated to it to generate rendered data for the region or regions (see column 11, lines 21-35, column 12, lines 11-46, column 16, lines 12-33, column 24, lines 33-40, #S402-404, 410 of Figure 4 and Figure 9 wherein Broadhurst et al. discloses the graphics processing method compiling shader programs that operate upon primitives provided by an application for rendering. Broadhurst et al. further discloses the primitives presented in a set of tiles of the rendering space. Broadhurst et al. discloses assigning, via a scheduling logic, which tiles are processed for rendering by which processing cores based upon the above mentioned cost indications.);
the method further comprising: tracking the processing of the render output to determine when a portion of the render output that is still to be allocated to the rendering processors for processing falls below a threshold (see column 23, lines 14-23, columns 23-24, lines 57-32, column 24, lines 51-64, column 25, lines 1-37, Figure 8A, #906-914 of Figure 9 wherein Broadhurst et al. discloses dealing with the complexities of processing tiles taking into consideration the tile size, the number of processing cores, idle times, etc. Broadhurst et al. discloses one method involving subdividing tiles into smaller tiles near the end of a render and further only subdividing those tiles near the end of a render that meet certain criteria. Broadhurst et al. discloses that such a decision can be made in part, upon a threshold number of tile, a metric based off of the cost indications, a combination thereof, or some other criteria. Broadhurst et al. explicitly discloses subdividing tiles according to a metric according to the number of tiles of the current render that are still to be rendered being less or lower.); and
when it is determined that a portion of the render output that is still to be allocated to the rendering processors for processing falls below the threshold: thereafter allocating smaller regions of the render output to the rendering processors for processing (see column 23, lines 14-23, columns 23-24, lines 57-32, column 24, lines 51-64, column 25, lines 1-37, columns 26-27, lines 67-29, #906-916 of Figure 9 wherein Broadhurst et al. discloses one method involving subdividing tiles into smaller tiles near the end of a render and further only subdividing those tiles near the end of a render that meet certain criteria. Broadhurst et al. discloses that such a decision can be made in part, upon a threshold number of tile, a metric based off of the cost indications, a combination thereof, or some other criteria. Broadhurst et al. explicitly discloses subdividing tiles according to a metric according to the number of tiles of the current render that are still to be rendered being less or lower. Broadhurst et al. then discloses assigning the tiles and subdivided tiles to processing cores and rendering the graphics data of the tiles and subdivided tiles using such cores.).
In reference to claims 2 and 12, Broadhurst et al. discloses all of the claim limitations as applied to claims 1 and 11 respectively above. Broadhurst et al. discloses one method involving subdividing tiles into smaller tiles near the end of a render and further only subdividing those tiles near the end of a render that meet certain criteria (see column 25, lines 1-37, Figure 8A, #906-914 of Figure 9).
In reference to claims 4 and 14, Broadhurst et al. discloses all of the claim limitations as applied to claims 2 and 12 respectively above. Broadhurst et al. discloses the graphics processing method compiling shader programs that operate upon primitives provided by an application for rendering (see column 11, lines 21-35). Broadhurst et al. explicitly discloses the tiling unit determining which primitives are present within each of the tiles of the rendering space (see column 12, lines 20-22 and #S404 of Figure 4). Broadhurst et al. discloses the primitives to include primitive fragments to be rendered using rasterization techniques (see column 2, lines 10-52 and columns 17-18, lines 66-4). Broadhurst et al. discloses assigning the tiles and subdivided tiles to processing cores and rendering the graphics data of the tiles and subdivided tiles using such cores (see columns 26-27, lines 67-29 and #906-916 of Figure 9).
In reference to claims 9 and 19, Broadhurst et al. discloses all of the claim limitations as applied to claims 1 and 11 respectively above. Broadhurst et al. discloses one method involving subdividing tiles into smaller tiles near the end of a render and further only subdividing those tiles near the end of a render that meet certain criteria (see columns 23-24, lines 57-32). Broadhurst et al. explicitly discloses subdividing tiles according to a metric according to the number of tiles of the current render that are still to be rendered being less or lower (see column 25, lines 1-37).
In reference to claims 10 and 20, Broadhurst et al. discloses all of the claim limitations as applied to claims 1 and 11 respectively above. Broadhurst et al. explicitly discloses determining which tiles to subdivide and subdividing tiles to form sub-tiles (see #910-912 of Figure 9).
In reference to claim 11, claim 11 is similar to claim 1 and is therefore rejected under like rationale. In addition to the rationale as applied in the rejection of claim 1 above, claim 11 further recites, “A tile-based graphics processor, comprising: a plurality of rendering processors, each operable to render rendering tiles that a render output…a region allocation circuit…” Broadhurst et al. discloses a graphics processing unit and method for processing graphics data using a rendering space which is sub-divided into a plurality of tiles, the processing unit comprising one or more processing cores to process the graphics data while further configured to obtain a cost indication for each of a plurality of sets of one or more tiles and depending upon such cost, subdividing at least the one or more tiles to form a plurality of subtills to assign to such cores for rendering (see column 3, lines 34-60 and Figures 3-4 and 9). Broadhurst et al. explicitly discloses in Figure 3 an example graphics processing system comprising a graphic processing unit performing the tiling based techniques discussed above and comprising the multitude of processing cores and tiling unit for determining the allocation of tiles per rendering processing cores (see column 10, lines 49-65, column 12, lines 20-28).
In reference to claim 21, claim 21 is similar to claim 1 and is therefore rejected under like rationale. In addition to the rationale as applied in the rejection of claim 1 above, claim 21 further recites, “A non-transitory computer readable storage medium storing computer software code which when executing on one or more processors performs a method of operating a tile-based graphics processor that comprises plural rendering processors each operable to render rendering tiles that a render output is divided into for rendering purposes, the method comprising…” Broadhurst et al. discloses the graphics processing unit and associated algorithms and methods described above could be performed via executable code stored on a computer-readable storage medium (see at least columns 30-31, lines 55-10).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Broadhurst et al. (U.S. Patent 10,387,990).
In reference to claims 5 and 15, Broadhurst et al. discloses all of the claim limitations as applied to claims 4 and 14 respectively above. Although Broadhurst et al. does disclose the tiling unit determining which primitives are present within each of the tiles of the rendering space, Broadhurst et al. does not explicitly disclose doing so using edge information of primitives. It is well known in the art of computer graphics processing to determine primitive processing techniques using edge-based rendering techniques. Determining primitive rendering techniques based upon edges of primitives in order to permit fast, deterministic determinations of fragment coverage using simpler integer arithmetic (Official Notice). It would have been obvious to one of ordinary skill in the art for Broadhurst et al. who already teaches determining primitives within certain tiles, to use edge-based rendering techniques, because it is well known in the art that using edge-based rendering techniques permits fast, deterministic determinations of fragment coverage using simpler integer arithmetic.
References Cited
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Sorgard et al. (U.S. Publication 2016/0005195)
Sorgard et al. discloses dividing a scene to be rendered into plurality individual sub-regions or tiles.
Bonfiglioli et al. (U.S. Publication 2020/0005423)
Bonfiglioli et al. discloses a graphics processing unit processing graphics data using a rendering space sub-divided into a plurality of tiles.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Antonio Caschera whose telephone number is (571) 272-7781. The examiner can normally be reached Monday-Friday between 6:30 AM and 2:30 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Said Broome, can be reached at (571) 272-2931.
Any response to this action should be mailed to:
Mail Stop ____________
Commissioner for Patents
P.O. Box 1450
Alexandria, VA 22313-1450
or faxed to:
571-273-8300 (Central Fax)
See the listing of “Mail Stops” at http://www.uspto.gov/patents/mail.jsp and include the appropriate designation in the address above.
Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the Technology Center 2600 Customer Service Office whose telephone number is (571) 272-2600.
/Antonio A Caschera/
Primary Examiner, Art Unit 2612
1/7/26