Prosecution Insights
Last updated: October 02, 2026
Application No. 18/785,714

Server, Client, Methods and Program Codes

Final Rejection §102§103§112§DOUBLEPATENT
Filed
Jul 26, 2024
Priority
Sep 06, 2021 — continuation of 17/446,974
Examiner
KIM, DONG U
Art Unit
2197
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
625 granted / 722 resolved
+31.6% vs TC avg
Moderate +13% lift
Without
With
+13.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
28 currently pending
Career history
748
Total Applications
across all art units

Statute-Specific Performance

§101
10.4%
-29.6% vs TC avg
§103
45.3%
+5.3% vs TC avg
§102
10.2%
-29.8% vs TC avg
§112
27.4%
-12.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 722 resolved cases

Office Action

§102 §103 §112 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to the amendment filed on 8/5/2026. This action is made FINAL. Claims 1-12 are pending and they are presented for examinations. Response to Arguments Applicant's arguments filed regarding claim 1 (page 7), “Oshins also teaches that the virtual machine has no awareness of the invoked processing mode and continues making requests without accounting for how the computing device will handle them. See Oshins at Summary. That is the opposite of and teaches against a client being informed of an inactive state and terminating new requests in response while remaining unsuspended as recited by claim 1. Accordingly, for at least the reasons set forth above, Applicant respectfully requests the withdrawal of the rejection of claim 1 and its dependent claims.”. The examiner would like to point out the instant application which discloses a client device as being a virtual device and a sever may be either physical or virtual. [PGPub paragraph 58], “In the case of a virtual device, these interrupts may be issued to the client, e.g., a guest/VM by the VMM, and the capabilities may be emulated in the PCI config space or the MMIO space.” [PGPub paragraph 59], “In an example, the server may be a physical server, a virtual server, a physical PCI device, a physical compute express link device or a virtual device composed by a system software.” Additionally, claim 1 recite: “an inactive operation state relating to the computing device” and “proceed to an inactive operation state” (emphasis added). There are two instances of “an inactive operation state”. First inactive operation state relating to the computing device and a second inactive operation state which pending requests are flushed out. The second inactive operation state does not suspend the client computing device, its’ function is to instruct the client to terminate transmission of new request. Therefore, the second inactive operation state is merely to provide instruction to flush out pending request without instructing suspension of the client computing device. Furthermore, limitation: “proceed to an inactive operation state such that pending requests are flushed out without suspending the client device” is merely an instruction to flush the requests, which is a separate/distinct process. There is/are no correlation between the first inactive operation state and the second inactive optional state. The second inactive optional state is not correlated to any client computing device and/or computing device. Oshins discloses separate instructions/steps to stop new requests and flushing pending requests. Instruction to flush pending requests does not pause the virtual machine. The examiner is unclear if claim 1 was purposely written to incorporate two “inactive operation state” (emphasis added) or not but, it appears the claim language and the intention of the applicant’s argument is not consistent. The examiner recommends further amending the claim to be consistent with the intended argument/claim. Therefore, argument is not persuasive. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 (similarly claims 5 and 9) recites the limitation "the client" to terminate. There is insufficient antecedent basis for this limitation in the claim. The examiner is unclear if “the client” is referring to “the client computing device” or if “the client’ is a user or some other client. Claim 2-4, 6-8 and 10-12 are rejected based on rejection of its corresponding dependent claim. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim(s) 1-12 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim(s) 26, 27, 30, 31, 34 and 35 of copending Application No.17446974. Although the claims at issue are not identical, they are not patentably distinct from each other because: Copending 17446974 Instant 26. A computing device comprising: processing circuitry to: facilitate one or more interfaces to communicate with a client computing device, wherein to communicate includes to transmit an update message to inform the client computing device regarding an upcoming transition to an inactive operation state relating to the computing device; and proceed to the inactive operation state such that one or more pending requests relating to the client computing device addressed to the computing device are flushed out. 1. A computing device comprising: processing circuitry to: facilitate one or more interfaces to communicate with a client computing device, wherein to communicate includes to transmit a pause interrupt to inform the client computing device of an inactive operation state relating to the computing device; and proceed to an inactive operation state such that pending requests are flushed out without suspending the client computing device, wherein, in response to the inactive operation state, the client to terminate transmitting new requests to the computing device. 27. The computing device of claim 26, wherein the processing circuitry is further to proceed to the inactive operation state upon reaching an exceedance of a predefined time and facilitate the one or more interfaces to transmit the update message to the client computing device informing the client computing device regarding an operation state of the computing device including a server computing device 2. The computing device of claim 1, wherein the processing circuitry is further to facilitate the one or more interfaces to transmit the pause interrupt to the client informing the client regarding an operation state of the computing device including a server computing device. 3. The computing device of claim 2, wherein the operation state includes an inactive operation state relating to the computing device. 4. The computing device of claim 1, wherein after an exceedance of a predefined time, proceed to the inactive operation state and flush out the pending requests. As per claims 5-12, these are method and computer-readable medium claims corresponding to the device claims 1-4. Therefore, rejected based on similar rationale. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 5-7 and 9-11 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Oshins et al. (Pub 20200257547) (hereafter Oshins). As per claim 1, Oshins teaches: A computing device comprising: processing circuitry to: facilitate one or more interfaces to communicate with a client computing device, wherein to communicate includes to transmit a pause interrupt to inform the client computing device of an inactive operation state relating to the computing device; and ([Paragraph 18], As a preliminary matter, the term “hardware logic circuitry” corresponds to one or more hardware processors (e.g., CPUs, GPUs, etc.) that execute machine-readable instructions stored in a memory, and/or one or more other hardware logic components (e.g., FPGAs) that perform operations using a task-specific collection of fixed and/or programmable logic gates. Section C provides additional information regarding one implementation of the hardware logic circuitry. Each of the terms “component” and “engine” refers to a part of the hardware logic circuitry that performs a particular function. [Paragraph 52], The computing device 106 can apply environment-specific logic in determining the sequencing of events involved in transitioning among modes. In one case, the computing device 106 can initiate the emulation mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests to the hardware accelerator 110; [Paragraph 42], In operation (5), the service component 136 instructs the hardware accelerator 110 to begin the updating operation, e.g., by storing firmware, configuring gates, etc.) proceed to an inactive operation state such that pending requests are flushed out without suspending the client computing device, wherein, in response to the inactive operation state, the client to terminate transmitting new requests to the computing device. ([Paragraph 52], The computing device 106 can apply environment-specific logic in determining the sequencing of events involved in transitioning among modes. In one case, the computing device 106 can initiate the emulation mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests to the hardware accelerator 110; (b) waiting until the hardware accelerator 110 finishes any pending requests previously sent to it; (c) performing operations (2)-(4) to modify the address-mapping information 128 and transfer the hardware accelerator's state information 138 to the emulator 132; and (d) sending a pause end signal to the virtual machine 110. The computing device 106 can initiate the pass-through mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests; (b) waiting until the emulator 132 finishes any pending requests previously sent to it; (c) performing operations (12)-(15) to modify the address-mapping information 128 and transfer the emulator's state information to the hardware accelerator 110; and (d) sending a pause end signal to the virtual machine 110. This series of operations is presented in the spirit of illustration, not limitation; other implementations can use other protocols to ensure a seamless transition between modes. [Paragraph 42], In one implementation, the computing device 106 can pause the virtual machine 126 when it performs the above-described set-up operations (operations (2)-(4)). By doing this, the computing device 106 can ensure that the virtual machine 126 will not attempt to interact with the hardware accelerator 110… In operation (5), the service component 136 instructs the hardware accelerator 110 to begin the updating operation, e.g., by storing firmware, configuring gates, etc.) As per claim 2, rejection of claim 1 is incorporated: Oshins teaches wherein the processing circuitry is further to facilitate the one or more interfaces to transmit the pause interrupt to the client informing the client regarding an operation state of the computing device including a server computing device. ([Paragraph 52], (b) waiting until the emulator 132 finishes any pending requests previously sent to it… [Paragraph 52], The computing device 106 can apply environment-specific logic in determining the sequencing of events involved in transitioning among modes. In one case, the computing device 106 can initiate the emulation mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests to the hardware accelerator 110; [Paragraph 42], In one implementation, the computing device 106 can pause the virtual machine 126 when it performs the above-described set-up operations (operations (2)-(4)). By doing this, the computing device 106 can ensure that the virtual machine 126 will not attempt to interact with the hardware accelerator 110… In operation (5), the service component 136 instructs the hardware accelerator 110 to begin the updating operation, e.g., by storing firmware, configuring gates, etc. [Paragraph 51], FIG. 4 exaggerates the lengths of these pause and set-up spans for the purposes of explanation; in actuality, these spans may be much shorter than illustrated (e.g., a fraction of a second). To pause the virtual machine 126, the computing device provides a pause start signal. To resume the virtual machine 126, the computing device 126 provides a pause end signal.) As per claim 3, rejection of claim 2 is incorporated: Oshins teaches wherein the operation state includes an inactive operation state relating to the computing device. ([Paragraph 52], (b) waiting until the emulator 132 finishes any pending requests previously sent to it… [Paragraph 52], The computing device 106 can apply environment-specific logic in determining the sequencing of events involved in transitioning among modes. In one case, the computing device 106 can initiate the emulation mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests to the hardware accelerator 110; [Paragraph 42], In one implementation, the computing device 106 can pause the virtual machine 126 when it performs the above-described set-up operations (operations (2)-(4)). By doing this, the computing device 106 can ensure that the virtual machine 126 will not attempt to interact with the hardware accelerator 110… In operation (5), the service component 136 instructs the hardware accelerator 110 to begin the updating operation, e.g., by storing firmware, configuring gates, etc. [Paragraph 51], In a span 404, the computing device 106 sets up the emulation mode, while pausing the virtual machine 126.) As per claims 5-7, these are method claims corresponding to the computing device claims 1-3. Therefore, rejected based on similar rationale. As per claims 9-11, these are computer-readable medium claims corresponding to the computing device claims 1-3. Therefore, rejected based on similar rationale. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4, 8 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oshins in view of Asaro et al. (Pub 20190018699) (hereafter Asaro). As per claim 4, rejection of claim 1 is incorporated: Oshin discloses wherein after an exceedance of a predefined time, proceed to the inactive operation state and flush out the pending requests. ([Paragraph 52], (b) waiting until the emulator 132 finishes any pending requests previously sent to it… [Paragraph 52], The computing device 106 can apply environment-specific logic in determining the sequencing of events involved in transitioning among modes. In one case, the computing device 106 can initiate the emulation mode by: (a) sending a pause start signal to the virtual machine 110, which prevents it from issuing new requests to the hardware accelerator 110; [Paragraph 42], In one implementation, the computing device 106 can pause the virtual machine 126 when it performs the above-described set-up operations (operations (2)-(4)). By doing this, the computing device 106 can ensure that the virtual machine 126 will not attempt to interact with the hardware accelerator 110… In operation (5), the service component 136 instructs the hardware accelerator 110 to begin the updating operation, e.g., by storing firmware, configuring gates, etc. [Paragraph 51], FIG. 4 exaggerates the lengths of these pause and set-up spans for the purposes of explanation; in actuality, these spans may be much shorter than illustrated (e.g., a fraction of a second). To pause the virtual machine 126, the computing device provides a pause start signal. To resume the virtual machine 126, the computing device 126 provides a pause end signal.) Although Oshin teaches span of time for an accelerator to be updated during inactive operation. Oshin does not explicitly disclose wherein after an exceedance of a predefined time, proceed to the inactive operation state and flush out the pending requests. Asaro teaches after an exceedance of a predefined time. ([Paragraph 42], completes the tasks already “in flight” in the graphics processing pipeline 134 and/or compute units 138). Completing the tasks involves allowing the work currently in-flight in the APD 116 to complete and to have final output values written out to the target memory location. [Paragraph 47], In some instances, the request from the virtualization scheduler 212 to stop work in the APD 116 (the “idle” command) for the current function results in a hang. More specifically, the request from the APD 116 to stop work is a sort of “soft” command in that the request is obeyed eventually, but not until a certain set of in-flight work is deemed to be completed or at least saved for later completion. This fact means that there is some delay between the stop-work request being issued and the APD 116 actually stopping work. In some situations, this delay is very long. If the delay is longer than a timeout threshold, then the APD 116 is deemed to be “hung.” [Paragraph 48], Many of the elements of the device 100 are illustrated in FIG. 4, which also illustrates a hang detection and correction unit 402 and a hang timer 404, both illustrated as being included within the virtualization scheduler 212. The hang detection and correction unit 402 and hang timer 404 may be implemented in hardware, software, or with any combination thereof. [Paragraph 50], In the event that the hang detection and correction unit 402 does detect a hang, the hang detection and correction unit 402 causes several events to occur to respond to the hang. More specifically, the hang detection and correction unit 402 notifies the hypervisor 206, via an interrupt signal, that a hang has occurred for a particular function. This interrupt signal causes the hypervisor 206 to interrupt other operations on the processor 102 and to execute a handler associated with virtualization context switch hangs on the APD 116. The handler issues a virtual function-function level reset (“VF FLR”) request to the APD 116 and also informs the VM associated with the hung function that the reset occurred. [Paragraph 51], Among other things, the virtual function-function level reset interrupts the in flight work in the APD 116, and also includes clearing state and data for the virtual function…) It would have been obvious to a person with ordinary skill in the art, before the effective filing date of the invention, to combine the teachings of Oshins wherein a update message to a client of an inactive operation state (i.e. pause state), completes pending requests via flushing and inactivate operation state relating to the computing device, into teachings of Asaro wherein a request that cannot complete within a period of time is reset and cleared, because by clearing any hung requests determined by a timer allows continuation without indefinitely waiting to transition to the inactive operation state. As per claim 8, this is a method claim corresponding to the computing device claim 4. Therefore, rejected based on similar rationale. As per claim 12, this is a computer-readable medium claim corresponding to the computing device claim 4. Therefore, rejected based on similar rationale. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. McClure pub 20200327048 discloses exiting state or scrubbing state. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONG U KIM whose telephone number is (571)270-1313. The examiner can normally be reached 9:00am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bradley Teets can be reached at 5712723338. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DONG U KIM/Primary Examiner, Art Unit 2197
Read full office action

Prosecution Timeline

Jul 26, 2024
Application Filed
May 08, 2026
Non-Final Rejection mailed — §102, §103, §112
Aug 05, 2026
Response Filed
Sep 22, 2026
Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+13.4%)
2y 8m (~6m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 722 resolved cases by this examiner. Grant probability derived from career allowance rate.

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