Prosecution Insights
Last updated: April 19, 2026
Application No. 18/786,098

MOUNTING BRACKET AND ELECTRONIC DEVICE AND DISPLAY APPARATUS INCLUDING THE SAME

Non-Final OA §103
Filed
Jul 26, 2024
Examiner
SHRESTHA, SAGAR
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
96%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
393 granted / 471 resolved
+15.4% vs TC avg
Moderate +13% lift
Without
With
+13.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
22 currently pending
Career history
493
Total Applications
across all art units

Statute-Specific Performance

§103
51.2%
+11.2% vs TC avg
§102
26.7%
-13.3% vs TC avg
§112
15.5%
-24.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 471 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20170164487: “Kim” hereinafter) in view of Ciasulli et al. (US 20110265860; “Ciasulli” hereinafter). Regarding claim 1, Kim discloses an electronic device comprising: a printed circuit board (50) on which an electronic component is mounted (par. [0080]); a case (40) comprising a board mounting portion (60) on which the printed circuit board (50) is mounted, the board mounting portion comprising an interference wall (120); and a mounting member (100) fixed to the printed circuit board (50) and configured to fix the printed circuit board to the board mounting portion (60) (“The mounting member 100 may be fixed on the PCB 50, and removably coupled with a mounting portion 120 formed in at least one of the board resting portion 60”, par. [0090]), the mounting member comprising an interference portion (110) configured to interfere with the interference wall (120) (par. [0096]). Kim does not explicitly disclose a scratch protrusion protruding from the interference portion and configured to scratch an outer surface of the interference wall in a state in which the interference portion interferes with the interference wall. Ciasulli teaches a mounting member (1310) comprising a scratch protrusion (1307, 1308, 1306; figs 13A-13B) protruding a mounting surface (1301, 1302) configured to scratch an outer surface of a frame of a PV module when the mounting member (1310) is mounted on the frame of the PV module (par. [0084]- [0087]). It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Kim to incorporate a scratch protrusion protruding from the interference portion and configured to scratch an outer surface of the interference wall in a state in which the interference portion interferes with the interference wall as suggested by Ciasulli because such modification helps to improve grounding of the device/PCB (par. [0084]- [0087]). Regarding claim 2, Kim in view of Ciasulli discloses wherein the interference wall comprises a coating layer on the outer surface of the interference wall, and wherein the scratch protrusion is configured to penetrates the coating layer (Ciasulli teaches, the scratch or piercing points 1306, 1307, 1308 penetrates/pierces the outer anodization layer of the aluminum frame, par. [0086]). Regarding claim 3, Kim in view of Ciasulli discloses wherein the scratch protrusion is configured to remove at least a portion of the coating layer in a state in which the interference portion interferes with the interference wall (Ciasulli teaches, the scratch or piercing points 1306, 1307, 1308 penetrates/pierces and dig through the outer anodization layer of the aluminum frame to form a ground path, par. [0086]). Regarding claim 4, Kim in view of Ciasulli discloses wherein the interference wall further comprises a conductive layer covered by the coating layer, and wherein the scratch protrusion is configured to contact the conductive layer (Ciasulli teaches, the scratch or piercing points 1306, 1307, 1308 penetrates/pierces and dig through the outer anodization layer of the aluminum frame to contact the aluminum surface to form a ground path, par. [0086]). Regarding claim 5, Kim in view of Ciasulli discloses wherein the board mounting portion (120, Kim) comprises an insertion hole (121, Kim) into which the interference portion (110, Kim ) (fig. 7) and the scratch protrusion (1306, 1307, 1308, Ciasulli) are inserted, and wherein the scratch protrusion is configured to be inserted into the insertion hole and contact with the interference wall (when mounting member 1310 is mounted on the PV module, the piercing points 1306, 1307, 1308 pierce and dig hole in the anodization layer of the frame of PV module to form a ground path, Ciasulli, par. [0084]- [0087]; and the combination of Kim and Ciasulli teaches the claimed limitation as a whole). Regarding claim 6, Kim in view of Ciasulli discloses wherein the insertion hole (121, Kim, figs. 7-9) is open in a direction parallel to a direction in which the printed circuit board (50, Kim) extends (figs 7-9, Kim), and the scratch protrusion is configured to be inserted into the insertion hole in the direction parallel to the direction in which the printed circuit board extends (Ciasulli teaches, when mounting member 1310 is mounted on the PV module, the piercing points 1306, 1307, 1308 pierce and dig hole in the anodization layer of the frame of PV module to form a ground path, par. [0084]- [0087]; and the combination of Kim and Ciasulli teaches the claimed limitation as a whole). Regarding claim 7, Kim in view of Ciasulli discloses wherein the interference portion (110, Kim) comprises: a first extension portion (111 Kim, figs. 7-9) extending toward the interference wall (120 Kim, figs. 7-9); a bending portion (a bent portion between 111 and 114, Kim, figs. 7-9) bent at one end of the first extension portion facing the interference wall (figs 7-9, Kim); and a second extension portion (114, 113, Kim) extending from the bending portion (Kim, figs. 7-9), and wherein the scratch protrusion is at the bending portion (1306, 1307, 1308, Ciasulli, fig13A-13B; and the combination of Kim and Ciasulli teaches the claimed limitation as a whole). Regarding claim 8, Kim in view of Ciasulli discloses wherein the second extension portion (113, Kim) extends from the bending portion away from the interference wall (Kim, figs 7-9). Regarding claim 9, Kim in view of Ciasulli discloses wherein the mounting member comprises: a mounting body (101, Kim) mounted on one surface of the printed circuit board (50, Kim, figs 7-9); and a fixing portion (102, Kim) extending from the mounting body (101, Kim) and configured to couple the mounting member to the printed circuit board (50, Kim, figs 6-9), and wherein the interference portion (110, Kim) extends from the mounting body (101, Kim) and is configured to penetrate the printed circuit board (50; Kim, figs 6-9). Regarding claim 10, Kim in view of Ciasulli discloses wherein the interference wall (120, Kim) is parallel to the mounting body, and wherein a distance between the scratch protrusion and the mounting body in a state in which the interference portion does not interfere with the interference wall is less than a distance between the scratch protrusion and the mounting body in a state in which the interference portion interferes with the interference wall (when the mounting member 110 is coupled to the mounting portion 120, the pressing section 114 deflected or deformed by the lower surface of the thickness forming portion 122, so the distance of the bent portion in between 113 and 114 from the support portion 101 increases, figs 6, 8, Kim). Regarding claim 11, Kim in view of Ciasulli discloses the deice as claimed in claim 1. Kim in view of Ciasulli does not explicitly disclose wherein the interference portion comprises a through-hole facing the interference wall, and wherein the scratch protrusion has a circumference corresponding to a circumference the through-hole. However, Ciasulli teaches the piercing points (306, 1307, 1308) extends inward facing the frame of the PV module from the cut out portion of the mounting member (1310) along its peripheral portion (fig. 13A-13B). It would have been obvious to one of ordinary skill in the art before the effective date of the claimed invention to modify the mounting member to have the interference portion comprises a through-hole facing the interference wall, and wherein the scratch protrusion has a circumference corresponding to a circumference the through-hole, since changing the shape of the connecting portion appears to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). In re Japikse, 181 F.2d 1019, 86 USPQ 70. Regarding claim 12, Kim in view of Ciasulli discloses wherein an inner surface of the scratch protrusion is formed integrally with an outer circumference of the through-hole (the piercing points 1306, 1307, 1308 are formed integrally with surface of the portions 1301 and 1302 and extended inward from the cutout portion of the mounting member 1310 along its peripheral portion, Ciasulli, figs 13A-13B). Regarding claim 13, Kim in view of Ciasulli discloses wherein the scratch protrusion is formed to protrude in a pressing direction of the interference portion when the through-hole is pressed (“When the grounding washer is clamped down by, for example, a rivet, the piercing points dig into the aluminum and provide the ground path”, par. [0086], Ciasulli). Regarding claim 14, Kim in view of Ciasulli discloses wherein the interference portion comprises an elastic material (“the coupling portion 110 of the mounting member 100 may be elastically deformed so that the pressing section 114 presses an area of the inner surface of the mounting portion 120 by a restoring force to generate a clamping force of the mounting member 100”, par. [0108], Kim; figs 6, 8-9). Regarding claim 15, Kim in view of Ciasulli discloses wherein the board mounting portion (60, Kim) and the mounting member (100, Kim) each comprise a conductive material (“the board resting portion 60 may be formed of a conductive material”, par. [0085]; “The mounting member 100 may include a conductive material”, par. [0093], Kim). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure are listed in the form 892. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAGAR SHRESTHA whose telephone number is (571)270-1236. The examiner can normally be reached 10 am-6:30 pm, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen Parker can be reached at (303)297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAGAR SHRESTHA/Primary Examiner, Art Unit 2841
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Prosecution Timeline

Jul 26, 2024
Application Filed
Dec 04, 2025
Non-Final Rejection — §103
Feb 26, 2026
Interview Requested
Mar 09, 2026
Examiner Interview Summary
Mar 09, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
96%
With Interview (+13.0%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 471 resolved cases by this examiner. Grant probability derived from career allow rate.

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